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1. 发明公开

CN1333974A 残留边带信号接收器的通带均衡器无效
公开(公告)号：CN1333974A
公开(公告)日：2002-01-30
申请号：CN99806307.X
申请日：1999-05-18
申请人：萨尔诺夫公司 , 摩托罗拉公司
发明人：穆罕默德·V·泰齐贝 , 兰德尔·B·珀洛
IPC分类号： H04N5/44 , H04L27/01 , H04L27/02 , H04L7/02
CPC分类号： H04N5/455 , H04L7/027 , H04L25/03057 , H04L27/066 , H04N5/211 , H04N5/4401 , H04N11/002 , Y10S348/914
摘要：一种通带均衡器,它不使用训练序列即可对复数信号(例如,VSB残留边带信号)进行盲均衡。这种通带均衡器含有一个判定反馈均衡器(DFE),该判定反馈均衡器使用一个针对I信号的滤波器和一个针对Q信号的滤波器来分别处理同相位(I)信号和正交相位(Q)信号,而并没有使用针对I信号及Q信号交叉分量的滤波器。这样,这种判定反馈均衡器所含有的乘法器和加法器的数量,大约是现有技术的判定反馈均衡器中的一半。

2. 发明授权

EP0496558B1 Television signal decoder with improved architecture 失效
标题翻译： Fernsehsignaldekodierer与改进的架构
公开(公告)号：EP0496558B1
公开(公告)日：1996-11-13
申请号：EP92300464.2
申请日：1992-01-20
申请人： The Grass Valley Group, Inc.
发明人： Fairhurst, Jon
IPC分类号： H04N9/64 , H04N5/44
CPC分类号： H04N3/24 , H04N9/64 , H04N17/02 , Y10S348/914

3. 发明授权

US5812217A Automatically adjusting anti-ghosting filter coefficients when the coefficients exceed particular values 失效
标题翻译：当系数超过特定值时，自动调整反重影滤镜系数
公开(公告)号：US5812217A
公开(公告)日：1998-09-22
申请号：US670563
申请日：1996-06-26
申请人： Benjamin M. Cahill, III
发明人： Benjamin M. Cahill, III
IPC分类号： H04N5/21 , H04N7/088 , H04N5/213
CPC分类号： H04N5/211 , H04N7/0882 , Y10S348/914
摘要： A method and apparatus for the self-correcting of anti-ghosting filter coefficients is provided. A plurality of coefficients associated with an anti-ghosting filter are monitored as data is received by the filter. The plurality of coefficients are adjusted if one or more of the plurality of coefficients exceed a first value. In one embodiment, the filter is an adaptive baseband equalization filter. If the magnitude of one or more secondary coefficients of the adaptive baseband equalization filter exceed a predetermined factor of the primary coefficient, then the plurality of coefficients are adjusted. In another embodiment, the filter is a lookup table filter. If the magnitude of a coefficient in the lookup table is greater than a predetermined value, the plurality of coefficients are adjusted.
摘要翻译：提供了一种用于自重校正反重影滤波器系数的方法和装置。当滤波器接收到数据时，监视与反重像滤波器相关联的多个系数。如果多个系数中的一个或多个超过第一值，则调整多个系数。在一个实施例中，滤波器是自适应基带均衡滤波器。如果自适应基带均衡滤波器的一个或多个次系数的幅度超过主系数的预定因子，则调整多个系数。在另一个实施例中，过滤器是查找表过滤器。如果查找表中的系数的大小大于预定值，则调整多个系数。

4. 发明授权

US5808701A Circuit for automatically compensating delay difference between luminance signal and color signal 失效
标题翻译：用于自动补偿亮度信号和彩色信号之间延迟差的电路
公开(公告)号：US5808701A
公开(公告)日：1998-09-15
申请号：US781192
申请日：1997-01-10
申请人： Tae-Sung Lee
发明人： Tae-Sung Lee
IPC分类号： H04N9/77 , H04N9/78
CPC分类号： H04N9/77 , Y10S348/914
摘要： A video signal processing system includes a circuit for detecting the delay between a luminance signal and a color signal in a video signal, and for automatically compensating for the delay. The circuit includes a Y/C separator for separating a composite video signal into the luminance signal and the color signal, and a color difference and synchronous signals separator for separating the luminance and color signals into synchronous and color difference signals. A delay circuit receives and delays the luminance signal based on a delay control signal, and outputs the delayed luminance signal to a video signal processor, which also receives the color difference signals directly from the color difference and synchronous signals separator. The delay control signal is generated by a delay correction signal generator, which is responsive to the synchronous signals generated by the color difference and synchronous signals separator, and outputs of the video signal processor, including a delayed luminance signal and color difference signals. The delay correction signal generator 22 reciprocally compares the luminance signal with the color signals in accordance with the separated synchronous signals, and outputs the delay control signal, corresponding to the detected amount of delay, to the delay circuit, in order to delay the luminance signal, and thereby compensate for the delay between the color signals and luminance signal.
摘要翻译：视频信号处理系统包括用于检测视频信号中的亮度信号和颜色信号之间的延迟并用于自动补偿延迟的电路。该电路包括用于将复合视频信号分离成亮度信号和彩色信号的Y / C分离器，以及用于将亮度和颜色信号分离为同步和色差信号的色差和同步信号分离器。延迟电路基于延迟控制信号接收并延迟亮度信号，并将延迟的亮度信号输出到视频信号处理器，该视频信号处理器也直接从色差和同步信号分离器接收色差信号。延迟控制信号是由响应由色差和同步信号分离器产生的同步信号的延迟校正信号发生器以及视频信号处理器的输出产生的，包括延迟的亮度信号和色差信号。延迟校正信号发生器22根据分离的同步信号对亮度信号与彩色信号进行倒数比较，并将对应于检测到的延迟量的延迟控制信号输出到延迟电路，以便延迟亮度信号从而补偿颜色信号和亮度信号之间的延迟。

5. 发明授权

US5371540A Digital-signal-processing camera 失效
标题翻译：数字信号处理相机
公开(公告)号：US5371540A
公开(公告)日：1994-12-06
申请号：US133786
申请日：1993-10-08
申请人： Akihiro Tamura , Atsushi Morimura , Yoshinori Kitamura
发明人： Akihiro Tamura , Atsushi Morimura , Yoshinori Kitamura
IPC分类号： H04N5/067 , H04N5/77 , H04N5/91 , H04N5/14
CPC分类号： H04N5/0675 , H04N5/77 , H04N5/91 , Y10S348/914
摘要： In the present invention, a drive circuit 12 drives a solid-state image-pickup element 11 in synchronism with a synchronizing signal generated by a synchronizing signal generation circuit 13, and the solid-state image-pickup element 11 issues an output signal prior to an end time of a horizontal blanking period by a time period T.sub.A. This output signal is processed in a digital signal processing circuit 14 and is issued as a picture signal. At that time, the picture signal is delayed from the synchronizing signal by a time period (T.sub.B -T.sub.A) owing to the signal processing, whereas the synchronizing signal is delayed by a delay circuit 15, in which a delay time made by subtracting a time period T.sub.A from a delay time T.sub.B of the digital signal processing circuit 14 is given, and can be issued in a proper timing for a picture signal output of the digital signal processing circuit 14. Further, by incorporating the delay circuit 15 in an LSI which constitutes the digital signal processing circuit 14, a circuit-construction can be minimized and a disturbance, which is given to the picture signal by the synchronizing signal, can be remarkably eliminated.
摘要翻译：在本发明中，驱动电路12与由同步信号发生电路13产生的同步信号同步地驱动固态摄像元件11，并且固态摄像元件11在水平消隐期的结束时间为时间段TA。该输出信号在数字信号处理电路14中进行处理，作为图像信号发出。此时，由于信号处理，图像信号从同步信号延迟一段时间（TB-TA），而同步信号被延迟电路15延迟，其中通过减去时间给出了数字信号处理电路14的延迟时间TB的周期TA，并且可以在数字信号处理电路14的图像信号输出的适当定时发出。另外，通过将延迟电路15并入LSI 构成数字信号处理电路14，可以最小化电路结构，并且可以显着地消除由同步信号给予图像信号的干扰。

6. 发明申请

WO1996011550A1 DELAY DETECTOR APPARATUS AND METHOD FOR PLURAL IMAGE SEQUENCES 审中-公开
标题翻译：延迟检测器装置和方法用于平面图像序列
公开(公告)号：WO1996011550A1
公开(公告)日：1996-04-18
申请号：PCT/US1995012597
申请日：1995-09-28
申请人： PIXEL INSTRUMENTS CORPORATION
发明人： PIXEL INSTRUMENTS CORPORATION , COOPER, James, Carl , ANDERSON, Steven, J.
IPC分类号： H04N17/00
CPC分类号： H04N5/222 , H04N5/04 , H04N5/602 , H04N17/00 , H04N21/242 , Y10S348/914
摘要： A system determines the delay of a delayed sequence of images (2) with respect to a relatively undelayed version (1). The system takes samples of the delayed (13) and undelayed (11) images at approximately the same position (10) and compares the samples over multiple image frames thereby determining which of the delayed images most closely matches a given undelayed image (15). By knowing which delayed image most closely matches a given undelayed image, a coarse delay is determined. A fine delay measurement is achieved by adding the instantaneous delay of a known repetitive feature of the respective image sequences (6, 7, 8). The invention is also useful for comparing a given image to other images to determine the closest match. When used with video signals, samples of the delayed video (17) are taken with an A-D (21) and stored in a memory (23). Samples of the undelayed video (16) are taken with an A-D (18) and stored in a memory (20). A microprocessor (24) inspects the samples stored in the memories (20 & 23) to correlate the image frames and communicate the results via a communications port (26) or display (25).
摘要翻译：系统确定相对于相对未延迟的版本（1）的延迟的图像序列（2）的延迟。该系统在大致相同的位置（10）处对延迟（13）和未延迟（11）图像进行采样，并且比较多个图像帧上的采样，从而确定哪个延迟图像与给定的未延迟图像最接近匹配（15）。通过知道哪个延迟图像与给定的未延迟图像最紧密匹配，确定粗略的延迟。通过添加各个图像序列（6,7,8）的已知重复特征的瞬时延迟来实现精细延迟测量。本发明对于将给定图像与其他图像进行比较以确定最接近的匹配也是有用的。当与视频信号一起使用时，采用A-D（21）拍摄延迟视频（17）的采样并存储在存储器（23）中。未延迟视频（16）的样本用A-D（18）拍摄并存储在存储器（20）中。微处理器（24）检查存储在存储器（20和23）中的样本以使图像帧相关联并且经由通信端口（26）或显示器（25）传送结果。

7. 发明公开

EP0677952A3 Channel equalizer for a digital high-definition television receiver 失效
标题翻译：通道均衡器，数字Frensehempfänger高分辨率。
公开(公告)号：EP0677952A3
公开(公告)日：1996-01-10
申请号：EP94118211.5
申请日：1994-11-18
申请人： GOLDSTAR CO. Ltd.
发明人： Kim, Myung Soo, Hyundae Mansion 104-103
IPC分类号： H04N5/21
CPC分类号： H04N5/4401 , H04L25/0224 , H04L25/03057 , H04L2025/03382 , H04L2025/03484 , H04L2025/03636 , H04N5/211 , Y10S348/914
摘要： This invention relates to a channel equalization system of a VSB transmission system for a HDTV which can correct phase errors by using composite filters as well as by using general data even in a period having no training sequence. The channel equalizer for a HDTV includes, a composite filter part (10) for making the input signal applied from outside produced as I signal and Q signal, filtering the I signal and the Q signal according to composite filter coefficients, and transmitting the filtered I and Q signals as a first, and a second output signals respectively, and a composite filter renewing part (20) for calculating an error for training sequence and an error for general data using synchronization signal received from outside, the first output signal and the second output signal received from the composite filter part, and calculating real composite filter coefficients and an imaginary composite filter coefficients based on the errors for the I signal and the Q signal produced at the composite filter part and training sequence and the error for general data and transmitting the calculated errors to the composite filter part. Accordingly, this invention can improve the converging speed of a VSB transmission system by correcting phase errors using composite filters as well as by carrying out channel equalization using general data even in a period having no training sequence.

8. 发明公开

EP0677952A2 Channel equalizer for a digital high-definition television receiver 失效
标题翻译： KanalentzerrerfürdigitalenFrensehempfängermit hoherAuflösung。
公开(公告)号：EP0677952A2
公开(公告)日：1995-10-18
申请号：EP94118211.5
申请日：1994-11-18
申请人： GOLDSTAR CO. Ltd.
发明人： Kim, Myung Soo, Hyundae Mansion 104-103
IPC分类号： H04N5/21
CPC分类号： H04N5/4401 , H04L25/0224 , H04L25/03057 , H04L2025/03382 , H04L2025/03484 , H04L2025/03636 , H04N5/211 , Y10S348/914
摘要： This invention relates to a channel equalization system of a VSB transmission system for a HDTV which can correct phase errors by using composite filters as well as by using general data even in a period having no training sequence.
The channel equalizer for a HDTV includes, a composite filter part (10) for making the input signal applied from outside produced as I signal and Q signal, filtering the I signal and the Q signal according to composite filter coefficients, and transmitting the filtered I and Q signals as a first, and a second output signals respectively, and a composite filter renewing part (20) for calculating an error for training sequence and an error for general data using synchronization signal received from outside, the first output signal and the second output signal received from the composite filter part, and calculating real composite filter coefficients and an imaginary composite filter coefficients based on the errors for the I signal and the Q signal produced at the composite filter part and training sequence and the error for general data and transmitting the calculated errors to the composite filter part. Accordingly, this invention can improve the converging speed of a VSB transmission system by correcting phase errors using composite filters as well as by carrying out channel equalization using general data even in a period having no training sequence.
摘要翻译：本发明涉及一种用于HDTV的VSB传输系统的信道均衡系统，其可以通过使用复合滤波器以及甚至在没有训练序列的时段内使用通用数据来校正相位误差。用于HDTV的信道均衡器包括用于使从外部施加的输入信号作为I信号和Q信号产生的复合滤波器部分（10），根据复合滤波器系数对I信号和Q信号进行滤波，并且发送滤波后的I 和Q信号分别作为第一输出信号和第二输出信号，以及复合滤波器更新部分（20），用于使用从外部接收的同步信号计算训练序列的误差和一般数据的误差，第一输出信号和第二输出信号从复合滤波器部分接收的输出信号，以及基于在复合滤波器部分产生的I信号和Q信号的误差以及针对一般数据和传输的误差来计算实际复合滤波器系数和虚拟复合滤波器系数计算的复合滤波器部分的误差。因此，本发明可以通过使用复合滤波器校正相位误差来提高VSB传输系统的收敛速度，并且即使在没有训练序列的时段中也可以通过使用通用数据进行信道均衡。

9. 发明公开

EP0787410A4 DELAY DETECTOR APPARATUS AND METHOD FOR PLURAL IMAGE SEQUENCES 失效
标题翻译： DEVICE AND METHOD FOR A延迟达数连续的检测
公开(公告)号：EP0787410A4
公开(公告)日：1998-12-09
申请号：EP95935250
申请日：1995-09-28
申请人： PIXEL INSTR CORP
发明人： COOPER JAMES CARL , ANDERSON STEVEN J
IPC分类号： H04N5/04 , H04N5/222 , H04N5/60 , H04N17/00 , H04N9/475
CPC分类号： H04N5/222 , H04N5/04 , H04N5/602 , H04N17/00 , H04N21/242 , Y10S348/914
摘要： A system determines the delay of a delayed sequence of images (2) with respect to a relatively undelayed version (1). The system takes samples of the delayed (13) and undelayed (11) images at approximately the same position (10) and compares the samples over multiple image frames thereby determining which of the delayed images most closely matches a given undelayed image (15). By knowing which delayed image most closely matches a given undelayed image, a coarse delay is determined. A fine delay measurement is achieved by adding the instantaneous delay of a known repetitive feature of the respective image sequences (6, 7, 8). The invention is also useful for comparing a given image to other images to determine the closest match. When used with video signals, samples of the delayed video (17) are taken with an A-D (21) and stored in a memory (23). Samples of the undelayed video (16) are taken with an A-D (18) and stored in a memory (20). A microprocessor (24) inspects the samples stored in the memories (20 & 23) to correlate the image frames and communicate the results via a communications port (26) or display (25).

10. 发明公开

EP0496558A3 Television signal decoder with improved architecture 失效
标题翻译：具有改进架构的电视信号解码器
公开(公告)号：EP0496558A3
公开(公告)日：1994-07-20
申请号：EP92300464.2
申请日：1992-01-20
申请人： The Grass Valley Group, Inc.
发明人： Fairhurst, Jon
IPC分类号： H04N9/64 , H04N5/44
CPC分类号： H04N3/24 , H04N9/64 , H04N17/02 , Y10S348/914
摘要： In a new television signal decoder architecture, a mixer (30) switches between two inputs, A and B, using an envelope function C, according to the relationship: Output = A*C + B(1-C), where A is either the composite television signal input in normal operation or a first test signal memory in test signal generation operation, and B is either a fixed blanking level in normal operation or a second test signal memory in test signal generation operation. A test signal generator and blanking sequence: (18) provides the test signals to the two test signal memories (20, 22) and an envelope control signal to the envelope generator (32) telling it when and in which direction to supply the transition envelope to the mixer (30). A variable electrical length front end is created by a microprocessor (56) that recalls from its memory (58) the timing associated with a particular composite video source and directs a timing circuit (54) to wait an appropriate amount of time before releasing a frame of video stored in a FIFO buffer memory (52) to the rest of the decoder. A bus (39) is shared by sync signals and signals from diagnostic points of interest (62, 64, 66) and is alternatively controlled by the sync generation circuitry (38) during normal operation and the microprocessor (56) during diagnostics.

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