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1. 发明申请

US20110101462A1 METHOD FOR DESIGNING A SEMICONDUCTOR DEVICE INCLUDING STRESS FILMS 有权
标题翻译：用于设计包括应力膜的半导体器件的方法
公开(公告)号：US20110101462A1
公开(公告)日：2011-05-05
申请号：US12938483
申请日：2010-11-03
申请人： Yasunobu TORII
发明人： Yasunobu TORII
IPC分类号： H01L27/088 , G06F17/50
CPC分类号： H01L21/82385 , H01L21/823807 , H01L27/0207 , H01L27/088 , H01L29/7843
摘要： A method for designing a semiconductor device includes arranging at least a pattern of a first active region in which a first transistor is formed and a pattern of a second active region in which a second transistor is formed; arranging at least a pattern of a gate wire which intersects the first active region and the second active region; extracting at least a first region in which the first active region and the gate wire are overlapped with each other; arranging at least one pattern of a compressive stress film on a region including the first active region; and obtaining by a computer a layout pattern of the semiconductor device, when the at least one pattern of the compressive stress film is arranged, end portions of the at least one pattern thereof are positioned based on positions of end portions of the first region.
摘要翻译：一种用于设计半导体器件的方法包括：至少布置形成第一晶体管的第一有源区的图形和形成第二晶体管的第二有源区的图案; 至少布置与所述第一有源区和所述第二有源区相交的栅极线的图案; 提取其中所述第一有源区和所述栅极线彼此重叠的至少第一区域; 在包括所述第一有源区域的区域上布置压缩应力膜的至少一个图案; 并且通过计算机获得半导体器件的布局图案，当布置压缩应力膜的至少一个图案时，其至少一个图案的端部基于第一区域的端部的位置定位。

2. 发明申请

US20120153448A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件的半导体器件和制造方法
公开(公告)号：US20120153448A1
公开(公告)日：2012-06-21
申请号：US13241769
申请日：2011-09-23
申请人： Takumi Ihara , Seiji Ueno , Joji Fujimori , Yasunori Fujimoto
发明人： Takumi Ihara , Seiji Ueno , Joji Fujimori , Yasunori Fujimoto
IPC分类号： H01L27/06 , H01L21/98
CPC分类号： H01L21/76838 , H01L23/36 , H01L23/3675 , H01L23/42 , H01L23/552 , H01L25/0655 , H01L25/16 , H01L2224/16225 , H01L2224/16227 , H01L2224/32225 , H01L2224/73204 , H01L2224/73253 , H01L2224/81191 , H01L2924/15311 , H01L2924/1615 , H01L2924/16251 , H01L2924/19105 , H01L2924/00
摘要： A semiconductor device includes: a substrate; a semiconductor element installed on the substrate so that a surface formed with an electrode is directed to the substrate; a chip capacitor installed on the substrate; and a conductive material covering a rear surface opposite to the surface of the semiconductor element and joining to one terminal electrode of the chip capacitor.
摘要翻译：半导体器件包括：衬底; 半导体元件安装在基板上，使得形成有电极的表面被引导到基板; 芯片电容器安装在基板上; 以及覆盖与半导体元件的表面相对的后表面并与芯片电容器的一个端子电极接合的导电材料。

3. 发明申请

US20110161691A1 SEMICONDUCTOR INTEGRATED CIRCUIT AND CONTROL METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT 有权
标题翻译：半导体集成电路的半导体集成电路及其控制方法
公开(公告)号：US20110161691A1
公开(公告)日：2011-06-30
申请号：US12976377
申请日：2010-12-22
申请人： Masahiro TATSUMI , Takeshi ISHIBASHI , Takashi SHIMADA
发明人： Masahiro TATSUMI , Takeshi ISHIBASHI , Takashi SHIMADA
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , Y10T307/305 , Y10T307/352
摘要： A semiconductor integrated circuit includes: a plurality of domains each supplied power supply voltage from corresponding one of a plurality of power supply units; and a plurality of operation control units each connected to corresponding one of the plurality of domains and controlling an operational state of the corresponding domain, wherein each of the domain transmits a operation change request to the corresponding operation control unit, the operation change request representing a request for a change of the operational state with a change in current value of the domain, and the operation control unit calculates a current change rate of the domain resulted from the change of operational state upon receiving the operation change request, and transmits a response signal approving the change of operational state to the corresponding domain in case of the current change rate is within a specified value.
摘要翻译：半导体集成电路包括：多个畴，各自从多个电源单元中的相应一个提供电源电压; 以及多个操作控制单元，每个连接到所述多个域中的对应的一个域并且控制对应的域的操作状态，其中每个域向相应的操作控制单元发送操作改变请求，所述操作改变请求表示请求随着域的当前值的改变而改变操作状态，并且操作控制单元计算在接收到操作改变请求时由于操作状态的改变导致的域的当前变化率，并且发送响应信号在当前变更率的情况下，批准将操作状态更改为相应的域在规定值内。

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