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1. 发明授权

US08510576B2 Semiconductor integrated circuit and control method of semiconductor integrated circuit 有权
标题翻译：半导体集成电路和半导体集成电路的控制方法
公开(公告)号：US08510576B2
公开(公告)日：2013-08-13
申请号：US12976377
申请日：2010-12-22
申请人： Masahiro Tatsumi , Takeshi Ishibashi , Takashi Shimada
发明人： Masahiro Tatsumi , Takeshi Ishibashi , Takashi Shimada
IPC分类号： G06F1/26
CPC分类号： G06F1/26 , Y10T307/305 , Y10T307/352
摘要： A semiconductor integrated circuit includes: a plurality of domains each supplied power supply voltage from corresponding one of a plurality of power supply units; and a plurality of operation control units each connected to corresponding one of the plurality of domains and controlling an operational state of the corresponding domain, wherein each of the domain transmits a operation change request to the corresponding operation control unit, the operation change request representing a request for a change of the operational state with a change in current value of the domain, and the operation control unit calculates a current change rate of the domain resulted from the change of operational state upon receiving the operation change request, and transmits a response signal approving the change of operational state to the corresponding domain in case of the current change rate is within a specified value.
摘要翻译：半导体集成电路包括：多个畴，各自从多个电源单元中的相应一个提供电源电压; 以及多个操作控制单元，每个连接到所述多个域中的对应的一个域并且控制对应的域的操作状态，其中每个域向相应的操作控制单元发送操作改变请求，所述操作改变请求表示请求随着域的当前值的改变而改变操作状态，并且操作控制单元计算在接收到操作改变请求时由于操作状态的改变导致的域的当前变化率，并且发送响应信号在当前变更率的情况下，批准将操作状态更改为相应的域在规定值内。

2. 发明授权

US08255730B2 Power management unit and systems LSI having the power management unit 有权
标题翻译：具有电力管理单元的电力管理单元和系统LSI
公开(公告)号：US08255730B2
公开(公告)日：2012-08-28
申请号：US12277763
申请日：2008-11-25
申请人： Masahiro Tatsumi
发明人： Masahiro Tatsumi
IPC分类号： G06F1/00
CPC分类号： G06F1/3203 , G06F1/324 , G06F1/3287 , G06F1/3296 , Y02D10/126 , Y02D10/171 , Y02D10/172
摘要： A power management unit for controlling power supply voltages of first and second power domains to which first and second CPUs belong respectively includes a power IC which supplies first and second power supply voltages to the first and second power domains respectively; a clock generating portion which generates first and second clocks and supplies the first and second clocks to the first and second CPUs respectively; and a power and clock control portion which is connected both to the power IC and to the clock generating portion.
摘要翻译：用于控制第一和第二CPU属于的第一和第二电源域的电源电压的电源管理单元包括分别向第一和第二电源域提供第一和第二电源电压的电力IC; 时钟产生部分，其产生第一和第二时钟并将第一和第二时钟分别提供给第一和第二CPU; 以及电源和时钟控制部分，其连接到电力IC和时钟产生部分。

3. 发明授权

US08140875B2 Integrated circuit apparatus 有权
标题翻译：集成电路装置
公开(公告)号：US08140875B2
公开(公告)日：2012-03-20
申请号：US12325148
申请日：2008-11-29
申请人： Masahiro Tatsumi
发明人： Masahiro Tatsumi
IPC分类号： G06F1/32
CPC分类号： G06F1/26 , G06F1/3203 , G06F1/3287 , Y02D10/171 , Y10T307/469
摘要： An integrated circuit apparatus may include: a plurality of power domains to which power voltage is separately supplied; a plurality of circuit macros belonging to a plurality of the power domains respectively; a plurality of power switches to conduct or to substantially block power coming from a power circuit and going to the plurality power domains, respectively; and a power-controlling unit including a controller to control the plurality of power switches, a power domain register to store power domain data which corresponds to a plurality of external interrupt signals that are indicative of power domains that are to be activated; and an interrupt handler to respond to the external interrupt signals by delivering the power domain data corresponding to the external interrupt signals to the controller, the controller being operable to turn on/off the power switches corresponding to the power domain data, respectively.
摘要翻译：集成电路装置可以包括：多个功率域，电源电压被单独提供给其中; 分别属于多个功率域的多个电路宏; 多个电源开关，用于分别进行或基本上阻断来自电源电路的电力并分别进入到多个电力域; 以及功率控制单元，其包括控制器来控制所述多个功率开关;功率域寄存器，用于存储对应于指示要激活的功率域的多个外部中断信号的功率域数据; 以及中断处理器，通过将对应于外部中断信号的电源域数据传送到控制器来响应外部中断信号，控制器可操作以分别对与功率域数据相对应的功率开关进行接通/断开。

4. 发明授权

US06198499B1 Radio-communication video terminal device 失效
标题翻译：无线电通信视频终端设备
公开(公告)号：US06198499B1
公开(公告)日：2001-03-06
申请号：US08961430
申请日：1997-10-30
申请人： Masahiro Tatsumi
发明人： Masahiro Tatsumi
IPC分类号： H04N714
CPC分类号： H04N21/2383 , H04N19/89 , H04N21/4382
摘要： Structure is provided to realize transmission of video with no transmission error over a transmission line having a low transmission performance. A video communication video terminal device which is provided with a video transmission adapter includes a transmission video-frame disassembling portion for correcting a transmission error in video-data, detecting an error in the corrected video data after correction of transmission error therein and extracting only errorless video-frame data, a transmission video frame generating portion for generating a video frame composed of video frame data to be transmitted, a control signal for controlling the other terminal to be communicated and an error-correction code attached the data and a video control portion for instructing extraction of errorless video-frame data from the received video data and controlling the video frame data to be transmitted according to the control signal.
摘要翻译：提供结构以实现具有低传输性能的传输线上没有传输错误的视频传输。具有视频传输适配器的视频通信视频终端设备包括用于校正视频数据中的传输错误的传输视频帧分解部分，在校正了传输错误之后检测校正的视频数据中的错误，并且仅提取无错误视频帧数据，用于产生由要发送的视频帧数据组成的视频帧的发送视频帧产生部分，用于控制要传送的另一个终端的控制信号和附加数据的纠错码;以及视频控制部分用于指示从所接收的视频数据中提取无错误的视频帧数据，并根据控制信号控制要发送的视频帧数据。

5. 发明授权

US07917778B2 Semiconductor integrated circuit and method for controlling semiconductor integrated circuit 有权
标题翻译：半导体集成电路及半导体集成电路控制方法
公开(公告)号：US07917778B2
公开(公告)日：2011-03-29
申请号：US12035120
申请日：2008-02-21
申请人： Masahiro Tatsumi
发明人： Masahiro Tatsumi
IPC分类号： G06F1/26
CPC分类号： G06F1/3203 , G06F1/3287 , H03K19/0016 , Y02D10/171
摘要： Herein disclosed is a method for controlling a semiconductor integrated circuit having plural domains, the method including controlling plural power supplies which supply power to the plural domains, controlling an asynchronous bridge section being provided between each of the domains, receiving and transmitting data for dynamically changing a power supply voltage of at least one of the domains, wherein, when a power supply voltage of one of the domains is substantially equal to a power supply voltage of the other domains, switching the power supply paths so as to supply the power supply voltage from one power supply to at least two of the domains, and switching the data paths so as to receive and transmit data between the at least two of the domains by bypassing the asynchronous bridge section.
摘要翻译：这里公开了一种用于控制具有多个域的半导体集成电路的方法，该方法包括：控制向多个域提供电力的多个电源，控制在每个域之间提供的异步电桥部分，接收和发送用于动态变化的数据至少一个畴的电源电压，其中当一个畴的电源电压基本上等于其他区域的电源电压时，切换供电路径以便提供电源电压从一个电源到至少两个域，并且切换数据路径，以便通过绕过异步电桥部分来接收和发送至少两个域之间的数据。

6. 发明授权

US07847441B2 Semiconductor integrated circuit 有权
标题翻译：半导体集成电路
公开(公告)号：US07847441B2
公开(公告)日：2010-12-07
申请号：US12339613
申请日：2008-12-19
申请人： Masahiro Tatsumi , Takeshi Ishibashi
发明人： Masahiro Tatsumi , Takeshi Ishibashi
IPC分类号： H01H9/54
CPC分类号： G06F1/3203 , G06F1/3287 , Y02D10/171 , Y10T307/76 , Y10T307/944
摘要： A semiconductor integrated circuit includes a plurality of circuit blocks; a plurality of power switches configured to supply power or cut power supply to the corresponding circuit blocks on a circuit-block-by-circuit-block basis in accordance with logic states of first control signals; a power switch controller configured to select, upon receipt of a second control signal, which power switches to control from among the plurality of power switches, and output third control signals instructing the selected power switches to supply power or cut power supply; and a first protection circuit provided between the power switches and the power switch controller, the first protection circuit being configured to output the first control signals, which are obtained by converting the logic states of the third control signals, to the selected power switches.
摘要翻译：半导体集成电路包括多个电路块; 多个电源开关，被配置为根据第一控制信号的逻辑状态逐个电路块地向相应的电路块供电或切断电源; 电源开关控制器，被配置为在接收到第二控制信号时，从多个电力开关中选择哪个电力切换到控制，并输出指示所选择的电力开关供电或切断电源的第三控制信号; 以及第一保护电路，设置在电源开关和电源开关控制器之间，第一保护电路被配置为将通过将第三控制信号的逻辑状态转换而获得的第一控制信号输出到所选择的电力开关。

7. 发明申请

US20100231044A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20100231044A1
公开(公告)日：2010-09-16
申请号：US12788114
申请日：2010-05-26
申请人： Masahiro TATSUMI , Takashi Shikata
发明人： Masahiro TATSUMI , Takashi Shikata
IPC分类号： H02J1/00
CPC分类号： G06F1/3203 , G06F1/26 , G06F1/3287 , H02J9/005 , H03K19/0008 , H03K19/0016 , Y02D10/171 , Y10T307/469 , Y10T307/484
摘要： A power gating circuit is provided one by one corresponding to each of a plurality of power domains of which power may be on/off-controlled included in a semiconductor device, and these power gating circuits are connected in accordance with inclusion relation of the power domains, and thereby, a power management unit controlling power supply to the plurality of power domains is configured, as a result that the power management unit performing power supply control depending on power control specification may be designed easily.
摘要翻译：一个电源门控电路被提供一个对应于功率可以被接通/断开控制的多个功率域中的每一个包括在半导体器件中，并且这些电源门控电路根据电源域的包含关系来连接，从而配置控制对多个电力域的供电的电力管理单元，由此可以容易地设计根据功率控制规格执行电力供应控制的电力管理单元。

8. 发明授权

US07548655B2 Image still area determination device 失效
标题翻译：图像静止区确定装置
公开(公告)号：US07548655B2
公开(公告)日：2009-06-16
申请号：US11207903
申请日：2005-08-22
申请人： Masahiro Tatsumi , Masayuki Tsuji
发明人： Masahiro Tatsumi , Masayuki Tsuji
IPC分类号： G06K9/36
CPC分类号： H04N7/012 , H04N5/21
摘要： In order to reduce the flicker and blur of a result obtained by, for example, converting an interlace scan image into a progressive scan image, an image still area determination device comprises a unit for calculating the average value of the values of the relevant pixel and pixels adjacent to the pixel in each of the current frame image and a frame image immediately before it, a unit for calculating a difference between the average values of a pair of pixels located in the same position of each of two frame images and a unit for determining a still area in each of the two frame images, using its output and a predetermined threshold value.
摘要翻译：为了减少通过例如将隔行扫描图像转换为逐行扫描图像所获得的结果的闪烁和模糊，图像静止区域确定装置包括用于计算相关像素的值的平均值的单元，以及与当前帧图像的每一个中的像素相邻的像素和紧邻其前的帧图像的像素，用于计算位于两个帧图像中的每一帧的相同位置的一对像素的平均值之间的差的单元，以及用于使用其输出和预定阈值来确定两个帧图像中的每一个中的静止区域。

9. 发明申请

US20070171301A1 Image static area determination apparatus and interlace progressive image transform apparatus 审中-公开
标题翻译：图像静态区域确定装置和隔行渐进式图像变换装置
公开(公告)号：US20070171301A1
公开(公告)日：2007-07-26
申请号：US11413191
申请日：2006-04-28
申请人： Masahiro Tatsumi
发明人： Masahiro Tatsumi
IPC分类号： H04N7/01
CPC分类号： H04N5/144 , H04N7/012 , H04N19/112 , H04N19/16 , H04N19/17 , H04N19/543 , H04N19/59 , H04N21/2368 , H04N21/4341 , H04N21/44008 , H04N21/4402
摘要： A unit for generating a pseudo image of an earlier field image by interpolation from a later field image in two consecutive field images in an interlace scanning system, and a unit of determining a static area in the images upon receipt of the input of a current frame image, a previous frame image, an earlier field image, and a pseudo-field image are included. A motion which cannot be detected between frame images can be detected by comparing an earlier field image with apseudo-field image.
摘要翻译：一种用于通过在隔行扫描系统中的两个连续的场图像中从稍后的场图像进行插值来生成较早的场图像的伪图像的单元，以及在接收到当前帧的输入时确定图像中的静态区域的单元图像，前一帧图像，较早的场图像和伪场图像。可以通过将早期的场图像与伪场图像进行比较来检测帧图像之间无法检测的运动。

10. 发明申请

US20060274158A1 Image still area determination device 失效
公开(公告)号：US20060274158A1
公开(公告)日：2006-12-07
申请号：US11207903
申请日：2005-08-22
申请人： Masahiro Tatsumi , Masayuki Tsuji
发明人： Masahiro Tatsumi , Masayuki Tsuji
IPC分类号： H04N5/228
CPC分类号： H04N7/012 , H04N5/21
摘要： In order to reduce the flicker and blur of a result obtained by, for example, converting an interlace scan image into a progressive scan image, an image still area determination device comprises a unit for calculating the average value of the values of the relevant pixel and pixels adjacent to the pixel in each of the current frame image and a frame image immediately before it, a unit for calculating a difference between the average values of a pair of pixels located in the same position of each of two frame images and a unit for determining a still area in each of the two frame images, using its output and a predetermined threshold value.

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