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1. 发明专利

JP2008211792A Output architecture for lcd panel column driver 有权
标题翻译：液晶面板驱动器的输出结构
公开(公告)号：JP2008211792A
公开(公告)日：2008-09-11
申请号：JP2008039903
申请日：2008-02-21
申请人： Stmicroelectronics Asia Pacific Pte Ltd , エスティーマイクロエレクトロニクスアジアパシフィックピーティーイーリミテッドSTMicroelectronics Asia Pacific Pte Ltd
发明人： GUEDON YANNICK , DARMAWAN YOSEPH ADHI
IPC分类号： H03K17/687 , H03M1/66
CPC分类号： H03M1/06 , H03M1/662
摘要： PROBLEM TO BE SOLVED: To provide an improved digital to analog converter circuit of an LCD panel column driver. SOLUTION: The digital to analog converter (DAC) circuit operates over an upper range and a lower range. An upper voltage node is designated AVDD; a middle voltage node is designated HVDD; and a lower voltage node designated ground. An upper DAC stage has at least one NMOS transistors that produces an output to an upper range output node when the output is in the upper range. A lower DAC stage has at least one PMOS transistors that produces an output to a lower range output node when the output is in the lower range. A body bias control circuit couples the body of the upper NMOS transistor to a voltage source equal to HVDD-Vbe and connects the body of the lower PMOS transistor to voltage source equal to HVDD+Vbe. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种改进的LCD面板列驱动器的数模转换器电路。
解决方案：数模转换器（DAC）电路在上限和下限范围内工作。上电压节点被指定为AVDD; 中间电压节点被指定为HVDD; 和一个较低的电压节点指定为地。上DAC DAC具有至少一个NMOS晶体管，当输出处于上限范围时，该晶体管产生输出到较高范围输出节点。较低的DAC级具有至少一个PMOS晶体管，当输出处于较低范围时，其产生输出到较低范围输出节点。体偏置控制电路将上NMOS晶体管的主体耦合到等于HVDD-Vbe的电压源，并将下PMOS晶体管的主体连接到等于HVDD + Vbe的电压源。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2006203906A System and method for enhancing multi-speaker playback 审中-公开
标题翻译：用于增强多扬声器播放的系统和方法
公开(公告)号：JP2006203906A
公开(公告)日：2006-08-03
申请号：JP2006012868
申请日：2006-01-20
申请人： Stmicroelectronics Asia Pacific Pte Ltd , エスティーマイクロエレクトロニクスアジアパシフィックピーティーイーリミテッドSTMicroelectronics Asia Pacific Pte Ltd
发明人： WU YUAN , GEORGE SAPNA
IPC分类号： H04S7/00 , H04S5/02
CPC分类号： H04S3/002
摘要： PROBLEM TO BE SOLVED: To solve a problem of stereo sound playback in at least 5.1 speakers system and resolve scalability issues in standpoints of calculation and memory use. SOLUTION: The invention adopts a multi-band processing to allow to handle different frequency bands separately. This achieves better channel separation when more than one dominant signals exist in an arbitrary time. Since chances in which a dominant band falls into different frequency bands as the number of the frequency bands increases, uncertainness in decoding decreases. A problem of a plurality of dominant signals is decreased by implementing slow attenuation of surround signal when one dominant central signal exists and vice versa. This is based on an assumption that not all dominant signals are always active. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：解决至少5.1扬声器系统中的立体声播放问题，并解决计算和存储使用的观点的可扩展性问题。解决方案：本发明采用多频带处理，分别处理不同的频带。当在任意时间内存在多个主导信号时，这实现了更好的信道分离。由于随着频带数的增加，主频带落入不同的频带，因此解码的不确定性降低。当存在一个主要中心信号时，通过实施环绕信号的缓慢衰减来减少多个主要信号的问题，反之亦然。这是基于一个假设，并不是所有的主要信号总是活跃的。版权所有（C）2006，JPO＆NCIPI

3. 发明申请

WO2002096116A1 MOTION ESTIMATION USING PACKED OPERATIONS 审中-公开
标题翻译：使用包装操作的运动估计
公开(公告)号：WO2002096116A1
公开(公告)日：2002-11-28
申请号：PCT/SG2001/000096
申请日：2001-05-18
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD , PU, Tian, Yan , ALVAREZ-TINOCO, Antonio, Mario
发明人： PU, Tian, Yan , ALVAREZ-TINOCO, Antonio, Mario
IPC分类号： H04N7/26
CPC分类号： H04N19/423 , H04N19/433 , H04N19/523 , H04N19/61
摘要： The invention relates to a method of motion estimation for use in a video picture encoder. A first macroblock of a present picture is compared with a plurality of macroblocks within a search window of a previous or next picture for determining a second macroblock within the search window which is spatially displaced from the first macroblock by an amount represented by a motion vector at a full pixel resolution level. The comparison of the present picture and the previous or next picture is performed by the encoder using packed operations. The method includes the step of storing each pixel of the first macroblock or the search window using two bytes per pixel for avoiding byte misalignment during the packed operations.
摘要翻译：本发明涉及一种在视频图像编码器中使用的运动估计方法。将当前图像的第一宏块与先前或下一图像的搜索窗口内的多个宏块进行比较，以确定搜索窗口内的第二宏块，该第二宏块在空间上从第一宏块移位由运动矢量表示的量全像素分辨率级别。当前图像与前一图像或下一图像的比较由编码器使用打包操作执行。该方法包括以下步骤：使用每像素两个字节存储第一宏块或搜索窗口的每个像素，以避免打包操作期间的字节未对准。

4. 发明申请

WO2002067183A1 CIRCUIT, METHOD AND SYSTEM FOR GENERATING A NON-LINEAR TRANSFER CHARACTERISTIC 审中-公开
标题翻译：用于生成非线性传输特性的电路，方法和系统
公开(公告)号：WO2002067183A1
公开(公告)日：2002-08-29
申请号：PCT/SG2001/000025
申请日：2001-02-20
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD , CIROT, Eric, Yves, Serge , TAN, Sze, Kwang , PADALA, Mallikarjuna, Rao
发明人： CIROT, Eric, Yves, Serge , TAN, Sze, Kwang , PADALA, Mallikarjuna, Rao
IPC分类号： G06G7/28
CPC分类号： G06G7/28
摘要： A circuit, method and system for generating a non-linear transfer characteristic, including, a plurality of current mirror circuits in parallel, each current mirror circuit having an offset current applied to an ouptut terminal of an output-side transistor of the current mirror circuit for controlling an output current thereof, wherein the offset current of each current mirror circuit is set to a respective predetermined level, whereby the transfer characteristic is generated by summing the respective output currents of the current mirror circuits in a piece-wise manner.
摘要翻译：一种用于产生非线性传输特性的电路，方法和系统，包括并联的多个电流镜电路，每个电流镜电路具有施加到电流镜电路的输出侧晶体管的漏极端的偏移电流用于控制其输出电流，其中每个电流镜电路的偏移电流被设置为相应的预定电平，由此通过以分段方式对电流镜电路的相应输出电流求和来产生传输特性。

5. 发明申请

WO2004042602A1 APPARATUS TO IMPLEMENT DUAL HASH ALGORITHM 审中-公开
标题翻译：实现双重哈希算法的设备
公开(公告)号：WO2004042602A1
公开(公告)日：2004-05-21
申请号：PCT/SG2002/000245
申请日：2002-10-21
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD. , PLESSIER, Bernard , MING, Kiat. Yap
发明人： PLESSIER, Bernard , MING, Kiat. Yap
IPC分类号： G06F17/10
CPC分类号： H04L9/0643 , H04L2209/04 , H04L2209/12
摘要： Apparatus is disclosed which is arranged to accept digital data as an input, and to process said data according to one of either the Secure Hash Algorithm (SHA-1) or Message Digest (MD5) algorithm to produce a fixed length output word. The apparatus includes a pluraity of rotational registers for storing data, one of the registers being arranged to receive the input data, and data stores for initialisation of some of said plurality of registers according to whether the SHA-1 or MD5 algorithm is used. The data stores include fixed data relating to SHA-1 and MD5 operation. Also included is a plurality of dedicated combinatorial logic circuits arranged to perform logic operations on data stored in selected ones of said plurality of registers.
摘要翻译：公开了被设置为接受数字数据作为输入并且根据安全散列算法（SHA-1）或消息摘要（MD5）算法之一处理所述数据以产生固定长度输出字的装置。该装置包括用于存储数据的旋转寄存器，根据是否使用SHA-1或MD5算法，寄存器中的一个被布置为接收输入数据，以及用于初始化所述多个寄存器中的一些的数据存储。数据存储包括与SHA-1和MD5操作有关的固定数据。还包括多个专用组合逻辑电路，其被布置为对存储在所述多个寄存器中的选定寄存器中的数据执行逻辑运算。

6. 发明申请

WO2002093774A1 ECHO CANCELLER AND A METHOD OF CANCELLING ECHO 审中-公开
标题翻译： ECHO CANCELLER和取消ECHO的方法
公开(公告)号：WO2002093774A1
公开(公告)日：2002-11-21
申请号：PCT/SG2001/000093
申请日：2001-05-17
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD , TIAN, Wen, Shun , ALVAREZ-TINOCO, Antonio, Mario
发明人： TIAN, Wen, Shun , ALVAREZ-TINOCO, Antonio, Mario
IPC分类号： H04B3/23
CPC分类号： H04M9/082 , H04B3/23
摘要： In a communications system having incoming communications signals and outgoing communications signals the outgoing communications signals may undesirably include an echo signal derived from the incoming communications signals. Accordingly, echo cancellation techniques may be applied in the communications system, incluiding generating weighting filter coefficients based on linear prodictive coding coefficients calculated from a block comprising a plurality of sequential samples of the incoming communications signals. The incoming communications signals are filtered through a weighting filter utilising the weighting filter coefficients to produce a weighted incoming communications signals. Estimated echo signals are generated by filtering the incoming communications signals through an adaptive transversal filter, the adaptive transversal filter using adaptive filter coefficients. Then, the estimated echo signals can be subtracted from the outgoing communications signals to produce error signals. Advantageously, the adaptive filter coefficients are determined for each sample in said block on the basis of the weighted incoming communications signals and the error signals.
摘要翻译：在具有输入通信信号和输出通信信号的通信系统中，输出通信信号可能不期望地包括从输入通信信号导出的回波信号。因此，可以在通信系统中应用回波消除技术，基于从包括进入通信信号的多个连续采样的块计算的线性产生编码系数来生成加权滤波器系数。输入的通信信号通过使用加权滤波器系数的加权滤波器进行滤波，以产生加权的进入通信信号。通过自适应横向滤波器滤波输入的通信信号，使用自适应滤波器系数的自适应横向滤波器来产生估计回波信号。然后，可以从输出通信信号中减去估计的回波信号以产生误差信号。有利地，基于加权的进入通信信号和误差信号，为所述块中的每个采样确定自适应滤波器系数。

7. 发明申请

WO2007083019A2 PROCEDE DE TRAITEMENT D'UNE IMAGE NUMERIQUE, EN PARTICULIER LE TRAITEMENT DES ZONES DE CONTOUR, ET DISPOSITIF CORRESPONDANT 审中-公开
标题翻译：用于处理数字图像的方法，特别是用于处理轮廓区域的方法以及相关装置
公开(公告)号：WO2007083019A2
公开(公告)日：2007-07-26
申请号：PCT/FR2007/000082
申请日：2007-01-17
申请人： STMICROELECTRONICS SA , STMICROELECTRONICS ASIA PACIFIC PTE LTD , LEBOWSKY, Fritz , HUANG, Yong
发明人： LEBOWSKY, Fritz , HUANG, Yong
IPC分类号： H04N5/208
CPC分类号： H04N5/208
摘要： L' invention porte sur un procédé de traitement d 'une image numérique qui comporte au moins une zone de contour, comprenant un traitement de netteté de la zone de contours. Le traitement de netteté comporte une conversion des informations de niveau de pixels de la zone de contour en des informations principales initiales (étape 2), comprises entre une valeur minimale, par exemple 0 et une valeur principale fonction de l'amplitude du contour, un sous-traitement de netteté effectué sur ces informations principales initiales de façon à obtenir des informations principales finales (étapes 3 à 10), et une conversion des informations principales finales en des informations finales de niveaux (étape 11).
摘要翻译：本发明涉及一种用于处理包括至少一个轮廓区域的数字图像的装置，包括轮廓区域的锐度处理。锐度处理包括将轮廓区域的像素级的数据转换为初始主数据（步骤2），基于轮廓的幅度在最小值（例如0）和主值之间进行测距，锐度子处理对所述初始主数据执行以获得最终主数据（步骤3至10），并将最终主数据转换为最终数据级（步骤11）。

8. 发明申请

WO2003052898A1 TRANSIENT VOLTAGE CLAMPING CIRCUIT 审中-公开
标题翻译：瞬态电压钳位电路
公开(公告)号：WO2003052898A1
公开(公告)日：2003-06-26
申请号：PCT/SG2001/000253
申请日：2001-12-14
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD , RANA, Sakti, Pada
发明人： RANA, Sakti, Pada
IPC分类号： H02H9/04
CPC分类号： H02H9/041 , H02H7/1227
摘要： A circuit (12) for transient voltage clamping, the circuit being internal to a motor driver ASIC (10) for a hard drive and comprising: a power transistor (MO) for sinking a power supply voltage (V pwr ) subjected to transient variation; a reference circuit for deriving a first reference voltage (V ref ) from a second reference voltage (V bg ) and the power supply voltage (V pwr ); and an amplifier circuit (13) for receiving the first reference voltage (V ref ) as input and for driving the power transistor (MO).
摘要翻译：一种用于瞬态电压钳位的电路（12），所述电路位于用于硬盘驱动器的电动机驱动器ASIC（10）的内部，并且包括：用于吸收经受瞬时变化的电源电压（Vpwr）的功率晶体管（MO）用于从第二参考电压（Vbg）和电源电压（Vpwr）导出第一参考电压（Vref）的参考电路; 以及用于接收作为输入并驱动功率晶体管（MO）的第一参考电压（Vref）的放大器电路（13）。

9. 发明申请

WO2002101726A1 UNIFIED FILTER BANK FOR AUDIO CODING 审中-公开
标题翻译：用于音频编码的统一过滤器银行
公开(公告)号：WO2002101726A1
公开(公告)日：2002-12-19
申请号：PCT/SG2001/000113
申请日：2001-06-08
申请人： STMICROELECTRONICS ASIA PACIFIC PTE LTD , ABSAR, Mohammed, Javed , GEORGE, Sapna
发明人： ABSAR, Mohammed, Javed , GEORGE, Sapna
IPC分类号： G10L19/02
CPC分类号： G10L19/0208
摘要： A unified filter bank for use in encoding and decoding MPEG-1 audio data, wherein input audio data is encoded into coded audio data and the coded audio data is subsequently decoded into output audio data. The unified filter bank includes a plurality of filters, with each filter of the plurality of filters being a cosine modulation of a prototype filter. The unified filter bank is operational as an analysis filter bank during audio data encoding and as a synthesis filter bank during audio data decoding, wherein the unified filter bank is effective to substantially eliminate the effects of aliasing, phase distortion and amplitude distortion in the output audio data.
摘要翻译：用于对MPEG-1音频数据进行编码和解码的统一滤波器组，其中将输入音频数据编码为经编码的音频数据，随后将经编码的音频数据解码为输出音频数据。统一滤波器组包括多个滤波器，多个滤波器的每个滤波器是原型滤波器的余弦调制。在音频数据编码期间，统一的滤波器组可用作分析滤波器组，并且在音频数据解码期间用作合成滤波器组，其中统一滤波器组有效地基本上消除了输出音频中的混叠，相位失真和幅度失真的影响数据。

10. 发明申请

WO2002073823A1 HIGH PERFORMANCE W-CDMA SLOT SYNCHRONISATION FOR INITIAL CELL SEARCH WITH REDUCED HARDWARE 审中-公开
标题翻译：用于具有减少硬件的初始细胞搜索的高性能W-CDMA插槽同步
公开(公告)号：WO2002073823A1
公开(公告)日：2002-09-19
申请号：PCT/SG2001/000039
申请日：2001-03-13
申请人： STMicroelectronics Asia Pacific Pte Ltd , OH, Ser, Wah , ALDRIDGE, Chris
发明人： OH, Ser, Wah , ALDRIDGE, Chris
IPC分类号： H04B1/707
CPC分类号： H04B1/7083 , H04B1/70735 , H04B1/708
摘要： The present invention outlines two preferred embodiements for slot synchronisation of an initial cell search for Third-Generation Partnership Project (3GPP) Wideband Code-Division Multiple Access (W-CDMA) Frequency Division Duplex (FDD) mode system. Two Finite Impulse Response (FIR) filters are used to correlate the synchronisation codes transmited in the downlink (forward link). Sign bit is taken after the first FIR to significantly reduced the hardware requirements for the second FIR, and thus the whole system. The same hardware is repeated for the real (I) and imaginary (Q) parts of the signal before the subsequent processes. The correlated results from the second FIR can be further processed using two different alogrithms. The first is to add a square operation to the correlated results whilst the second is to take the magnitude before passing to the next stage. Regardless of which algorithm is adopted, the results are accumulated (I and Q), instead of averaged, and stored in a memory location for each successive correlation over the same location in different slots. The physical-layer processor (PLP) then reads the accumulated results from the memory location and searches for the peak position. This peak position corresponds to the actual slot boundary.
摘要翻译：本发明概述了用于第三代合作伙伴计划（3GPP）宽带码分多址（W-CDMA）频分双工（FDD）模式系统的初始小区搜索的时隙同步的两个优选实施例。两个有限脉冲响应（FIR）滤波器用于将在下行链路（前向链路）传输的同步码相关联。第一个FIR后采用符号位，大大降低了第二个FIR的硬件要求，从而降低了整个系统的硬件要求。在后续处理之前，对于信号的实数（I）和虚部（Q）部分重复相同的硬件。来自第二FIR的相关结果可以使用两种不同的算法来进一步处理。第一个是对相关结果添加平方运算，而第二个是在通过下一阶段之前采取大小。无论采用哪种算法，结果都被累积（I和Q）而不是平均值，并且存储在不同时隙中相同位置上的每个连续相关的存储器位置。物理层处理器（PLP）然后从存储器位置读取累积的结果并搜索峰值位置。该峰值位置对应于实际的槽边界。

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