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1. 发明申请

US20070001174A1 Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides 有权
标题翻译：使用无氢溅射氮化物钝化宽带隙基半导体器件
公开(公告)号：US20070001174A1
公开(公告)日：2007-01-04
申请号：US11169378
申请日：2005-06-29
申请人： Zoltan Ring , Helmut Hagleitner , Jason Henning , Andrew Mackenzie , Scott Allen , Scott Sheppard , Richard Smith , Saptharishi Sriram , Allan Ward
发明人： Zoltan Ring , Helmut Hagleitner , Jason Henning , Andrew Mackenzie , Scott Allen , Scott Sheppard , Richard Smith , Saptharishi Sriram , Allan Ward
IPC分类号： H01L29/15 , H01L31/0256
CPC分类号： H01L21/045 , H01L21/3145 , H01L21/318 , H01L21/3185 , H01L29/1608 , H01L29/2003 , H01L29/24
摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
摘要翻译：公开了钝化的半导体结构和相关方法。该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

2. 发明授权

US07858460B2 Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides 有权
标题翻译：使用无氢溅射氮化物钝化宽带隙基半导体器件
公开(公告)号：US07858460B2
公开(公告)日：2010-12-28
申请号：US12404557
申请日：2009-03-16
申请人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
发明人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L21/045 , H01L21/3145 , H01L21/318 , H01L21/3185 , H01L29/1608 , H01L29/2003 , H01L29/24
摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
摘要翻译：公开了钝化的半导体结构和相关方法。该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

3. 发明授权

US07525122B2 Passivation of wide band-gap based semiconductor devices with hydrogen-free sputtered nitrides 有权
标题翻译：使用无氢溅射氮化物钝化宽带隙基半导体器件
公开(公告)号：US07525122B2
公开(公告)日：2009-04-28
申请号：US11169378
申请日：2005-06-29
申请人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
发明人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
IPC分类号： H01L29/15 , H01L31/0256
CPC分类号： H01L21/045 , H01L21/3145 , H01L21/318 , H01L21/3185 , H01L29/1608 , H01L29/2003 , H01L29/24
摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
摘要翻译：公开了钝化的半导体结构和相关方法。该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

4. 发明申请

US20090215280A1 Passivation of Wide Band-Gap Based Semiconductor Devices with Hydrogen-Free Sputtered Nitrides 有权
标题翻译：使用无氢溅射氮化物钝化宽带隙半导体器件
公开(公告)号：US20090215280A1
公开(公告)日：2009-08-27
申请号：US12404557
申请日：2009-03-16
申请人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
发明人： Zoltan Ring , Helmut Hagleitner , Jason Patrick Henning , Andrew Mackenzie , Scott Allen , Scott Thomas Sheppard , Richard Peter Smith , Saptharishi Sriram , Allan Ward, III
IPC分类号： H01L21/04
CPC分类号： H01L21/045 , H01L21/3145 , H01L21/318 , H01L21/3185 , H01L29/1608 , H01L29/2003 , H01L29/24
摘要： A passivated semiconductor structure and associated method are disclosed. The structure includes a silicon carbide substrate or layer; an oxidation layer on the silicon carbide substrate for lowering the interface density between the silicon carbide substrate and the thermal oxidation layer; a first sputtered non-stoichiometric silicon nitride layer on the thermal oxidation layer for reducing parasitic capacitance and minimizing device trapping; a second sputtered non-stoichiometric silicon nitride layer on the first layer for positioning subsequent passivation layers further from the substrate without encapsulating the structure; a sputtered stoichiometric silicon nitride layer on the second sputtered layer for encapsulating the structure and for enhancing the hydrogen barrier properties of the passivation layers; and a chemical vapor deposited environmental barrier layer of stoichiometric silicon nitride for step coverage and crack prevention on the encapsulant layer.
摘要翻译：公开了钝化的半导体结构和相关方法。该结构包括碳化硅衬底或层; 在碳化硅衬底上的氧化层，用于降低碳化硅衬底和热氧化层之间的界面密度; 在热氧化层上的第一溅射的非化学计量的氮化硅层，用于减少寄生电容并最小化器件捕获; 在所述第一层上的第二溅射的非化学计量的氮化硅层，用于使所述衬底进一步从所述衬底定位以后的钝化层而不封装所述结构; 在第二溅射层上溅射化学计量的氮化硅层，用于封装该结构并增强钝化层的氢阻挡性能; 以及化学气相沉积的化学计量氮化硅的环境阻挡层，用于在封装层上进行步骤覆盖和防裂。

5. 发明申请

US20110193135A1 Methods of Forming Contact Structures Including Alternating Metal and Silicon Layers and Related Devices 有权
标题翻译：形成包括交替金属和硅层及相关器件的接触结构的方法
公开(公告)号：US20110193135A1
公开(公告)日：2011-08-11
申请号：US12704013
申请日：2010-02-11
申请人： Helmut Hagleitner , Zoltan Ring , Scott Sheppard , Jason Henning , Jason Gurganus , Dan Namishia
发明人： Helmut Hagleitner , Zoltan Ring , Scott Sheppard , Jason Henning , Jason Gurganus , Dan Namishia
IPC分类号： H01L29/205 , H01L21/285
CPC分类号： H01L29/452 , H01L21/28575 , H01L29/2003 , H01L29/66462 , H01L29/7787 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a semiconductor device, the method comprising providing a semiconductor layer, and providing a first layer of a first metal on the semiconductor layer. A second layer may be provided on the first layer of the first metal. The second layer may include a layer of silicon and a layer of a second metal, and the first and second metals may be different. The first metal may be titanium and the second metal may be nickel. Related devices, structures, and other methods are also discussed.
摘要翻译：一种形成半导体器件的方法，所述方法包括提供半导体层，以及在所述半导体层上提供第一金属的第一层。可以在第一金属的第一层上提供第二层。第二层可以包括硅层和第二金属层，第一和第二金属可以不同。第一金属可以是钛，第二金属可以是镍。还讨论了相关设备，结构和其他方法。

6. 发明授权

US08563372B2 Methods of forming contact structures including alternating metal and silicon layers and related devices 有权
标题翻译：形成接触结构的方法，包括交替的金属和硅层以及相关器件
公开(公告)号：US08563372B2
公开(公告)日：2013-10-22
申请号：US12704013
申请日：2010-02-11
申请人： Helmut Hagleitner , Zoltan Ring , Scott Sheppard , Jason Henning , Jason Gurganus , Dan Namishia
发明人： Helmut Hagleitner , Zoltan Ring , Scott Sheppard , Jason Henning , Jason Gurganus , Dan Namishia
IPC分类号： H01L21/338
CPC分类号： H01L29/452 , H01L21/28575 , H01L29/2003 , H01L29/66462 , H01L29/7787 , H01L2924/0002 , H01L2924/00
摘要： A method of forming a semiconductor device, the method comprising providing a semiconductor layer, and providing a first layer of a first metal on the semiconductor layer. A second layer may be provided on the first layer of the first metal. The second layer may include a layer of silicon and a layer of a second metal, and the first and second metals may be different. The first metal may be titanium and the second metal may be nickel. Related devices, structures, and other methods are also discussed.
摘要翻译：一种形成半导体器件的方法，所述方法包括提供半导体层，以及在所述半导体层上提供第一金属的第一层。可以在第一金属的第一层上提供第二层。第二层可以包括硅层和第二金属层，第一和第二金属可以不同。第一金属可以是钛，第二金属可以是镍。还讨论了相关设备，结构和其他方法。

7. 发明申请

US20060065910A1 Method of forming vias in silicon carbide and resulting devices and circuits 有权
公开(公告)号：US20060065910A1
公开(公告)日：2006-03-30
申请号：US11067543
申请日：2005-02-25
申请人： Zoltan Ring , Scott Sheppard , Helmut Hagleitner
发明人： Zoltan Ring , Scott Sheppard , Helmut Hagleitner
IPC分类号： H01L31/0328 , H01L21/336
CPC分类号： H01L21/76898 , H01L21/0445 , H01L21/3065 , H01L29/1608 , H01L29/2003 , H01L29/4175 , H01L29/452 , H01L29/7787 , H01L29/812
摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, metallizing the via provides an electrical path from the first surface of the substrate to the metal contact and to the device on the second surface of the substrate.

8. 发明授权

US07125786B2 Method of forming vias in silicon carbide and resulting devices and circuits 有权
标题翻译：在碳化硅和所产生的器件和电路中形成通孔的方法
公开(公告)号：US07125786B2
公开(公告)日：2006-10-24
申请号：US11067543
申请日：2005-02-25
申请人： Zoltan Ring , Scott Sheppard , Helmut Hagleitner
发明人： Zoltan Ring , Scott Sheppard , Helmut Hagleitner
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , H01L21/0445 , H01L21/3065 , H01L29/1608 , H01L29/2003 , H01L29/4175 , H01L29/452 , H01L29/7787 , H01L29/812
摘要： A method of fabricating an integrated circuit on a silicon carbide substrate is disclosed that eliminates wire bonding that can otherwise cause undesired inductance. The method includes fabricating a semiconductor device in epitaxial layers on a surface of a silicon carbide substrate and with at least one metal contact for the device on the uppermost surface of the epitaxial layer. The opposite surface of the substrate is then ground and polished until it is substantially transparent. The method then includes masking the polished surface of the silicon carbide substrate to define a predetermined location for at least one via that is opposite the device metal contact on the uppermost surface of the epitaxial layer and etching the desired via in steps. The first etching step etches through the silicon carbide substrate at the desired masked location until the etch reaches the epitaxial layer. The second etching step etches through the epitaxial layer to the device contacts. Finally, metallizing the via provides an electrical path from the first surface of the substrate to the metal contact and to the device on the second surface of the substrate.
摘要翻译：公开了一种在碳化硅衬底上制造集成电路的方法，其消除了否则会导致不期望的电感的引线接合。该方法包括在硅碳化物衬底的表面上制造外延层中的半导体器件，并且在外延层的最上表面上具有用于器件的至少一个金属接触。然后将基板的相对表面研磨抛光直到基本透明。该方法然后包括掩盖碳化硅衬底的抛光表面，以限定用于至少一个通孔的预定位置，其与外延层的最上表面上的器件金属接触相对，并在步骤中蚀刻所需的通孔。第一蚀刻步骤在期望的掩蔽位置上蚀刻通过碳化硅衬底，直到蚀刻到达外延层。第二蚀刻步骤通过外延层蚀刻到器件触点。最后，通孔的金属化提供了从衬底的第一表面到金属接触件和衬底的第二表面上的器件的电路径。

9. 发明申请

US20060255366A1 Nitride-based transistors with a protective layer and a low-damage recess 有权
标题翻译：具有保护层和低损伤凹陷的氮化物基晶体管
公开(公告)号：US20060255366A1
公开(公告)日：2006-11-16
申请号：US11358241
申请日：2006-02-21
申请人： Scott Sheppard , Richard Smith , Zoltan Ring
发明人： Scott Sheppard , Richard Smith , Zoltan Ring
IPC分类号： H01L29/739
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/7783
摘要： Transistors are fabricated by forming a nitride-based semiconductor barrier layer on a nitride-based semiconductor channel layer and forming a protective layer on a gate region of the nitride-based semiconductor barrier layer. Patterned ohmic contact metal regions are formed on the barrier layer and annealed to provide first and second ohmic contacts. The annealing is carried out with the protective layer on the gate region. A gate contact is also formed on the gate region of the barrier layer. Transistors having protective layer in the gate region are also provided as are transistors having a barrier layer with a sheet resistance substantially the same as an as-grown sheet resistance of the barrier layer.
摘要翻译：晶体管通过在氮化物基半导体沟道层上形成氮化物基半导体势垒层并在氮化物基半导体势垒层的栅极区上形成保护层来制造晶体管。图案化的欧姆接触金属区形成在阻挡层上并退火以提供第一和第二欧姆接触。退火是在栅极区域上的保护层进行的。栅极接触也形成在阻挡层的栅极区上。还提供了在栅极区域中具有保护层的晶体管，就像具有阻挡层的晶体管一样，薄膜电阻基本上与阻挡层的片状电阻基本相同。

10. 发明申请

US20050170574A1 Nitride-based transistors with a protective layer and a low-damage recess and methods of fabrication thereof 有权
标题翻译：具有保护层和低损伤凹陷的氮化物基晶体管及其制造方法
公开(公告)号：US20050170574A1
公开(公告)日：2005-08-04
申请号：US10758871
申请日：2004-01-16
申请人： Scott Sheppard , Richard Smith , Zoltan Ring
发明人： Scott Sheppard , Richard Smith , Zoltan Ring
IPC分类号： H01L21/335 , H01L29/20 , H01L29/778 , H01L21/338
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/7783
摘要： Transistors are fabricated by forming a nitride-based semiconductor barrier layer on a nitride-based semiconductor channel layer and forming a protective layer on a gate region of the nitride-based semiconductor barrier layer. Patterned ohmic contact metal regions are formed on the barrier layer and annealed to provide first and second ohmic contacts. The annealing is carried out with the protective layer on the gate region. A gate contact is also formed on the gate region of the barrier layer. Transistors having protective layer in the gate region are also provided as are transistors having a barrier layer with a sheet resistance substantially the same as an as-grown sheet resistance of the barrier layer.
摘要翻译：晶体管通过在氮化物基半导体沟道层上形成氮化物基半导体势垒层并在氮化物基半导体势垒层的栅极区上形成保护层来制造晶体管。图案化的欧姆接触金属区形成在阻挡层上并退火以提供第一和第二欧姆接触。退火是在栅极区域上的保护层进行的。栅极接触也形成在阻挡层的栅极区上。还提供了在栅极区域中具有保护层的晶体管，就像具有阻挡层的晶体管一样，薄膜电阻基本上与阻挡层的片状电阻基本相同。

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