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    • 4. 发明授权
    • Circuit and method for controlling hysteresis for bilevel signal transitions
    • 用于控制双电平信号转换的滞后的电路和方法
    • US07382167B1
    • 2008-06-03
    • US11102876
    • 2005-04-11
    • Christopher Bruce UmmingerZhizhong HouJames Herr
    • Christopher Bruce UmmingerZhizhong HouJames Herr
    • H03K5/22H03K5/153
    • H03K5/088G06F1/28H03K3/02337
    • An output signal is controlled with adjustable hysteresis in response to a variable voltage input signal. One or more signals derived from the input signal are respectively compared with first and second reference voltages of different magnitudes. The output signal changes from a first state to a second state when one of the derived signals reaches a first reference voltage level threshold, and changes from the second state to the first state when a second one of the derived signals reaches a second reference level voltage threshold. A first derived signal may be varied to have a voltage magnitude that is greater or lesser than the voltage magnitude of a second derived signal while maintaining a positive hysteresis level. The circuit may be configured to output a signal representing an undervoltage and/or overvoltage condition of the input signal.
    • 响应于可变电压输入信号,输出信号被控制具有可调滞后。 从输入信号导出的一个或多个信号分别与不同幅度的第一和第二参考电压进行比较。 当所导出的信号之一达到第一参考电压电平阈值时,输出信号从第一状态变为第二状态,并且当第二导出信号达到第二参考电平电压时,输出信号从第二状态变为第一状态 阈。 可以改变第一导出信号以具有大于或小于第二导出信号的电压幅度的电压幅度,同时保持正滞后电平。 电路可以被配置为输出表示输入信号的欠压和/或过电压状态的信号。