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1. 发明申请

US20120314286A1 Semiconductor Inspection And Metrology System Using Laser Pulse Multiplier 有权
标题翻译：使用激光脉冲乘法器的半导体检测和计量系统
公开(公告)号：US20120314286A1
公开(公告)日：2012-12-13
申请号：US13487075
申请日：2012-06-01
申请人： Yung-Ho Chuang , J. Joseph Armstrong , Justin Dianhuan Liou , Vladimir Dribinski , David L. Brown
发明人： Yung-Ho Chuang , J. Joseph Armstrong , Justin Dianhuan Liou , Vladimir Dribinski , David L. Brown
IPC分类号： G02B27/28
CPC分类号： H01S3/0057 , G01N21/21 , G01N21/9501 , G01N2201/06113 , G01N2201/0683 , G01N2201/0697 , G02B5/0816 , G02B5/3083 , G02B27/281 , G02B27/283 , G02B27/286 , H01S3/083
摘要： A pulse multiplier includes a polarizing beam splitter, a wave plate, and a set of mirrors. The polarizing beam splitter receives an input laser pulse. The wave plate receives light from the polarized beam splitter and generates a first set of pulses and a second set of pulses. The first set of pulses has a different polarization than the second set of pulses. The polarizing beam splitter, the wave plate, and the set of mirrors create a ring cavity. The polarizing beam splitter transmits the first set of pulses as an output of the pulse multiplier and reflects the second set of pulses into the ring cavity. This pulse multiplier can inexpensively reduce the peak power per pulse while increasing the number of pulses per second with minimal total power loss.
摘要翻译：脉冲倍增器包括偏振分束器，波片和一组反射镜。偏振分束器接收输入激光脉冲。波片从偏振分束器接收光，并产生第一组脉冲和第二组脉冲。第一组脉冲具有与第二组脉冲不同的极化。偏振分束器，波片和一组反射镜产生环形腔。偏振分束器将第一组脉冲发射为脉冲乘法器的输出，并将第二组脉冲反射到环形腔中。该脉冲倍增器可以以最小的总功率损耗来降低每脉冲的峰值功率，同时增加每秒的脉冲数。

2. 发明授权

US09793673B2 Semiconductor inspection and metrology system using laser pulse multiplier 有权
公开(公告)号：US09793673B2
公开(公告)日：2017-10-17
申请号：US13487075
申请日：2012-06-01
申请人： Yung-Ho Chuang , J. Joseph Armstrong , Justin Dianhuan Liou , Vladimir Dribinski , David L. Brown
发明人： Yung-Ho Chuang , J. Joseph Armstrong , Justin Dianhuan Liou , Vladimir Dribinski , David L. Brown
IPC分类号： G02B5/30 , G02B27/28 , H01S3/05 , H01S3/083 , H01S3/00 , G01N21/21 , G01N21/95 , G02B5/08
CPC分类号： H01S3/0057 , G01N21/21 , G01N21/9501 , G01N2201/06113 , G01N2201/0683 , G01N2201/0697 , G02B5/0816 , G02B5/3083 , G02B27/281 , G02B27/283 , G02B27/286 , H01S3/083
摘要： A pulse multiplier includes a polarizing beam splitter, a wave plate, and a set of mirrors. The polarizing beam splitter receives an input laser pulse. The wave plate receives light from the polarized beam splitter and generates a first set of pulses and a second set of pulses. The first set of pulses has a different polarization than the second set of pulses. The polarizing beam splitter, the wave plate, and the set of mirrors create a ring cavity. The polarizing beam splitter transmits the first set of pulses as an output of the pulse multiplier and reflects the second set of pulses into the ring cavity. This pulse multiplier can inexpensively reduce the peak power per pulse while increasing the number of pulses per second with minimal total power loss.

3. 发明授权

US6137570A System and method for analyzing topological features on a surface 失效
标题翻译：用于分析表面拓扑特征的系统和方法
公开(公告)号：US6137570A
公开(公告)日：2000-10-24
申请号：US107391
申请日：1998-06-30
申请人： Yung-Ho Chuang , J. Joseph Armstrong , David L. Brown , Jason Z. Lin , Bin-Ming Benjamin Tsai
发明人： Yung-Ho Chuang , J. Joseph Armstrong , David L. Brown , Jason Z. Lin , Bin-Ming Benjamin Tsai
IPC分类号： G01B11/30 , G01N21/95 , G01N21/956 , H01L21/66 , G01N21/00
CPC分类号： G01N21/9501 , G01N21/95607 , G01N21/95623 , G03F7/7065 , G01N21/4788 , G01N21/95692
摘要： Disclosed is a method and apparatus for using far field scattered and diffracted light to determine whether a collection of topological features on a surface (e.g., a semiconductor wafer) conforms to an expected condition or quality. This determination is made by comparing the far field diffraction pattern of a surface under consideration with a corresponding diffraction pattern (a "baseline"). If the baseline diffraction pattern and far field diffraction pattern varies by more than a prescribed amount or in characteristic ways, it is inferred that the surface features are defective. The method may be implemented as a die-to-die comparison of far field diffraction patterns of two dies on a semiconductor wafer. The portion of the far field scattered and diffracted light sensitive to a relevant condition or quality can also be reimaged to obtain an improved signal-to-noise ratio.
摘要翻译：公开了一种使用远场散射和衍射光来确定表面（例如，半导体晶片）上的拓扑特征的集合是否符合预期状态或质量的方法和装置。通过将考虑的表面的远场衍射图与相应的衍射图案（“基线”）进行比较来进行该确定。如果基线衍射图案和远场衍射图案变化超过规定量或以特征方式，则推断表面特征是有缺陷的。该方法可以实现为半导体晶片上的两个管芯的远场衍射图案的管芯与管芯的比较。对于相关条件或质量敏感的远场散射和衍射光的部分也可以被重新成像以获得改善的信噪比。

4. 发明申请

US20110073982A1 Inspection system using back side illuminated linear sensor 审中-公开
标题翻译：使用背面照明线性传感器的检查系统
公开(公告)号：US20110073982A1
公开(公告)日：2011-03-31
申请号：US11805907
申请日：2007-05-25
申请人： J. Joseph Armstrong , Yung-Ho Chuang , David L. Brown
发明人： J. Joseph Armstrong , Yung-Ho Chuang , David L. Brown
IPC分类号： H01L31/00 , G01N21/00
CPC分类号： G01N21/9501 , G01N21/95623 , G01N2021/8822 , G01N2021/95676
摘要： An improved inspection system using back-side illuminated linear sensing for propagating charge through a sensor is provided. Focusing optics may be used with a back side illuminated linear sensor to inspect specimens, the back side illuminated linear sensor operating to advance an accumulated charge from one side of each pixel to the other side. The design comprises controlling voltage profiles across pixel gates from one side to the other side in order to advance charge between to a charge accumulation region. Controlling voltage profiles comprises attaching a continuous polysilicon gate across each pixel within a back side illuminated linear sensor array. Polysilicon gates and voltages applied thereto enable efficient electron advancement using a controlled voltage profile.
摘要翻译：提供了一种使用背面照明线性检测的改进的检测系统，用于通过传感器传播电荷。聚焦光学元件可以与背面照明的线性传感器一起使用以检查样品，背面照射的线性传感器操作以将累积的电荷从每个像素的一侧推进到另一侧。该设计包括控制从一侧到另一侧的像素栅极之间的电压分布，以便在电荷累积区域之间推进电荷。控制电压分布包括在背侧照明线性传感器阵列内的每个像素上连接连续的多晶硅栅极。多晶硅栅极和施加于其上的电压使得能够使用受控电压分布进行有效的电子前进。

5. 发明申请

US20100188655A1 TDI Sensor Modules With Localized Driving And Signal Processing Circuitry For High Speed Inspection 有权
标题翻译： TDI传感器模块具有局部驱动和信号处理电路，用于高速检测
公开(公告)号：US20100188655A1
公开(公告)日：2010-07-29
申请号：US12575376
申请日：2009-10-07
申请人： David L. Brown , Yung-Ho Chuang
发明人： David L. Brown , Yung-Ho Chuang
IPC分类号： G01N21/00 , H01L31/02
CPC分类号： H04N7/18 , G01N21/9501 , G01N2021/8887 , G01N2021/95676 , H04N5/3694 , H04N5/372
摘要： An inspection system for inspecting a surface of a wafer/mask/reticle can include a modular array. The modular array can include a plurality of time delay integration (TDI) sensor modules, each TDI sensor module having a TDI sensor and a plurality of localized circuits for driving and processing the TDI sensor. At least one of the localized circuits can control a clock associated with the TDI sensor. At least one light pipe can be used to distribute a source illumination to the plurality of TDI sensor modules. The plurality of TDI sensor modules can be positioned capture a same inspection region or different inspection regions. The plurality of TDI sensor modules can be identical or provide for different integration stages. Spacing of the modules can be arranged to provide 100% coverage of the inspection region in one pass or for fractional coverage requiring two or more passes for complete coverage.
摘要翻译：用于检查晶片/掩模/掩模版的表面的检查系统可以包括模块阵列。模块化阵列可以包括多个时间延迟积分（TDI）传感器模块，每个TDI传感器模块具有TDI传感器和用于驱动和处理TDI传感器的多个局部电路。至少一个局部电路可以控制与TDI传感器相关的时钟。可以使用至少一个光管来将源照明分配给多个TDI传感器模块。多个TDI传感器模块可以被定位成捕获相同的检查区域或不同的检查区域。多个TDI传感器模块可以相同或提供不同的集成阶段。可以设置模块的间隔，以便在一次通过中提供100％的检查区域覆盖，或者为了完全覆盖而需要两次或更多次通过的分数覆盖。

6. 发明授权

US08553217B2 EUV high throughput inspection system for defect detection on patterned EUV masks, mask blanks, and wafers 有权
标题翻译： EUV高通量检测系统，用于在图案化的EUV掩模，掩模毛坯和晶片上进行缺陷检测
公开(公告)号：US08553217B2
公开(公告)日：2013-10-08
申请号：US12812950
申请日：2010-06-18
申请人： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bin-Ming Benjamin Tsai , David L. Brown
发明人： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bin-Ming Benjamin Tsai , David L. Brown
IPC分类号： G01N21/00
CPC分类号： G01N21/95 , G01N21/8806 , G01N21/9501 , G01N21/956 , G01N2021/95676 , G01N2201/068 , G03F1/84 , G03F7/70616 , H05G2/008
摘要： Inspection of EUV patterned masks, blank masks, and patterned wafers generated by EUV patterned masks requires high magnification and a large field of view at the image plane. An EUV inspection system can include a light source directed to an inspected surface, a detector for detecting light deflected from the inspected surface, and an optic configuration for directing the light from the inspected surface to the detector. In particular, the detector can include a plurality of sensor modules. Additionally, the optic configuration can include a plurality of mirrors that provide magnification of at least 100× within an optical path less than 5 meters long. In one embodiment, the optical path is approximately 2-3 meters long.
摘要翻译：对EUV图案化掩模，空白掩模和由EUV图案化掩模生成的图案化晶片的检查需要高倍率和在图像平面上的大视场。 EUV检查系统可以包括指向检查表面的光源，用于检测从被检查表面偏转的光的检测器和用于将来自被检查表面的光引导到检测器的光学配置。特别地，检测器可以包括多个传感器模块。另外，光学配置可以包括在小于5米长的光路内提供至少100倍的放大倍数的多个反射镜。在一个实施例中，光路大约2-3米长。

7. 发明授权

US07528943B2 Method and apparatus for simultaneous high-speed acquisition of multiple images 有权
标题翻译：同时高速采集多幅图像的方法和装置
公开(公告)号：US07528943B2
公开(公告)日：2009-05-05
申请号：US11318715
申请日：2005-12-27
申请人： David L. Brown , Yung-Ho Chuang
发明人： David L. Brown , Yung-Ho Chuang
IPC分类号： G01N21/00
CPC分类号： G01N21/95607
摘要： A method and apparatus for simultaneous high-speed inspection and acquisition of multiple data channels is provided. The method and apparatus enables inspecting semiconductor wafers and reticles and comprises converting a single image region into two image sections, reorienting one image into a transposed configuration enabling simultaneous scanning of two inspected object locations with a single sensor, and controlling acquisition parameters for a second image by using information collected from a first image in a feedback arrangement. The design provides a dual-linear or time-delay-integration sensor operating in a split readout configuration mode to simultaneously provide data from two regions of the sensor using two sets of readout circuitry.
摘要翻译：提供了用于同时高速检查和获取多个数据信道的方法和装置。该方法和装置能够检测半导体晶片和标线，并且包括将单个图像区域转换成两个图像部分，将一个图像重新定向为转置配置，使得能够利用单个传感器同时扫描两个检查对象位置，并且控制第二图像的获取参数通过使用从反馈安排中的第一图像收集的信息。该设计提供了以分离读出配置模式工作的双线性或时间延迟积分传感器，以使用两组读出电路同时从传感器的两个区域提供数据。

8. 发明授权

US08624971B2 TDI sensor modules with localized driving and signal processing circuitry for high speed inspection 有权
标题翻译：具有局部驱动和信号处理电路的TDI传感器模块，用于高速检测
公开(公告)号：US08624971B2
公开(公告)日：2014-01-07
申请号：US12575376
申请日：2009-10-07
申请人： David L. Brown , Yung-Ho Chuang
发明人： David L. Brown , Yung-Ho Chuang
IPC分类号： H04N7/18
CPC分类号： H04N7/18 , G01N21/9501 , G01N2021/8887 , G01N2021/95676 , H04N5/3694 , H04N5/372
摘要： An inspection system for inspecting a surface of a wafer/mask/reticle can include a modular array. The modular array can include a plurality of time delay integration (TDI) sensor modules, each TDI sensor module having a TDI sensor and a plurality of localized circuits for driving and processing the TDI sensor. At least one of the localized circuits can control a clock associated with the TDI sensor. At least one light pipe can be used to distribute a source illumination to the plurality of TDI sensor modules. The plurality of TDI sensor modules can be positioned capture a same inspection region or different inspection regions. The plurality of TDI sensor modules can be identical or provide for different integration stages. Spacing of the modules can be arranged to provide 100% coverage of the inspection region in one pass or for fractional coverage requiring two or more passes for complete coverage.
摘要翻译：用于检查晶片/掩模/掩模版的表面的检查系统可以包括模块阵列。模块化阵列可以包括多个时间延迟积分（TDI）传感器模块，每个TDI传感器模块具有TDI传感器和用于驱动和处理TDI传感器的多个局部电路。至少一个局部电路可以控制与TDI传感器相关的时钟。可以使用至少一个光管来将源照明分配给多个TDI传感器模块。多个TDI传感器模块可以被定位成捕获相同的检查区域或不同的检查区域。多个TDI传感器模块可以相同或提供不同的集成阶段。可以设置模块的间隔，以便在一次通过中提供100％的检查区域覆盖，或者为了完全覆盖而需要两次或更多次通过的分数覆盖。

9. 发明申请

US20110116077A1 EUV High Throughput Inspection System For Defect Detection On Patterned EUV Masks, Mask Blanks, And Wafers 有权
标题翻译： EUV高通量检测系统，用于在图案化的EUV面罩，面罩空白和晶圆上进行缺陷检测
公开(公告)号：US20110116077A1
公开(公告)日：2011-05-19
申请号：US12812950
申请日：2010-06-18
申请人： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bing-Ming Benjamin Tsai , David L. Brown
发明人： Yung-Ho Chuang , Richard W. Solarz , David R. Shafer , Bing-Ming Benjamin Tsai , David L. Brown
IPC分类号： G01N21/956
CPC分类号： G01N21/95 , G01N21/8806 , G01N21/9501 , G01N21/956 , G01N2021/95676 , G01N2201/068 , G03F1/84 , G03F7/70616 , H05G2/008
摘要： Inspection of EUV patterned masks, blank masks, and patterned wafers generated by EUV patterned masks requires high magnification and a large field of view at the image plane. An EUV inspection system can include a light source directed to an inspected surface, a detector for detecting light deflected from the inspected surface, and an optic configuration for directing the light from the inspected surface to the detector. In particular, the detector can include a plurality of sensor modules. Additionally, the optic configuration can include a plurality of mirrors that provide magnification of at least 100× within an optical path less than 5 meters long. In one embodiment, the optical path is approximately 2-3 meters long.
摘要翻译：对EUV图案化掩模，空白掩模和由EUV图案化掩模生成的图案化晶片的检查需要高倍率和在图像平面上的大视场。 EUV检查系统可以包括指向检查表面的光源，用于检测从被检查表面偏转的光的检测器和用于将来自被检查表面的光引导到检测器的光学配置。特别地，检测器可以包括多个传感器模块。另外，光学配置可以包括在小于5米长的光路内提供至少100倍的放大倍数的多个反射镜。在一个实施例中，光路大约2-3米长。

10. 发明授权

US08739333B2 Bedbug infestation-resistant bed 有权
标题翻译：虫蛀抗虫床
公开(公告)号：US08739333B2
公开(公告)日：2014-06-03
申请号：US12798497
申请日：2010-04-05
申请人： Michelle Boyle , David L. Brown
发明人： Michelle Boyle , David L. Brown
IPC分类号： A47C19/00
CPC分类号： A47C19/024 , A47C19/021 , A47C27/14 , A47G9/0292
摘要： A bedbug-resistant bed comprises a horizontal right-rectangular frame including four open angled rigid members pair-wise joined at their eight termini in four corners; one or more support members extending across the frame near the upper edge of the joined angled members; and a right-rectangular wire mesh infill expanse extending within a perimeter of the frame and affixed along upper inwardly extending expanses of the joined angled members. A bedbug-resistant bed in another embodiment comprises two right-rectangular horizontal frames differentially dimensioned in three orthogonal axes such that one of the two frames is fittable within a three-dimensional enclosure defined by the other of the two frames for stowage of the bed, the two frames configured in deployment in a proximate side by side arrangement, each frame including four open angled rigid members joined at their eight termini to define a perimeter and four corners of the frame, each frame further including one or more solid support members extending across the frame, and each frame further including four legs extending downwardly from the four corners of the frame.
摘要翻译：防虫床包括一个水平的右矩形框架，包括四个开放角度的刚性构件，它们在四个角落的八个端部成对连接; 一个或多个支撑构件在接合的成角度构件的上边缘附近延伸穿过框架; 并且在框架的周边内延伸并沿着连接的倾斜构件的上部向内延伸的宽度固定的正方形的丝网填充物。在另一实施例中的防虫床包括两个在三个正交轴线上有差异尺寸的右矩形水平框架，使得两个框架中的一个框架可装配在由两个框架中的另一个框架限定的三维外壳中，用于存放床，两个框架被构造为以邻近的并排配置展开，每个框架包括四个开口成角度的刚性构件，其在其八个端部处连接以限定框架的周边和四个角部，每个框架还包括一个或多个贯穿框架，并且每个框架还包括从框架的四个角落向下延伸的四个腿。

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