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    • 2. 发明授权
    • Method for manufacturing display device
    • 显示装置制造方法
    • US08035107B2
    • 2011-10-11
    • US12368759
    • 2009-02-10
    • Takafumi MizoguchiMayumi MikamiYumiko Saito
    • Takafumi MizoguchiMayumi MikamiYumiko Saito
    • H01L29/786
    • H01L21/764H01L27/1288
    • A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, a second conductive film, and a first resist mask are formed; first etching is performed to expose at least a surface of the first conductive film; second etching accompanied by side etching is performed on part of the first conductive film to form a gate electrode layer; a second resist mask is formed; third etching is performed to form a source and drain electrode layers, a source and drain regions, and a semiconductor layer; a second insulating film is formed; an opening portion is formed in the second insulating film to partially expose the source or drain electrode layer; a pixel electrode is selectively formed in the opening portion and over the second insulating film; and a supporting portion formed using the gate electrode layer is formed in a region overlapping with the opening portion.
    • 形成第一导电膜,第一绝缘膜,半导体膜,杂质半导体膜,第二导电膜和第一抗蚀剂掩模; 执行第一蚀刻以暴露第一导电膜的至少一个表面; 在第一导电膜的一部分上进行伴随着侧蚀刻的第二蚀刻,以形成栅电极层; 形成第二抗蚀剂掩模; 执行第三蚀刻以形成源极和漏极电极层,源极和漏极区域以及半导体层; 形成第二绝缘膜; 在第二绝缘膜中形成开口部分以部分地暴露源极或漏极电极层; 在开口部分和第二绝缘膜上选择性地形成像素电极; 并且在与开口部重叠的区域中形成使用该栅电极层形成的支撑部。
    • 3. 发明授权
    • Method for manufacturing display device
    • 显示装置制造方法
    • US08901561B2
    • 2014-12-02
    • US13238019
    • 2011-09-21
    • Takafumi MizoguchiMayumi MikamiYumiko Saito
    • Takafumi MizoguchiMayumi MikamiYumiko Saito
    • H01L33/08H01L27/12H01L21/764
    • H01L21/764H01L27/1288
    • A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, a second conductive film, and a first resist mask are formed; first etching is performed to expose at least a surface of the first conductive film; second etching accompanied by side etching is performed on part of the first conductive film to form a gate electrode layer; a second resist mask is formed; third etching is performed to form a source and drain electrode layers, a source and drain regions, and a semiconductor layer; a second insulating film is formed; an opening portion is formed in the second insulating film to partially expose the source or drain electrode layer; a pixel electrode is selectively formed in the opening portion and over the second insulating film; and a supporting portion formed using the gate electrode layer is formed in a region overlapping with the opening portion.
    • 形成第一导电膜,第一绝缘膜,半导体膜,杂质半导体膜,第二导电膜和第一抗蚀剂掩模; 执行第一蚀刻以暴露第一导电膜的至少一个表面; 在第一导电膜的一部分上进行伴随着侧蚀刻的第二蚀刻,以形成栅电极层; 形成第二抗蚀剂掩模; 执行第三蚀刻以形成源极和漏极电极层,源极和漏极区域以及半导体层; 形成第二绝缘膜; 在第二绝缘膜中形成开口部分以部分地暴露源极或漏极电极层; 在开口部分和第二绝缘膜上选择性地形成像素电极; 并且在与开口部重叠的区域中形成使用该栅电极层形成的支撑部。
    • 5. 发明申请
    • METHOD FOR MANUFACTURING DISPLAY DEVICE
    • 制造显示装置的方法
    • US20090212296A1
    • 2009-08-27
    • US12368759
    • 2009-02-10
    • Takafumi MizoguchiMayumi MikamiYumiko Saito
    • Takafumi MizoguchiMayumi MikamiYumiko Saito
    • H01L29/786H01L33/00
    • H01L21/764H01L27/1288
    • A first conductive film, a first insulating film, a semiconductor film, an impurity semiconductor film, a second conductive film, and a first resist mask are formed; first etching is performed to expose at least a surface of the first conductive film; second etching accompanied by side etching is performed on part of the first conductive film to form a gate electrode layer; a second resist mask is formed; third etching is performed to form a source and drain electrode layers, a source and drain regions, and a semiconductor layer; a second insulating film is formed; an opening portion is formed in the second insulating film to partially expose the source or drain electrode layer; a pixel electrode is selectively formed in the opening portion and over the second insulating film; and a supporting portion formed using the gate electrode layer is formed in a region overlapping with the opening portion.
    • 形成第一导电膜,第一绝缘膜,半导体膜,杂质半导体膜,第二导电膜和第一抗蚀剂掩模; 执行第一蚀刻以暴露第一导电膜的至少一个表面; 在第一导电膜的一部分上进行伴随着侧蚀刻的第二蚀刻,以形成栅电极层; 形成第二抗蚀剂掩模; 执行第三蚀刻以形成源极和漏极电极层,源极和漏极区域以及半导体层; 形成第二绝缘膜; 在第二绝缘膜中形成开口部分以部分地暴露源极或漏极电极层; 在开口部分和第二绝缘膜上选择性地形成像素电极; 并且在与开口部重叠的区域中形成使用该栅电极层形成的支撑部。
    • 7. 发明授权
    • Method for manufacturing semiconductor device
    • 制造半导体器件的方法
    • US08435870B2
    • 2013-05-07
    • US12767108
    • 2010-04-26
    • Mayumi MikamiKonami Izumi
    • Mayumi MikamiKonami Izumi
    • H01L21/768H01L21/20
    • H01L27/1266H01L21/76814H01L25/0657H01L27/124H01L2225/06513H01L2225/06541H01L2924/0002H01L2924/00
    • A method for manufacturing a semiconductor device includes: forming a first and second layers not firmly adhering to each other over a substrate; forming a first semiconductor element layer and a first insulating layer over the second layer; forming a hole reaching the first layer in the first insulating layer; oxidizing the first layer exposed at a bottom of the hole; forming a wiring electrically connected to the first semiconductor element layer over the first insulating layer and in the hole; and separating the first layer and the substrate from the second layer and the first semiconductor element layer and expose the wiring. Further, another method includes providing an anisotropic conductive adhesive between a second semiconductor element layer separated through a manufacturing process similar to the above and the wiring, whereby the first and second semiconductor element layers are electrically connected through the anisotropic conductive adhesive and the wiring.
    • 一种制造半导体器件的方法包括:在衬底上形成彼此不牢固地粘合的第一和第二层; 在所述第二层上形成第一半导体元件层和第一绝缘层; 在所述第一绝缘层中形成到达所述第一层的孔; 氧化暴露在孔底部的第一层; 在所述第一绝缘层和所述孔中形成与所述第一半导体元件层电连接的布线; 以及将所述第一层和所述衬底与所述第二层和所述第一半导体元件层分离并使所述布线露出。 此外,另一方法包括在通过类似于上述制造工艺分离的第二半导体元件层和布线之间提供各向异性导电粘合剂,由此第一和第二半导体元件层通过各向异性导电粘合剂和布线电连接。
    • 9. 发明申请
    • Micromachine and Method for Manufacturing the Same
    • 微机械及其制造方法
    • US20110281389A1
    • 2011-11-17
    • US13189734
    • 2011-07-25
    • Mayumi MikamiKonami Izumi
    • Mayumi MikamiKonami Izumi
    • H01L21/00
    • H01H59/0009B81B2201/018B81C1/00166H01H1/58H01H2001/0052H01H2001/0057Y10T29/49155
    • A structure which prevents thinning and disconnection of a wiring is provided, in a micromachine (MEMS structure body) formed with a surface micromachining technology. A wiring (upper auxiliary wiring) over a sacrificial layer is electrically connected to a different wiring (upper connection wiring) over the sacrificial layer, so that thinning, disconnection, and the like of the wiring formed over the sacrificial layer at a step portion generated due to the thickness of the sacrificial layer can be prevented. The wiring over the sacrificial layer is formed of the same conductive film as an upper driving electrode which is a movable electrode and is thus thin. However, the different wiring is formed over a structural layer, which is formed by a CVD method and has a rounded step, and has a thickness of 200 nm to 1 μm, whereby thinning, disconnection, and the like of the wiring can be further prevented.
    • 在形成有表面微机械加工技术的微型机械(MEMS机构)中,提供了防止配线断线和断线的结构。 在牺牲层之上的布线(上辅助布线)在牺牲层上电连接到不同的布线(上连接布线),从而在生成的台阶部分上形成在牺牲层上的布线的变薄,断开等 由于可以防止牺牲层的厚度。 牺牲层上的布线由与作为可动电极的上驱动电极相同的导电膜形成,因此薄。 然而,不同的布线形成在通过CVD法形成并具有圆形台阶的结构层上,并且具有200nm至1μm的厚度,从而可以进一步布线的变薄,断开等 防止了
    • 10. 发明授权
    • Method for manufacturing micromachine
    • 微机械制造方法
    • US08470629B2
    • 2013-06-25
    • US13189734
    • 2011-07-25
    • Mayumi MikamiKonami Izumi
    • Mayumi MikamiKonami Izumi
    • H01L21/00H01L21/302
    • H01H59/0009B81B2201/018B81C1/00166H01H1/58H01H2001/0052H01H2001/0057Y10T29/49155
    • A structure which prevents thinning and disconnection of a wiring is provided, in a micromachine (MEMS structure body) formed with a surface micromachining technology. A wiring (upper auxiliary wiring) over a sacrificial layer is electrically connected to a different wiring (upper connection wiring) over the sacrificial layer, so that thinning, disconnection, and the like of the wiring formed over the sacrificial layer at a step portion generated due to the thickness of the sacrificial layer can be prevented. The wiring over the sacrificial layer is formed of the same conductive film as an upper driving electrode which is a movable electrode and is thus thin. However, the different wiring is formed over a structural layer, which is formed by a CVD method and has a rounded step, and has a thickness of 200 nm to 1 μm, whereby thinning, disconnection, and the like of the wiring can be further prevented.
    • 在形成有表面微机械加工技术的微型机械(MEMS机构)中,提供了防止配线断线和断线的结构。 在牺牲层之上的布线(上辅助布线)在牺牲层上电连接到不同的布线(上连接布线),从而在生成的台阶部分上形成在牺牲层上的布线的变薄,断开等 由于可以防止牺牲层的厚度。 牺牲层上的布线由与作为可动电极的上驱动电极相同的导电膜形成,因此薄。 然而,不同的布线形成在通过CVD法形成并具有圆形台阶的结构层上,并且具有200nm至1μm的厚度,由此可以进一步布线的变薄,断开等 防止了