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1. 发明授权

US5020072A Semiconductor laser device 失效
标题翻译：半导体激光器件
公开(公告)号：US5020072A
公开(公告)日：1991-05-28
申请号：US401745
申请日：1989-09-01
申请人： Yuji Abe , Hiroshi Sugimoto , Kenichi Ohtsuka , Toshiyuki Oishi , Teruhito Matsui
发明人： Yuji Abe , Hiroshi Sugimoto , Kenichi Ohtsuka , Toshiyuki Oishi , Teruhito Matsui
IPC分类号： H01S5/00 , H01S5/12
CPC分类号： H01S5/12 , H01S5/1231 , H01S5/124 , H01S5/1243
摘要： A semiconductor laser device includes an active layer, a first semiconductor layer having a larger energy band gap than the active layer, a diffraction grating layer having a larger energy band gap than the active layer and a smaller energy band gap than the first semiconductor layer, and a second semiconductor layer having the same composition as the first semiconductor layer, successively grown on the active layer, parallel stripe grooves of predetermined period reaching the first semiconductor layer produced at the entire surface of the grown layers, a cladding layer having the same composition as the first semiconductor layer which is re-grown thereon, and a diffraction grating constituted by the remainder of the diffraction grating layer. The coupling coefficient of the light is determined by the film thickness of a layer produced between the active layer and the diffraction grating layer, and the amplitude of the diffraction grating is determined by the layer thickness of the diffraction grating layer. Therefore, the coupling coefficient can be set at a design value at high precision and at high reproducibility.
摘要翻译：半导体激光器件包括有源层，具有比有源层大的能带隙的第一半导体层，具有比有源层更大的能带隙的衍射光栅层和比第一半导体层更小的能带隙，以及具有与第一半导体层相同的组成的第二半导体层，在有源层上依次生长，在生长层的整个表面上到达第一半导体层的预定周期的平行条纹沟槽，具有相同组成的包覆层作为在其上重新生长的第一半导体层，以及由衍射光栅层的其余部分构成的衍射光栅。光的耦合系数由有源层和衍射光栅层之间产生的层的膜厚决定，衍射光栅的振幅由衍射光栅层的层厚决定。因此，可以以高精度和高重现性将耦合系数设定在设计值。

2. 发明授权

US5540345A Process of producing diffraction grating 失效
$Process of producing diffraction grating$
标题翻译：制作衍射光栅的工艺
公开(公告)号：US5540345A
公开(公告)日：1996-07-30
申请号：US172824
申请日：1993-12-27
申请人： Hiroshi Sugimoto , Teruhito Matsui , Ken-ichi Ohtsuka , Yuji Abe , Toshiyuki Ohishi
发明人： Hiroshi Sugimoto , Teruhito Matsui , Ken-ichi Ohtsuka , Yuji Abe , Toshiyuki Ohishi
IPC分类号： G02B6/12 , G02B6/124 , G03F7/00 , H01S5/12 , H01L21/308 , C03C15/00
CPC分类号： G02B6/124 , G03F7/001 , G02B2006/12176 , G02B2006/12178 , H01S5/1231 , Y10S359/90
摘要： A process of producing a diffraction grating includes the steps of forming a coating layer on a first diffraction grating layer of a resin formed on a substrate without damaging the diffraction grating layer, removing a portion of the coating layer positioned on the first diffraction grating layer by etching to form a second diffraction grating layer of the coating layer having the reverse phase to that of the first diffraction grating layer, removing the first diffraction grating layer, and etching the substrate with a mask of the second diffraction grating layer, so that the diffraction grating having the reverse phase can be easily produced. When the first diffraction grating layer is left and both the first and second diffraction grating layers are used as a mask, the diffraction grating having a period half times as large as that of the first grating layer can be easily produced.
摘要翻译：制造衍射光栅的方法包括以下步骤：在不损坏衍射光栅层的基板上形成的树脂的第一衍射光栅层上形成涂层，通过以下步骤除去位于第一衍射光栅层上的涂层的一部分：蚀刻以形成具有与第一衍射光栅层的相反相位的涂层的第二衍射光栅层，去除第一衍射光栅层，并用第二衍射光栅层的掩模蚀刻衬底，使得衍射具有反相的光栅可以容易地产生。当剩下第一衍射光栅层并且将第一和第二衍射光栅层都用作掩模时，可以容易地产生具有与第一光栅层的周期相同的半周期的衍射光栅。

3. 发明授权

US5300190A Process of producing diffraction grating 失效
$Process of producing diffraction grating$
标题翻译：制作衍射光栅的工艺
公开(公告)号：US5300190A
公开(公告)日：1994-04-05
申请号：US947981
申请日：1992-09-21
申请人： Hiroshi Sugimoto , Teruhito Matsui , Ken-ichi Ohtsuka , Yuji Abe , Toshiyuki Ohishi
发明人： Hiroshi Sugimoto , Teruhito Matsui , Ken-ichi Ohtsuka , Yuji Abe , Toshiyuki Ohishi
IPC分类号： G02B6/12 , G02B6/124 , G03F7/00 , H01S5/12 , G02B5/18 , H01L21/308
CPC分类号： G02B6/124 , G03F7/001 , G02B2006/12176 , G02B2006/12178 , H01S5/1231 , Y10S359/90
摘要： A process of producing a diffraction grating comprises the steps of forming a coating layer on a first diffraction grating layer of a resin formed on a substrate without damaging the diffraction grating layer, removing a portion of the coating layer positioned on the first diffraction grating layer by etching to form a second diffraction grating layer of the coating layer having the reverse phase to that of the first diffraction grating layer, removing the first diffraction grating layer, and etching the substrate with a mask of the second diffraction grating layer, so that the diffraction grating having the reverse phase can be easily produced. When the first diffraction grating layer is left and both the first and second diffraction grating layers are used as a mask, the diffraction grating having a period half times as large as that of the first grating layer can be easily produced.
摘要翻译：制造衍射光栅的工艺包括以下步骤：在不损坏衍射光栅层的基板上形成的树脂的第一衍射光栅层上形成涂层，通过以下步骤除去位于第一衍射光栅层上的涂层的一部分：蚀刻以形成具有与第一衍射光栅层的相反相位的涂层的第二衍射光栅层，去除第一衍射光栅层，并用第二衍射光栅层的掩模蚀刻衬底，使得衍射具有反相的光栅可以容易地产生。当剩下第一衍射光栅层并且将第一和第二衍射光栅层都用作掩模时，可以容易地产生具有与第一光栅层的周期相同的半周期的衍射光栅。

4. 发明授权

US5036372A Heterojunction avalanche transistor 失效
标题翻译：异质结雪崩晶体管
公开(公告)号：US5036372A
公开(公告)日：1991-07-30
申请号：US579681
申请日：1990-09-10
申请人： Toshiyuki Ohishi , Yuji Abe , Hiroshi Sugimoto , Ken-ichi Ohisuka , Teruhito Matsui
发明人： Toshiyuki Ohishi , Yuji Abe , Hiroshi Sugimoto , Ken-ichi Ohisuka , Teruhito Matsui
IPC分类号： H01L29/68 , H01L29/205 , H01L29/73 , H01L29/732
CPC分类号： H01L29/7327 , H01L29/7313
摘要： An avalanche transistor has a heterojunction emitter-base junction. The avalanche transistor includes a spacer layer provided between an emitter layer and a base layer. The spacer layer has an energy band gap between that of the base layer and that of the emitter layer, a carrier concentration lower than that of the base layer, and a thickness so that the whole spacer layer becomes a depletion layer at thermal equillibrium so that a neutral region is produced in the spacer layer at a voltage lower than the threshold voltage of the emitter-base junction. Thus, the same element is both bistable with the base current as a parameter and has an S-shaped negative differential resistance with the base voltage as a parameter.
摘要翻译：雪崩晶体管具有异质结发射极 - 基极结。雪崩晶体管包括设置在发射极层和基极层之间的间隔层。间隔层在基底层和发射极层之间的能带隙，载流子浓度低于基底层的载流子浓度和厚度，使得整个间隔层成为热平衡的耗尽层，使得在间隔层中以低于发射极 - 基极结的阈值电压的电压产生中性区。因此，相同的元件与基极电流作为参数都是双稳态的，并且具有基极电压作为参数的S形负差分电阻。

5. 发明授权

US07564072B2 Semiconductor device having junction termination extension 有权
标题翻译：具有连接终端延伸的半导体器件
公开(公告)号：US07564072B2
公开(公告)日：2009-07-21
申请号：US11142322
申请日：2005-06-02
申请人： Kenichi Ohtsuka , Yoichiro Tarui , Yoshinori Matsuno , Kenichi Kuroda , Hiroshi Sugimoto
发明人： Kenichi Ohtsuka , Yoichiro Tarui , Yoshinori Matsuno , Kenichi Kuroda , Hiroshi Sugimoto
IPC分类号： H01L29/74
CPC分类号： H01L29/0619 , H01L29/1608 , H01L29/872 , Y10S388/917
摘要： A semiconductor device includes an anode electrode in Schottky contact with an n-type drift layer formed in an SiC substrate and a JTE region formed outside the anode electrode. The JTE region is made up of a first p-type zone formed in an upper portion of the drift layer under an edge of the anode electrode and a second p-type zone formed outside the first p-type zone having a lower surface impurity concentration than the first p-type zone. The second p-type zone is provided 15 μm or more outwardly away from the edge of the anode electrode. The surface impurity concentration of the first p-type zone ranges from 1.8×1013 to 4×1013 cm−2, and that of the second p-type zone ranges from 1×1013 to 2.5×1013 cm−2.
摘要翻译：半导体器件包括与形成在SiC衬底中的n型漂移层肖特基接触的阳极电极和形成在阳极电极外部的JTE区域。 JTE区域由在阳极电极的边缘的漂移层的上部形成的第一p型区域和形成在具有较低表面杂质浓度的第一p型区域外的第二p型区域构成比第一个p型区域。第二个p型区域距离阳极电极的边缘向外提供15个或更多个外部。第一p型区域的表面杂质浓度范围为1.8×1013〜4×1013cm-2，第二p型区域的表面杂质浓度为1×10 13〜2.5×10 13 cm -2。

6. 发明申请

US20090134404A1 SILICON CARBIDE SEMICONDUCTOR DEVICE 有权
标题翻译：硅碳化硅半导体器件
公开(公告)号：US20090134404A1
公开(公告)日：2009-05-28
申请号：US12066366
申请日：2006-04-24
申请人： Hiroshi Sugimoto , Yoshinori Matsuno , Kenichi Ohtsuka , Noboru Mikami , Kenichi Kuroda
发明人： Hiroshi Sugimoto , Yoshinori Matsuno , Kenichi Ohtsuka , Noboru Mikami , Kenichi Kuroda
IPC分类号： H01L29/24
CPC分类号： H01L29/8611 , H01L21/0445 , H01L29/045 , H01L29/0684 , H01L29/1608 , H01L29/6606
摘要： On a major surface of an n-type silicon carbide inclined substrate (2) is formed an n-type voltage-blocking layer (3) made of silicon carbide by means of epitaxial growth. On the n-type voltage-blocking layer (3) is formed a p-type silicon carbide region (4) rectangular when viewed from above. On the surface of the p-type silicon carbide region (4) is formed a p-type contact electrode (5). In the p-type silicon carbide region (4), the periphery of the p-type silicon carbide region (4) that is parallel with a (11-20) plane (14a) of the silicon carbide crystal, which is liable to cause avalanche breakdown, is located on the short side. In this manner, the dielectric strength of a silicon carbide semiconductor device can be improved.
摘要翻译：在n型碳化硅倾斜衬底（2）的主表面上通过外延生长形成由碳化硅制成的n型压阻层（3）。在从上方观察时，在n型电压阻挡层（3）上形成矩形的p型碳化硅区域（4）。在p型碳化硅区域（4）的表面上形成p型接触电极（5）。在p型碳化硅区域（4）中，与碳化硅晶体的（11-20）面（14a）平行的p型碳化硅区域（4）的周边易于引起雪崩破裂，位于短边。以这种方式，可以提高碳化硅半导体器件的介电强度。

7. 发明授权

US07847296B2 Silicon carbide semiconductor device 有权
标题翻译：碳化硅半导体器件
公开(公告)号：US07847296B2
公开(公告)日：2010-12-07
申请号：US12066366
申请日：2006-04-24
申请人： Hiroshi Sugimoto , Yoshinori Matsuno , Kenichi Ohtsuka , Noboru Mikami , Kenichi Kuroda
发明人： Hiroshi Sugimoto , Yoshinori Matsuno , Kenichi Ohtsuka , Noboru Mikami , Kenichi Kuroda
IPC分类号： H01L29/15
CPC分类号： H01L29/8611 , H01L21/0445 , H01L29/045 , H01L29/0684 , H01L29/1608 , H01L29/6606
摘要： On a major surface of an n-type silicon carbide inclined substrate (2) is formed an n-type voltage-blocking layer (3) made of silicon carbide by means of epitaxial growth. On the n-type voltage-blocking layer (3) is formed a p-type silicon carbide region (4) rectangular when viewed from above. On the surface of the p-type silicon carbide region (4) is formed a p-type contact electrode (5). In the p-type silicon carbide region (4), the periphery of the p-type silicon carbide region (4) that is parallel with a (11-20) plane (14a) of the silicon carbide crystal, which is liable to cause avalanche breakdown, is located on the short side. In this manner, the dielectric strength of a silicon carbide semiconductor device can be improved.
摘要翻译：在n型碳化硅倾斜衬底（2）的主表面上通过外延生长形成由碳化硅制成的n型压阻层（3）。在从上方观察时，在n型电压阻挡层（3）上形成矩形的p型碳化硅区域（4）。在p型碳化硅区域（4）的表面上形成p型接触电极（5）。在p型碳化硅区域（4）中，与碳化硅晶体的（11-20）面（14a）平行的p型碳化硅区域（4）的周边易于引起雪崩破裂，位于短边。以这种方式，可以提高碳化硅半导体器件的介电强度。

8. 发明申请

US20060118812A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20060118812A1
公开(公告)日：2006-06-08
申请号：US11142322
申请日：2005-06-02
申请人： Kenichi Ohtsuka , Yoichiro Tarui , Yoshinori Matsuno , Kenichi Kuroda , Hiroshi Sugimoto
发明人： Kenichi Ohtsuka , Yoichiro Tarui , Yoshinori Matsuno , Kenichi Kuroda , Hiroshi Sugimoto
IPC分类号： H01L29/74
CPC分类号： H01L29/0619 , H01L29/1608 , H01L29/872 , Y10S388/917
摘要： A semiconductor device includes an anode electrode in Schottky contact with an n-type drift layer formed in an SiC substrate and a JTE region formed outside the anode electrode. The JTE region is made up of a first p-type zone formed in an upper portion of the drift layer under an edge of the anode electrode and a second p-type zone formed outside the first p-type zone having a lower surface impurity concentration than the first p-type zone. The second p-type zone is provided 15 μm or more outwardly away from the edge of the anode electrode. The surface impurity concentration of the first p-type zone ranges from 1.8×1013 to 4×1013 cm−2, and that of the second p-type zone ranges from 1×1013 to 2.5×1013 cm−2.
摘要翻译：半导体器件包括与形成在SiC衬底中的n型漂移层肖特基接触的阳极电极和形成在阳极电极外部的JTE区域。 JTE区域由在阳极电极的边缘的漂移层的上部形成的第一p型区域和形成在具有较低表面杂质浓度的第一p型区域外的第二p型区域构成比第一个p型区域。第二个p型区域距离阳极电极的边缘向外提供15个或更多个外部。第一p型区域的表面杂质浓度范围为1.8×10 13〜4×10 -3 cm -2，而第二p型区域的表面杂质浓度为型区域范围为1×10 13至2.5×10 13 cm -2。

9. 发明申请

US20130299808A1 ORGANIC EL DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：有机EL显示装置及其制造方法
公开(公告)号：US20130299808A1
公开(公告)日：2013-11-14
申请号：US13980310
申请日：2012-01-31
申请人： Hiroshi Sugimoto , Tohru Sonoda
发明人： Hiroshi Sugimoto , Tohru Sonoda
IPC分类号： H01L51/52 , H01L51/56
CPC分类号： H01L51/5203 , H01L27/3258 , H01L51/5271 , H01L51/56 , H01L2251/5323
摘要： In an organic EL display device (100), an insulating layer (113) includes a first insulating film (113a) and a second insulating film (113b) provided thereabove, a plurality of upper electrodes (115c) are each provided to cover a corresponding one of a plurality of organic EL layers (115b), and a reflection film (114) is provided between the first insulating film (113a) and the second insulating film (113b), corresponding to a region N other than the a light emission region. The reflection film (114) reflects toward a sealing substrate (120) a portion of light generated in each organic EL layer (115b) which is diffused into the region N other than the light emission region so that the portion of the light is transmitted through a separation wall portion (116) and the sealing substrate (120) to be viewed as an image on the sealing substrate.
摘要翻译：在有机EL显示装置（100）中，绝缘层（113）包括设置在其上方的第一绝缘膜（113a）和第二绝缘膜（113b），多个上电极（115c）分别设置成覆盖相应的在第一绝缘膜（113a）和第二绝缘膜（113b）之间设置有多个有机EL层（115b）中的一个和反射膜（114），对应于除了发光区域。反射膜（114）朝向密封基板（120）反射在每个有机EL层（115b）中产生的一部分光，其被扩散到除了发光区域之外的区域N中，使得该部分光被透过分隔壁部分（116）和密封基板（120），以被视为密封基板上的图像。

10. 发明授权

US08284300B2 Electronic camera 有权
标题翻译：电子相机
公开(公告)号：US08284300B2
公开(公告)日：2012-10-09
申请号：US12541740
申请日：2009-08-14
申请人： Hiroshi Sugimoto , Takanori Sato
发明人： Hiroshi Sugimoto , Takanori Sato
IPC分类号： H04N5/235
CPC分类号： H04N5/23212 , H04N5/23219 , H04N5/23245 , H04N5/2628
摘要： An electronic camera includes an imaging device. The imaging device has an imaging surface irradiated with an optical image of an object scene. A CPU executes an AF process based on output of an AF evaluating circuit to adjust a position of a focus lens to a position to be optically converged on a specific object present in an object scene. Upon completion of the AF process, the CPU detects a distance from a lens distal end to the specific object by referencing a current position of the focus lens, and further detects brightness information of the object scene based on output of an AE/AWB evaluating circuit. Moreover, the CPU adjusts an imaging parameter by determining whether or not an object scene attribute including the detected distance and brightness information satisfies a predetermined condition.
摘要翻译：电子照相机包括成像装置。成像装置具有用物体场景的光学图像照射的成像表面。 CPU基于AF评估电路的输出执行AF处理，以将聚焦透镜的位置调整到光学会聚在存在于对象场景中的特定对象上的位置。在完成AF处理后，CPU通过参照聚焦透镜的当前位置来检测从透镜远端到特定物体的距离，并且还基于AE / AWB评估电路的输出来检测物体场景的亮度信息。此外，CPU通过确定包括检测到的距离和亮度信息的对象场景属性是否满足预定条件来调整成像参数。

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