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    • 2. 发明授权
    • Method of manufacturing core implanted semiconductor devices
    • 核心注入半导体器件的制造方法
    • US5670402A
    • 1997-09-23
    • US498885
    • 1995-07-06
    • Koichi SogawaYuichi Ando
    • Koichi SogawaYuichi Ando
    • G11C17/08H01L21/8242H01L21/8246H01L27/10H01L27/108H01L27/112
    • H01L27/112H01L27/1126
    • In a semiconductor device, N-type diffusion regions for providing an LDD structure are formed on a P-type substrate. A thick CVD deposited insulating film is formed on both the diffusion regions. A word line layer is formed on this deposited insulating film and a gate oxide film in a direction crossing the diffusion regions. Since the deposited insulating film is set to be thick, a capacity between one of the diffusion regions as a bit line layer and the word line layer is reduced so that a reading speed of the semiconductor device is improved. Further, a punch through proof pressure is increased since the diffusion regions have an LDD structure. Thus, it is possible to provide a planar cell structure which increases the reading speed and is advantageous in a fine structure. Another semiconductor device is also shown. A method for manufacturing the semiconductor device is further shown.
    • 在半导体器件中,在P型衬底上形成用于提供LDD结构的N型扩散区。 在两个扩散区上形成厚的CVD沉积绝缘膜。 在该淀积绝缘膜上形成字线层,并在与扩散区交叉的方向上形成栅极氧化膜。 由于沉积的绝缘膜被设定为较厚,所以作为位线层的一个扩散区域和字线层之间的电容减小,从而提高了半导体器件的读取速度。 此外,由于扩散区域具有LDD结构,因此穿孔证明压力增加。 因此,可以提供增加读取速度并且在精细结构中有利的平面单元结构。 还示出了另一半导体器件。 进一步示出了制造半导体器件的方法。
    • 3. 发明授权
    • Method for producing semiconductor memory device having a planar cell
structure
    • 具有平面单元结构的半导体存储器件的制造方法
    • US5362662A
    • 1994-11-08
    • US57188
    • 1993-05-03
    • Yuichi AndoKoichi Sogawa
    • Yuichi AndoKoichi Sogawa
    • H01L27/112H01L21/70H01L27/00
    • H01L27/112
    • A semiconductor memory device includes a substrate, a first diffusion region composed of at least one longitudinal and continuous source region which is disposed on the substrate and commonly used for a plurality of memory transistors, and a second diffusion region composed of at least one longitudinal and continuous drain region which is disposed in parallel with the first diffusion region and commonly used for the plurality of memory transistors. A refractory metal film is disposed on each of the first and second diffusion regions. An electric insulation film is disposed on the refractory metal film. A plurality of parallel gate electrodes are disposed crossing over the first and second diffusion regions. And a gate oxide film is arranged to electrically insulate the gate electrodes from the diffusion regions.
    • 半导体存储器件包括衬底,由至少一个纵向和连续源极区域构成的第一扩散区域,该第一扩散区域设置在衬底上并且通常用于多个存储晶体管,第二扩散区域由至少一个纵向和 连续漏极区域,其与第一扩散区域平行设置并且共同用于多个存储晶体管。 难熔金属膜设置在第一和第二扩散区域中的每一个上。 电绝缘膜设置在难熔金属膜上。 多个平行栅电极被布置成跨越第一和第二扩散区。 并且栅极氧化膜被布置成使栅电极与扩散区电绝缘。
    • 8. 发明授权
    • Method of checking pattern measurement and image recognition assisting pattern
    • 检查图案测量和图像识别辅助图案的方法
    • US06558859B2
    • 2003-05-06
    • US09851096
    • 2001-05-09
    • Koichi Sogawa
    • Koichi Sogawa
    • G03F900
    • H01L22/34
    • A method of detecting a position of a size check pattern on a substrate by using a size check apparatus so as to measure a size of the size check pattern for a purpose of checking precision of production, comprising the steps of a) providing image recognition assisting patterns on the substrate on both sides of a portion to be measured of the size check pattern, b) setting the size check apparatus to have an image recognition area that includes both the size check pattern and the image recognition assisting patterns, and c) detecting the position of the size check pattern by use of the size check apparatus based on the size check pattern and the image recognition assisting patterns.
    • 一种通过使用尺寸检查装置来检测尺寸检查图案在基板上的位置的方法,以便测量尺寸检查图案的尺寸以便检查生产精度,包括以下步骤:a)提供图像识别辅助 b)将尺寸检查装置设置为具有包括尺寸检查图案和图像识别辅助图案两者的图像识别区域,以及c)检测尺寸检查图案的图像识别区域 基于尺寸检查图案和图像识别辅助图案使用尺寸检查装置的尺寸检查图案的位置。