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1. 发明授权

US07554145B2 Magnetic memory cells and manufacturing methods 有权
标题翻译：磁记忆体和制造方法
公开(公告)号：US07554145B2
公开(公告)日：2009-06-30
申请号：US11610760
申请日：2006-12-14
申请人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
发明人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
IPC分类号： H01L29/76
CPC分类号： H01L43/12 , H01L27/228
摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.
摘要翻译：改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。然后可以在掩模层和导电通孔上形成导电存储器线。

2. 发明申请

US20070096230A1 Magnetic memory cells and manufacturing methods 有权
标题翻译：磁记忆体和制造方法
公开(公告)号：US20070096230A1
公开(公告)日：2007-05-03
申请号：US11610760
申请日：2006-12-14
申请人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
发明人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
IPC分类号： H01L43/00 , H01L29/82
CPC分类号： H01L43/12 , H01L27/228
摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.
摘要翻译：改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。然后可以在掩模层和导电通孔上形成导电存储器线。

3. 发明申请

US20060183318A1 MAGNETIC MEMORY CELLS AND MANUFACTURING METHODS 有权
标题翻译：磁记忆细胞和制造方法
公开(公告)号：US20060183318A1
公开(公告)日：2006-08-17
申请号：US10906357
申请日：2005-02-15
申请人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
发明人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
IPC分类号： H01L21/4763 , H01L21/00
CPC分类号： H01L43/12 , H01L27/228
摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.
摘要翻译：改进的磁阻存储器件具有减小的磁存储元件与用于写入磁存储器元件的导电存储器线之间的距离。通过根据包括在磁阻存储元件上形成掩模并在掩模层上形成绝缘层，然后使用平坦化处理去除绝缘层的部分的方法，通过形成改进的磁阻存储器件来简化缩短的距离。然后可以在掩模层中形成导电通孔，例如使用镶嵌工艺。然后可以在掩模层和导电通孔上形成导电存储器线。

4. 发明授权

US07172908B2 Magnetic memory cells and manufacturing methods 有权
公开(公告)号：US07172908B2
公开(公告)日：2007-02-06
申请号：US10906357
申请日：2005-02-15
申请人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
发明人： Yuan-Hung Liu , Chih-Ta Wu , Lan-Lin Chao , Yeur-Luen Tu , Wen-Chin Lin , Chia-Shiung Tsai
IPC分类号： H01L21/00
CPC分类号： H01L43/12 , H01L27/228
摘要： An improved magnetoresistive memory device has a reduced distance between the magnetic memory element and a conductive memory line used for writing to the magnetic memory element. The reduced distance is facilitated by forming the improved magnetoresistive memory device according to a method that includes forming a mask over the magnetoresistive memory element and forming an insulating layer over the mask layer, then removing portions of the insulating layer using a planarization process. A conductive via can then be formed in the mask layer, for example using a damascene process. The conductive memory line can then be formed over the mask layer and conductive via.

5. 发明授权

US07851324B2 Method of forming metal-insulator-metal structure 有权
标题翻译：金属绝缘体金属结构形成方法
公开(公告)号：US07851324B2
公开(公告)日：2010-12-14
申请号：US11586528
申请日：2006-10-26
申请人： Yu-Jen Wang , Chia-Shiung Tsai , Yeur-Luen Tu , Lan-Lin Chao , Chih-Ta Wu , Hsing-Lien Lin , Chung Chien Wang
发明人： Yu-Jen Wang , Chia-Shiung Tsai , Yeur-Luen Tu , Lan-Lin Chao , Chih-Ta Wu , Hsing-Lien Lin , Chung Chien Wang
IPC分类号： H01L29/94
CPC分类号： H01L28/60 , H01L21/321
摘要： A method of manufacturing a semiconductor device includes forming a metal-insulator-metal (MIM) device having a metal organic chemical vapor deposited (MOCVD) lower electrode and an atomic layer deposited (ALD) upper electrode.
摘要翻译：一种制造半导体器件的方法包括形成具有金属有机化学气相沉积（MOCVD）下电极和原子层沉积（ALD）上电极的金属 - 绝缘体 - 金属（MIM）器件。

6. 发明申请

US20050215004A1 Method of forming MIM capacitor electrodes 有权
标题翻译：形成MIM电容器电极的方法
公开(公告)号：US20050215004A1
公开(公告)日：2005-09-29
申请号：US10811657
申请日：2004-03-29
申请人： Chih-Ta Wu , Kuo-Yin Lin , Tsung-Hsun Huang , Chung-Yi Yu , Lan-Lin Chao , Yeur-Luen Tu , Hsing-Lien Lin , Chia-Shiung Tsai
发明人： Chih-Ta Wu , Kuo-Yin Lin , Tsung-Hsun Huang , Chung-Yi Yu , Lan-Lin Chao , Yeur-Luen Tu , Hsing-Lien Lin , Chia-Shiung Tsai
IPC分类号： H01G4/005 , H01L21/02 , H01L21/28 , H01L21/3205 , H01L21/44 , H01L23/522 , H01L29/06
CPC分类号： H01L28/60 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A novel method for forming electrodes in the fabrication of an MIM (metal-insulator-metal) capacitor, is disclosed. The method improves MIM capacitor performance by preventing plasma-induced damage to a dielectric layer during deposition of a top electrode on the dielectric layer, as well as by reducing or preventing the formation of an interfacial layer between the dielectric layer and the electrode or electrodes, in fabrication of the MIM capacitor. The method typically includes the patterning of crown-type capacitor openings in a substrate; depositing a bottom electrode in each of the crown openings; subjecting the bottom electrode to a rapid thermal processing (RTP) or furnace anneal step; depositing a dielectric layer on the annealed bottom electrode; depositing a top electrode on the dielectric layer using a plasma-free CVD (chemical vapor deposition) or ALD (atomic layer deposition) process; and patterning the top electrode of each MIM capacitor.
摘要翻译：公开了一种用于在MIM（金属 - 绝缘体 - 金属）电容器的制造中形成电极的新颖方法。该方法通过在电介质层上的顶部电极沉积期间防止等离子体对电介质层的损伤，以及通过减少或防止介电层和电极或电极之间的界面层的形成来改善MIM电容器性能，在MIM电容器的制造中。该方法通常包括在衬底中图案化冠状电容器开口; 在每个冠状开口中沉积底部电极; 对底部电极进行快速热处理（RTP）或炉退火步骤; 在退火的底部电极上沉积介电层; 使用无等离子体CVD（化学气相沉积）或ALD（原子层沉积）工艺在电介质层上沉积顶部电极; 并对每个MIM电容器的顶部电极进行构图。

7. 发明申请

US20080188055A1 Metal-insulator-metal structure and method of forming the same 有权
标题翻译：金属绝缘体金属结构及其形成方法
公开(公告)号：US20080188055A1
公开(公告)日：2008-08-07
申请号：US11586528
申请日：2006-10-26
申请人： Yu-Jen Wang , Chia-Shiung Tsai , Yeur-Luen Tu , Lan-Lin Chao , Chih-Ta Wu , Hsing-Lien Lin , Chung Chien Wang
发明人： Yu-Jen Wang , Chia-Shiung Tsai , Yeur-Luen Tu , Lan-Lin Chao , Chih-Ta Wu , Hsing-Lien Lin , Chung Chien Wang
IPC分类号： H01L21/02
CPC分类号： H01L28/60 , H01L21/321
摘要： A method of manufacturing a semiconductor device includes forming a metal-insulator-metal (MIM) device having a metal organic chemical vapor deposited (MOCVD) lower electrode and an atomic layer deposited (ALD) upper electrode.
摘要翻译：一种制造半导体器件的方法包括形成具有金属有机化学气相沉积（MOCVD）下电极和原子层沉积（ALD）上电极的金属 - 绝缘体 - 金属（MIM）器件。

8. 发明授权

US07199001B2 Method of forming MIM capacitor electrodes 有权
标题翻译：形成MIM电容器电极的方法
公开(公告)号：US07199001B2
公开(公告)日：2007-04-03
申请号：US10811657
申请日：2004-03-29
申请人： Chih-Ta Wu , Kuo-Yin Lin , Tsung-Hsun Huang , Chung-Yi Yu , Lan-Lin Chao , Yeur-Luen Tu , Hsing-Lien Lin , Chia-Shiung Tsai
发明人： Chih-Ta Wu , Kuo-Yin Lin , Tsung-Hsun Huang , Chung-Yi Yu , Lan-Lin Chao , Yeur-Luen Tu , Hsing-Lien Lin , Chia-Shiung Tsai
IPC分类号： H01L21/8242
CPC分类号： H01L28/60 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： A novel method for forming electrodes in the fabrication of an MIM (metal-insulator-metal) capacitor, is disclosed. The method improves MIM capacitor performance by preventing plasma-induced damage to a dielectric layer during deposition of a top electrode on the dielectric layer, as well as by reducing or preventing the formation of an interfacial layer between the dielectric layer and the electrode or electrodes, in fabrication of the MIM capacitor. The method typically includes the patterning of crown-type capacitor openings in a substrate; depositing a bottom electrode in each of the crown openings; subjecting the bottom electrode to a rapid thermal processing (RTP) or furnace anneal step; depositing a dielectric layer on the annealed bottom electrode; depositing a top electrode on the dielectric layer using a plasma-free CVD (chemical vapor deposition) or ALD (atomic layer deposition) process; and patterning the top electrode of each MIM capacitor.
摘要翻译：公开了一种用于在MIM（金属 - 绝缘体 - 金属）电容器的制造中形成电极的新颖方法。该方法通过在电介质层上的顶部电极沉积期间防止等离子体对电介质层的损伤，以及通过减少或防止介电层和电极或电极之间的界面层的形成来改善MIM电容器性能，在MIM电容器的制造中。该方法通常包括在衬底中图案化冠状电容器开口; 在每个冠状开口中沉积底部电极; 对底部电极进行快速热处理（RTP）或炉退火步骤; 在退火的底部电极上沉积介电层; 使用无等离子体CVD（化学气相沉积）或ALD（原子层沉积）工艺在电介质层上沉积顶部电极; 并对每个MIM电容器的顶部电极进行构图。

9. 发明授权

US07202130B2 Spacer for a split gate flash memory cell and a memory cell employing the same 有权
标题翻译：分离栅闪存单元的间隔器和采用其的存储单元
公开(公告)号：US07202130B2
公开(公告)日：2007-04-10
申请号：US10775290
申请日：2004-02-10
申请人： Yuan-Hung Liu , Chih-Ta Wu , Yeur-Luen Tu , Chi-Hsin Lo , Chia-Shiung Tsai
发明人： Yuan-Hung Liu , Chih-Ta Wu , Yeur-Luen Tu , Chi-Hsin Lo , Chia-Shiung Tsai
IPC分类号： H01L21/336 , H01L29/788
CPC分类号： H01L27/11568 , H01L27/115 , H01L27/11521 , H01L29/42324
摘要： A spacer, a split gate flash memory cell, and related method of forming the same. In one aspect, a composite spacer includes a first spacer insulating layer having a first deposition distribution that varies as a function of a location on a substrate. The composite spacer also includes a second spacer insulating layer having a second deposition distribution that varies in substantial opposition to the first deposition distribution. In another aspect, a composite spacer includes a first spacer insulating layer having a substantially uniform deposition distribution across a surface thereof. The composite spacer also includes a second spacer insulating layer having a varying deposition distribution with a thinner composition in selected regions of the memory cell. In another aspect, a coupling spacer provides for a conductive layer that extends between a floating gate and a substrate insulating layer adjacent a source recessed into the substrate of the memory cell.
摘要翻译：间隔物，分裂栅极闪存单元及其相关方法。在一个方面，一种复合间隔物包括具有第一沉积分布的第一间隔绝缘层，其随着基底上的位置而变化。复合间隔物还包括具有与第一沉积分布基本相反的第二沉积分布的第二间隔绝缘层。在另一方面，复合间隔物包括在其表面上具有基本均匀的沉积分布的第一间隔绝缘层。复合间隔物还包括具有在存储单元的选定区域中具有较薄组成的不同沉积分布的第二间隔绝缘层。在另一方面，耦合间隔物提供导电层，该导电层在浮置栅极和与凹入到存储器单元的衬底中的源极相邻的衬底绝缘层之间延伸。

10. 发明授权

US08889507B2 MIM capacitors with improved reliability 有权
标题翻译： MIM电容器具有更高的可靠性
公开(公告)号：US08889507B2
公开(公告)日：2014-11-18
申请号：US11765971
申请日：2007-06-20
申请人： Chih-Ta Wu , Jason Lee , Chung Chien Wang , Hsing-Lien Lin , Yu-Jen Wang , Yeur-Luen Tu , Chern-Yow Hsu , Yuan-Hung Liu , Chi-Hsin Lo , Chia-Shiung Tsai , Lucy Chang , Chia-Lin Chen , Ming-Chih Tsai
发明人： Chih-Ta Wu , Jason Lee , Chung Chien Wang , Hsing-Lien Lin , Yu-Jen Wang , Yeur-Luen Tu , Chern-Yow Hsu , Yuan-Hung Liu , Chi-Hsin Lo , Chia-Shiung Tsai , Lucy Chang , Chia-Lin Chen , Ming-Chih Tsai
IPC分类号： H01L21/8234 , H01L21/8244 , H01L49/02 , H01L27/108
CPC分类号： H01L27/10814 , H01L27/10852 , H01L28/40 , H01L28/75
摘要： A capacitor and methods for forming the same are provided. The method includes forming a bottom electrode; treating the bottom electrode in an oxygen-containing environment to convert a top layer of the bottom electrode into a buffer layer; forming an insulating layer on the buffer layer; and forming a top electrode over the insulating layer.
摘要翻译：提供电容器及其形成方法。该方法包括形成底部电极; 在含氧环境中处理底部电极以将底部电极的顶层转化为缓冲层; 在缓冲层上形成绝缘层; 并在所述绝缘层上形成顶部电极。

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