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1. 发明申请

US20090221118A1 High Voltage Semiconductor Devices 有权
标题翻译：高压半导体器件
公开(公告)号：US20090221118A1
公开(公告)日：2009-09-03
申请号：US12040557
申请日：2008-02-29
申请人： Yu Wen Chen , Fu-Hsin Chen , Ming-Ren Tsai , William Wei-Yuan Tien
发明人： Yu Wen Chen , Fu-Hsin Chen , Ming-Ren Tsai , William Wei-Yuan Tien
IPC分类号： H01L21/336
CPC分类号： H01L29/6659 , H01L21/26586 , H01L29/1095 , H01L29/42368 , H01L29/66681 , H01L29/7816 , H01L29/7833
摘要： A transistor suitable for high-voltage applications and a method of manufacture is provided. A first device is formed by depositing a dielectric layer and a conductive layer over a substrate. A hard mask is deposited over the conductive layer and patterned using photolithography techniques. The photoresist material is removed prior to etching the underlying conductive layer and dielectric layer. The hard mask is also used as an implant mask. Another mask may be deposited and formed over the conductive layer to form other devices in other regions of the substrate. The other mask is preferably removed from over the hard mask prior to etching the conductive layer and the dielectric layer.
摘要翻译：提供了适用于高压应用的晶体管和制造方法。通过在衬底上沉积介电层和导电层来形成第一器件。将硬掩模沉积在导电层上并用光刻技术进行图案化。在蚀刻下面的导电层和电介质层之前去除光致抗蚀剂材料。硬掩模也用作植入物掩模。可以在导电层上沉积和形成另一个掩模，以在衬底的其它区域中形成其它器件。在蚀刻导电层和电介质层之前，优选从硬掩模上除去另一个掩模。

2. 发明授权

US07915128B2 High voltage semiconductor devices 有权
标题翻译：高压半导体器件
公开(公告)号：US07915128B2
公开(公告)日：2011-03-29
申请号：US12040557
申请日：2008-02-29
申请人： Yu Wen Chen , Fu-Hsin Chen , Ming-Ren Tsai , William Wei-Yuan Tien
发明人： Yu Wen Chen , Fu-Hsin Chen , Ming-Ren Tsai , William Wei-Yuan Tien
IPC分类号： H01L21/336
CPC分类号： H01L29/6659 , H01L21/26586 , H01L29/1095 , H01L29/42368 , H01L29/66681 , H01L29/7816 , H01L29/7833
摘要： A transistor suitable for high-voltage applications and a method of manufacture is provided. A first device is formed by depositing a dielectric layer and a conductive layer over a substrate. A hard mask is deposited over the conductive layer and patterned using photolithography techniques. The photoresist material is removed prior to etching the underlying conductive layer and dielectric layer. The hard mask is also used as an implant mask. Another mask may be deposited and formed over the conductive layer to form other devices in other regions of the substrate. The other mask is preferably removed from over the hard mask prior to etching the conductive layer and the dielectric layer.
摘要翻译：提供了适用于高压应用的晶体管和制造方法。通过在衬底上沉积介电层和导电层来形成第一器件。将硬掩模沉积在导电层上并用光刻技术进行图案化。在蚀刻下面的导电层和电介质层之前去除光致抗蚀剂材料。硬掩模也用作植入物掩模。可以在导电层上沉积和形成另一个掩模，以在衬底的其它区域中形成其它器件。在蚀刻导电层和电介质层之前，优选从硬掩模上除去另一个掩模。

3. 发明授权

US07553733B2 Isolated LDMOS IC technology 有权
标题翻译：隔离LDMOS IC技术
公开(公告)号：US07553733B2
公开(公告)日：2009-06-30
申请号：US11696345
申请日：2007-04-04
申请人： Ming-Ren Tsai , Chen-Fu Hsu
发明人： Ming-Ren Tsai , Chen-Fu Hsu
IPC分类号： H01L21/331
CPC分类号： H01L29/7835 , H01L29/0847 , H01L29/1087 , H01L29/402 , H01L29/42368
摘要： A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate and the drain. The gate is formed over a first portion of the well of the first type and a channel portion of the well of the second type. The LDMOS also includes a second field oxide region, which is disposed between the edges of the drain and the well of the second type. A dummy polysilicon layer, which is formed to cover approximately one half of the second field oxide with a remaining portion of the dummy polysilicon layer covering a second portion of the well of the second type, reduces the electric field in the drift region.
摘要翻译：横向双扩散金属氧化物半导体（LDMOS）器件包括用于控制器件的栅极，耦合到形成在第一类型阱中的栅极的漏极，与漏极形成电流路径的源极和第一场氧化物区域设置在栅极和漏极之间。栅极形成在第一类型的阱的第一部分和第二类型阱的沟道部分之上。 LDMOS还包括第二场氧化物区域，其设置在排水口和第二类型井的边缘之间。形成为覆盖第二场氧化物的大约一半的虚拟多晶硅层，其中覆盖第二类型阱的第二部分的虚拟多晶硅层的剩余部分减少了漂移区域中的电场。

4. 发明申请

US20070181919A1 Novel Isolated LDMOS IC Technology 有权
标题翻译：新型孤立LDMOS IC技术
公开(公告)号：US20070181919A1
公开(公告)日：2007-08-09
申请号：US11696345
申请日：2007-04-04
申请人： Ming-Ren Tsai , Chen-Fu Hsu
发明人： Ming-Ren Tsai , Chen-Fu Hsu
IPC分类号： H01L29/76
CPC分类号： H01L29/7835 , H01L29/0847 , H01L29/1087 , H01L29/402 , H01L29/42368
摘要： A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate and the drain. The gate is formed over a first portion of the well of the first type and a channel portion of the well of the second type. The LDMOS also includes a second field oxide region, which is disposed between the edges of the drain and the well of the second type. A dummy polysilicon layer, which is formed to cover approximately one half of the second field oxide with a remaining portion of the dummy polysilicon layer covering a second portion of the well of the second type, reduces the electric field in the drift region.
摘要翻译：横向双扩散金属氧化物半导体（LDMOS）器件包括用于控制器件的栅极，耦合到形成在第一类型阱中的栅极的漏极，与漏极形成电流路径的源极和第一场氧化物区域设置在栅极和漏极之间。栅极形成在第一类型的阱的第一部分和第二类型阱的沟道部分之上。 LDMOS还包括第二场氧化物区域，其设置在排水口和第二类型井的边缘之间。形成为覆盖第二场氧化物的大约一半的虚拟多晶硅层，其中覆盖第二类型阱的第二部分的虚拟多晶硅层的剩余部分减少了漂移区域中的电场。

5. 发明申请

US20060049452A1 Novel LDMOS IC technology with low threshold voltage 审中-公开
标题翻译：具有低阈值电压的新型LDMOS IC技术
公开(公告)号：US20060049452A1
公开(公告)日：2006-03-09
申请号：US10936280
申请日：2004-09-07
申请人： Ming-Ren Tsai , Chen-Fu Hsu
发明人： Ming-Ren Tsai , Chen-Fu Hsu
IPC分类号： H01L29/76
CPC分类号： H01L29/086 , H01L29/0869 , H01L29/42368 , H01L29/7816
摘要： A lateral double diffused metal oxide semiconductor (LDMOS) device includes forming a plurality of wells on a semiconductor substrate. The plurality of wells include a first well of a first type, a second well of a second type opposite to the first type, and a third well of the first type. The device includes a gate to control flow from current from a source to a drain. Highly doped regions of the first type provide contacts for the source and the drain. The third well, which is disposed in between the second well, is formed directly below the highly doped region. The third well causes an energy barrier at the source to decrease, thereby resulting in lowering a threshold voltage of the LDMOS device compared to the LDMOS device without the third well.
摘要翻译：横向双扩散金属氧化物半导体（LDMOS）器件包括在半导体衬底上形成多个阱。多个井包括第一类型的第一井，与第一类型相反的第二类型的第二井和第一类型的第三井。该装置包括用于控制从源极到漏极的电流的栅极。第一类型的高掺杂区域为源极和漏极提供触点。设置在第二阱之间的第三阱直接形成在高掺杂区域的正下方。第三阱导致源极处的能量势垒减小，从而导致与没有第三阱的LDMOS器件相比，降低LDMOS器件的阈值电压。

6. 发明授权

US07224025B2 Isolated LDMOS IC technology 有权
标题翻译：隔离LDMOS IC技术
公开(公告)号：US07224025B2
公开(公告)日：2007-05-29
申请号：US10910178
申请日：2004-08-03
申请人： Ming-Ren Tsai , Chen-Fu Hsu
发明人： Ming-Ren Tsai , Chen-Fu Hsu
IPC分类号： H01L29/76
CPC分类号： H01L29/7835 , H01L29/0847 , H01L29/1087 , H01L29/402 , H01L29/42368
摘要： A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate and the drain. The gate is formed over a first portion of the well of the first type and a channel portion of the well of the second type. The LDMOS also includes a second field oxide region, which is disposed between the edges of the drain and the well of the second type. A dummy polysilicon layer, which is formed to cover approximately one half of the second field oxide with a remaining portion of the dummy polysilicon layer covering a second portion of the well of the second type, reduces the electric field in the drift region.
摘要翻译：横向双扩散金属氧化物半导体（LDMOS）器件包括用于控制器件的栅极，耦合到形成在第一类型阱中的栅极的漏极，与漏极形成电流路径的源极和第一场氧化物区域设置在栅极和漏极之间。栅极形成在第一类型的阱的第一部分和第二类型阱的沟道部分之上。 LDMOS还包括第二场氧化物区域，其设置在排水口和第二类型井的边缘之间。形成为覆盖第二场氧化物的大约一半的虚拟多晶硅层，其中覆盖第二类型阱的第二部分的虚拟多晶硅层的剩余部分减少了漂移区域中的电场。

7. 发明申请

US20060027874A1 Novel isolated LDMOS IC technology 有权
标题翻译：新型孤立LDMOS IC技术
公开(公告)号：US20060027874A1
公开(公告)日：2006-02-09
申请号：US10910178
申请日：2004-08-03
申请人： Ming-Ren Tsai , Chen-Fu Hsu
发明人： Ming-Ren Tsai , Chen-Fu Hsu
IPC分类号： H01L29/76
CPC分类号： H01L29/7835 , H01L29/0847 , H01L29/1087 , H01L29/402 , H01L29/42368
摘要： A lateral double diffused metal oxide semiconductor (LDMOS) device includes a gate to control the device, a drain coupled to the gate formed in a well of a first type, a source to form a current path with the drain, and a first field oxide region disposed between the gate and the drain. The gate is formed over a first portion of the well of the first type and a channel portion of the well of the second type. The LDMOS also includes a second field oxide region, which is disposed between the edges of the drain and the well of the second type. A dummy polysilicon layer, which is formed to cover approximately one half of the second field oxide with a remaining portion of the dummy polysilicon layer covering a second portion of the well of the second type, reduces the electric field in the drift region.
摘要翻译：横向双扩散金属氧化物半导体（LDMOS）器件包括用于控制器件的栅极，耦合到形成在第一类型阱中的栅极的漏极，与漏极形成电流路径的源极和第一场氧化物区域设置在栅极和漏极之间。栅极形成在第一类型的阱的第一部分和第二类型阱的沟道部分之上。 LDMOS还包括第二场氧化物区域，其设置在排水口和第二类型井的边缘之间。形成为覆盖第二场氧化物的大约一半的虚拟多晶硅层，其中覆盖第二类型阱的第二部分的虚拟多晶硅层的剩余部分减少了漂移区域中的电场。

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