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1. 发明授权

US4837186A Silicon semiconductor substrate with an insulating layer embedded therein and method for forming the same 失效
标题翻译：其中嵌有绝缘层的硅半导体衬底及其形成方法
公开(公告)号：US4837186A
公开(公告)日：1989-06-06
申请号：US84209
申请日：1987-08-12
申请人： Yu Ohata , Tsuyoshi Kuramoto , Masaru Shimbo
发明人： Yu Ohata , Tsuyoshi Kuramoto , Masaru Shimbo
IPC分类号： H01L21/18 , H01L21/762 , H01L27/06 , H01L27/088
CPC分类号： H01L21/187 , H01L21/76264 , H01L21/76275 , H01L21/76283 , H01L21/76286 , H01L27/0623 , H01L27/088 , Y10S148/012
摘要： A silicon semiconductor substrate includes an insulating layer embedded therein. The silicon semiconductor substrate comprises a first silicon plate, an insulating layer embedded in the first silicon plate so that the surfaces of the silicon plate and the insulating layer are in a mirror surface, and a second silicon plate united with the first silicon plate and the insulating layer at the mirror surface of the first silicon plate and the insulating layer. The insulating layer is used for forming an isolated region in the second silicon plate.
摘要翻译：硅半导体衬底包括嵌入其中的绝缘层。硅半导体衬底包括第一硅板，嵌入在第一硅板中的绝缘层，使得硅板和绝缘层的表面在镜面中，并且第二硅板与第一硅板和第一硅板的镜面上的绝缘层和绝缘层。绝缘层用于在第二硅板中形成隔离区域。

2. 发明授权

US4700466A Method of manufacturing semiconductor device wherein silicon substrates are bonded together 失效
标题翻译：制造半导体器件的方法，其中硅衬底结合在一起
公开(公告)号：US4700466A
公开(公告)日：1987-10-20
申请号：US825544
申请日：1986-02-03
申请人： Akio Nakagawa , Hiromichi Ohashi , Tsuneo Ogura , Masaru Shimbo
发明人： Akio Nakagawa , Hiromichi Ohashi , Tsuneo Ogura , Masaru Shimbo
IPC分类号： H01L29/78 , H01L21/02 , H01L21/18 , H01L21/20 , H01L21/306 , H01L21/336 , H01L27/12 , H01L29/74 , H01L29/861 , H01L21/461
CPC分类号： H01L21/02052 , H01L21/187
摘要： A method of manufacturing a semiconductor device, wherein a semiconductor wafer having a first impurity-doped layer and a second impurity-doped layer having a higher impurity concentration than that of the first impurity-doped layer is formed. A first silicon substrate, having a first impurity-doped layer and a third impurity-doped layer which has a higher impurity concentration than that of the first impurity-doped layer and the same conductivity type as that of the second impurity-doped layer, and whose surface is mirror-polished, is brought into contact with a second silicon substrate which has a higher impurity concentration than that of the first impurity-doped layer and the same conductivity type as that of the second impurity-doped layer, and whose surface is mirror-polished, so that the mirror-polished surfaces thereof are in contact with each other. The contacting substrates are then placed in a clean atmosphere so that virtually no foreign substances are present therebetween, and annealed at a temperature of not less than 200.degree. C. so as to bond them together, thereby forming the second impurity-doped layer consisting of the third impurity doped layer and the second silicon substrate.
摘要翻译：一种制造半导体器件的方法，其中形成具有第一杂质掺杂层和杂质浓度高于第一杂质掺杂层的第二杂质掺杂层的半导体晶片。具有第一杂质掺杂层和第三杂质掺杂层的第一硅衬底，其具有比第一杂质掺杂层高的杂质浓度和与第二杂质掺杂层相同的导电类型，以及其表面经镜面抛光与第二硅衬底接触，第二硅衬底的杂质浓度高于第一杂质掺杂层的杂质浓度并且具有与第二杂质掺杂层相同的导电类型，并且其表面为镜面抛光，使得其镜面抛光表面彼此接触。然后将接触的基材放置在清洁的气氛中，实际上不存在异物，并在不低于200℃的温度下进行退火，以将它们结合在一起，由此形成第二杂质掺杂层，由第三杂质掺杂层和第二硅衬底。

3. 发明授权

US4791465A Field effect transistor type semiconductor sensor and method of manufacturing the same 失效
标题翻译：场效应晶体管型半导体传感器及其制造方法
公开(公告)号：US4791465A
公开(公告)日：1988-12-13
申请号：US831314
申请日：1986-02-20
申请人： Tadashi Sakai , Masaki Katsura , Hideaki Hiraki , Shigeki Uno , Masaru Shimbo , Kazuyoshi Furukawa
发明人： Tadashi Sakai , Masaki Katsura , Hideaki Hiraki , Shigeki Uno , Masaru Shimbo , Kazuyoshi Furukawa
IPC分类号： G01N27/414 , H01L21/18 , H01L29/66
CPC分类号： H01L21/187 , G01N27/414
摘要： In a semiconductor sensor, the surfaces of first and second semiconductor substractes of a first conductivity type are made into flat surfaces by polishing the surfaces and are contacted each other so that the both substrates are bonded together. Source and claim regions are formed by diffusing an impurity of second conductivity type. The source and claim regions are separated through a through hole formed in the second substrate and are extended along the surface of the second substrate. An insulative layer is formed on the opposite surface of the second substrate and an inner surface of the through hole.
摘要翻译：在半导体传感器中，第一导电类型的第一和第二半导体衬底的表面通过抛光表面而被制成平坦表面，并且彼此接触，使得两个衬底接合在一起。通过扩散第二导电类型的杂质形成源和索引区域。源和权利要求区域通过形成在第二基板中的通孔分开，并且沿着第二基板的表面延伸。在第二基板的相对表面和通孔的内表面上形成绝缘层。

4. 发明授权

US4542105A Glass composition for covering semiconductor element 失效
标题翻译：用于覆盖半导体元件的玻璃组合物
公开(公告)号：US4542105A
公开(公告)日：1985-09-17
申请号：US454248
申请日：1982-12-29
申请人： Kazuyoshi Furukawa , Masaru Shimbo , Kiyoshi Fukuda , Katsujirou Tanzawa
发明人： Kazuyoshi Furukawa , Masaru Shimbo , Kiyoshi Fukuda , Katsujirou Tanzawa
IPC分类号： C03C3/074 , C03C3/076 , C03C3/108 , C03C4/16 , C03C8/04 , C03C8/10 , H01L21/316 , H01L23/29 , H01L23/31 , C03C5/00
CPC分类号： H01L23/291 , C03C3/074 , C03C3/076 , C03C8/04 , C03C8/10 , H01L23/3171 , H01L2924/0002
摘要： A glass composition for covering a semiconductor element. The glass composition has excellent resistance to chemicals and excellent electric characteristics. The glass composition includes 3 to 8% by weight of Al.sub.2 O.sub.3, 35 to 45% by weight of SiO.sub.2, 10 to 30% by weight of ZnO, 5 to 30% by weight of PbO, 1 to 10% by weight of B.sub.2 O.sub.3, and more than 5% but not exceeding 20% by weight of an alkaline earth metal oxide selected from the group consisting of MgO, CaO, SrO and BaO, where the maximum contents of MgO, CaO, SrO and BaO are 7% by weight, 3% by weight, 7% by weight, and 15% by weight, respectively.
摘要翻译：一种用于覆盖半导体元件的玻璃组合物。玻璃组合物具有优异的耐化学性和优异的电特性。玻璃组合物包含3至8重量％的Al 2 O 3，35至45重量％的SiO 2，10至30重量％的ZnO，5至30重量％的PbO，1至10重量％的B 2 O 3，以及大于5％但不超过20重量％的选自MgO，CaO，SrO和BaO的碱土金属氧化物，其中MgO，CaO，SrO和BaO的最大含量为7重量％，3 重量％，7重量％，15重量％。

5. 发明授权

US4738935A Method of manufacturing compound semiconductor apparatus 失效
标题翻译：制造化合物半导体装置的方法
公开(公告)号：US4738935A
公开(公告)日：1988-04-19
申请号：US809193
申请日：1985-12-16
申请人： Masaru Shimbo , Hiromichi Ohashi , Kazuyoshi Furukawa , Kiyoshi Fukuda
发明人： Masaru Shimbo , Hiromichi Ohashi , Kazuyoshi Furukawa , Kiyoshi Fukuda
IPC分类号： H01L21/20 , H01L21/02 , H01L21/18 , H01L21/306 , H01L27/12 , H01L29/80 , H01L29/861 , H01L21/302 , H01L21/76
CPC分类号： H01L21/02052 , H01L21/187 , Y10S148/012 , Y10S148/159
摘要： A method of manufacturing a compound semiconductor device has the steps of mirror-polishing a surface of each of two compound semiconductor substrates, bringing the mirror-polished surfaces of the two compound semiconductor substrates in contact with each other in a clean atmosphere and in a state wherein substantially no foreign substances are present therebetween, and annealing the compound semiconductor substrates which are in contact with each other so as to provide a bonded structure having a junction with excellent electrical characteristics at the interface.
摘要翻译：制造化合物半导体器件的方法具有对两个化合物半导体衬底中的每一个的表面进行镜面抛光的步骤，使得两个化合物半导体衬底的镜面抛光表面在清洁的气氛中彼此接触并处于一种状态其中基本上不存在异物，并且使彼此接触的化合物半导体衬底退火，以提供具有在界面处具有优异电特性的结的接合结构。

6. 发明授权

US4671846A Method of bonding crystalline silicon bodies 失效
标题翻译：粘结晶体硅体的方法
公开(公告)号：US4671846A
公开(公告)日：1987-06-09
申请号：US641207
申请日：1984-08-16
申请人： Masaru Shimbo , Kiyoshi Fukuda
发明人： Masaru Shimbo , Kiyoshi Fukuda
IPC分类号： C04B37/00 , B23K20/24 , C30B29/06 , C30B33/00 , C30B33/06 , G01L9/00 , H01L21/02 , H01L21/18 , H01L21/20 , H01L21/304 , H01L27/12 , H01L21/306
CPC分类号： B23K20/24 , C30B29/06 , C30B33/00 , G01L19/147 , H01L21/187
摘要： A method of bonding two single-crystal silicon bodies comprises the steps of: (i) mirror-polishing the contact surfaces of the bodies to reduce the surface roughness to 500A or less; (ii) removing contaminant from the mirror-polished surfaces; and (iii) bringing the surfaces into mutual contact so that substantially no foreign substance enter the gap between these surfaces.
摘要翻译：一种键合两个单晶硅体的方法包括以下步骤：（i）对本体的接触表面进行镜面抛光以将表面粗糙度降低至500A以下; （ii）从镜面抛光表面去除污染物; 和（iii）使表面相互接触，使得基本上没有异物进入这些表面之间的间隙。

7. 发明授权

US4638552A Method of manufacturing semiconductor substrate 失效
标题翻译：制造半导体衬底的方法
公开(公告)号：US4638552A
公开(公告)日：1987-01-27
申请号：US701516
申请日：1985-02-14
申请人： Masaru Shimbo , Kiyoshi Fukuda , Yoshiaki Ohwada
发明人： Masaru Shimbo , Kiyoshi Fukuda , Yoshiaki Ohwada
IPC分类号： H01L21/18 , H01L21/20 , H01L21/304 , H01L21/74 , H01L21/762 , H01L21/302 , H01L21/76
CPC分类号： H01L21/2007 , H01L21/187 , H01L21/304 , H01L21/74 , H01L21/76251 , Y10S148/012 , Y10S148/159
摘要： A method of manufacturing a semiconductor substrate having a modified layer therein comprises the steps of mirror-polishing one surface of each of first and second semiconductor plates, forming a modified layer on at least one of the polished surfaces of the first and second semiconductor plates, and bonding the polished surfaces of the first and second semiconductor plates with each other in a clean atmosphere.
摘要翻译：制造其中具有改性层的半导体衬底的方法包括以下步骤：对第一和第二半导体板中的每一个的一个表面进行镜面抛光，在第一和第二半导体板的至少一个抛光表面上形成改性层，并且在清洁的气氛中将第一和第二半导体板的抛光表面彼此接合。

8. 发明授权

US5089134A Silica glass filter 失效
标题翻译：二氧化硅玻璃过滤器
公开(公告)号：US5089134A
公开(公告)日：1992-02-18
申请号：US633624
申请日：1990-12-26
申请人： Kuniko Ando , Koichi Shiraishi , Masaru Shimbo , Shunzo Shimai
发明人： Kuniko Ando , Koichi Shiraishi , Masaru Shimbo , Shunzo Shimai
IPC分类号： B01D29/37 , B01D39/20
CPC分类号： B01D39/201 , Y10S264/48 , Y10T428/249969 , Y10T428/252 , Y10T428/26
摘要： A silica glass filter comprises a porous support body composed of amorphous silica particles as a porous sintered body and having a purity of 99.9% or more and containing 150 ppm or less in total of impurities including alkali, alkali metal, heavy metal and/or elements of III B group, and a filtration layer formed on the support body. The filtration layer is composed of amorphous silica particles as a porous sintered body in a fine mode and has substantially the same purity as that of the support body.
摘要翻译：二氧化硅玻璃过滤器包括由无定形二氧化硅颗粒作为多孔烧结体构成的多孔载体，其纯度为99.9％以上，含有总计为150ppm以下的杂质，包括碱金属，碱金属，重金属和/或元素的IIIB族，以及形成在所述支撑体上的过滤层。过滤层由精细模式的多孔质烧结体的无定形二氧化硅粒子构成，并且与支撑体的纯度基本相同。

9. 发明授权

US4341980A Flat display device 失效
标题翻译：平板显示设备
公开(公告)号：US4341980A
公开(公告)日：1982-07-27
申请号：US183995
申请日：1980-09-04
申请人： Mikio Noguchi , Kazuho Kobayashi , Shigeo Takenaka , Masaru Shimbo
发明人： Mikio Noguchi , Kazuho Kobayashi , Shigeo Takenaka , Masaru Shimbo
IPC分类号： H01J29/04 , H01J29/46 , H01J31/12 , H01J63/02
CPC分类号： H01J29/467 , H01J29/04 , H01J31/127 , H01J2329/8625 , H01J2329/863
摘要： A flat display device comprises a vacuum envelope constituted by a back base plate consisting of an elastic metal plate and a display panel and accommodating a thermionic cathode structure and a plurality of electrode structures for controlling the electron beams emitted from the thermionic cathode structure. The thermionic cathode structure is divided into a plurality of sections each including a plurality of coiled thermionic cathode heaters connected in parallel and arranged such that each corresponds to each of picture element regions provided on the back side of the display panel. Voltage supply terminals for supplying power to the parallel coiled heaters in each section are led out through the back base plate via insulating members.
摘要翻译：平面显示装置包括由由弹性金属板和显示面板组成的后基板和容纳热离子阴极结构的多个电极结构以及用于控制从热离子阴极结构发射的电子束的多个电极结构构成的真空外壳。热离子阴极结构被分成多个部分，每个部分包括并联连接的多个线圈式热离子阴极加热器，并且被布置为使得每个部分对应于设置在显示面板背面的每个像素区域。用于向每个区段中的平行线圈式加热器供电的电压端子通过绝缘构件通过后基板引出。

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