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1. 发明申请

US20120146830A1 ANALOG DIGITAL CONVERTER 有权
标题翻译：模拟数字转换器
公开(公告)号：US20120146830A1
公开(公告)日：2012-06-14
申请号：US13243267
申请日：2011-09-23
申请人： Young-deuk JEON , Young Kyun CHO , Jaewon NAM , Jong-Kee KWON
发明人： Young-deuk JEON , Young Kyun CHO , Jaewon NAM , Jong-Kee KWON
IPC分类号： H03M1/12
CPC分类号： H03M1/164 , H03M1/468
摘要： Provided is an analog digital converter (ADC). The ADC includes: a capacitor array generating a level voltage; a comparator outputting a compare signal by comparing the level voltage; and a logic circuit determining digital bits of an analog signal based on the compare signal, wherein the logic circuit determines at least one digital bit among digital bits of the analog signal while a sampling operation of the analog signal is performed in the capacitor array.
摘要翻译：提供了一种模拟数字转换器（ADC）。 ADC包括：产生电平电压的电容器阵列; 比较器，通过比较电平电压输出比较信号; 以及逻辑电路，其基于所述比较信号确定模拟信号的数字位，其中所述逻辑电路在所述电容器阵列中执行所述模拟信号的采样操作时，确定所述模拟信号的数字位中的至少一个数字位。

2. 发明申请

US20130057424A1 ANALOG-DIGITAL CONVERTER AND CONVERTING METHOD USING CLOCK DELAY 失效
标题翻译：模拟数字转换器和使用时钟延迟的转换方法
公开(公告)号：US20130057424A1
公开(公告)日：2013-03-07
申请号：US13593301
申请日：2012-08-23
申请人： Young-deuk JEON , Woo Seok YANG , Tae Moon ROH , Jong-Kee KWON , Jongdae KIM
发明人： Young-deuk JEON , Woo Seok YANG , Tae Moon ROH , Jong-Kee KWON , Jongdae KIM
IPC分类号： H03M1/34 , H03M1/12
CPC分类号： H03M1/462
摘要： The present inventive concept relates to an analog-digital converter. The analog-digital converter includes a clock generating unit generating a clock signal; a clock delay adjusting unit outputting one of a first clock signal to a Kth clock signal according to a control signal; a capacitive digital-analog converting unit outputting a difference between the analog signal and a reference signal; a comparison unit judging whether an output of the capacitive digital-analog converting unit is 0, a positive number, or a negative number, in response to an output of the clock delay adjusting unit; and an SAR logic unit transferring an output of the comparison unit to the capacitive digital-analog converting unit in response to an output of the clock delay adjusting unit and performing a successive approximation operation to output the N-bit digital signal.
摘要翻译：本发明构思涉及一种模数转换器。模拟数字转换器包括产生时钟信号的时钟产生单元; 时钟延迟调整单元，根据控制信号将第一时钟信号中的一个输出到第K个时钟信号; 输出模拟信号和参考信号之间的差的电容数字 - 模拟转换单元; 比较单元，响应于时钟延迟调整单元的输出，判定电容数字 - 模拟转换单元的输出是0，正数还是负数; 以及SAR逻辑单元，响应于时钟延迟调整单元的输出，将比较单元的输出传送到电容数字 - 模拟转换单元，并执行逐次逼近操作以输出N位数字信号。

3. 发明申请

US20120062400A1 ANALOG DIGITAL CONVERTING DEVICE AND REFERENCE VOLTAGE CONTROLLING METHOD THEREOF 有权
标题翻译：模拟数字转换器件及其参考电压控制方法
公开(公告)号：US20120062400A1
公开(公告)日：2012-03-15
申请号：US12982547
申请日：2010-12-30
申请人： Young-deuk JEON
发明人： Young-deuk JEON
IPC分类号： H03M1/06 , H03M1/12 , H03M1/34
CPC分类号： H03M1/1019 , H03M1/1038 , H03M1/164
摘要： Provided are an analog digital converting device and a reference voltage controlling method thereof. The analog digital converting device includes: a first reference voltage generating circuit generating a first reference voltage; a second reference voltage generating circuit generating a second reference voltage; a first sub analog digital converter receiving an analog input signal and converting the analog input signal into a first digital signal by using the first reference voltage; an amplifier converting the first digital signal into a voltage corresponding to the first digital signal by using the first reference voltage and amplifying a difference between a voltage level of the analog input signal and a voltage level corresponding to the first digital signal to output a residual signal; and a second sub analog digital converter receiving the residual signal and converting the residual signal into a second digital signal by using the second reference voltage.
摘要翻译：提供了一种模拟数字转换装置及其参考电压控制方法。模拟数字转换装置包括：产生第一参考电压的第一参考电压产生电路; 产生第二参考电压的第二参考电压产生电路; 接收模拟输入信号并通过使用第一参考电压将模拟输入信号转换为第一数字信号的第一子模拟数字转换器; 放大器，通过使用第一参考电压将第一数字信号转换成对应于第一数字信号的电压，并且放大模拟输入信号的电压电平与对应于第一数字信号的电压电平之差，以输出残留信号 ; 以及第二子模拟数字转换器，其接收残余信号，并且通过使用第二参考电压将残差信号转换成第二数字信号。

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