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    • 1. 发明授权
    • Display drive circuit
    • 显示驱动电路
    • US08717338B2
    • 2014-05-06
    • US13063539
    • 2009-09-04
    • Young-Suk SonHyun-Min SongHyun-Ja ChoYong-Sung AhnHyung-Seog OhDae-Keun Han
    • Young-Suk SonHyun-Min SongHyun-Ja ChoYong-Sung AhnHyung-Seog OhDae-Keun Han
    • G06F3/038
    • G09G3/3614G09G3/3688G09G2310/0248G09G2310/0297G09G2330/021
    • A display driving circuit includes a buffer section, an N-dot switch circuit, a charge sharing switch circuit, and a sharing voltage level control switch circuit. The buffer section buffers a plurality of pixel driving signals outputted from a plurality of DACs. The N-dot switch circuit selects paths of the plurality of pixel driving signals outputted from the buffer section in response to a first path selecting signal or a second path selecting signal that is determined depending upon a dot inversion method, and switches the paths to a plurality of output terminals. The charge sharing switch circuit shares charges among the plurality of output terminals in response to a charge sharing control signal. The sharing voltage level control switch circuit controls charge sharing between the plurality of output terminals and a voltage level upon charge sharing, in response to a sharing voltage level control signal.
    • 显示驱动电路包括缓冲器部分,N点开关电路,电荷共享开关电路和共享电压电平控制开关电路。 缓冲器部分缓冲从多个DAC输出的多个像素驱动信号。 N点开关电路响应于根据点反转方法确定的第一路径选择信号或第二路径选择信号,选择从缓冲器部分输出的多个像素驱动信号的路径,并将路径切换到 多个输出端子。 电荷共享开关电路响应于电荷共享控制信号而在多个输出端子之间共享电荷。 响应于共享电压电平控制信号,共享电压电平控制开关电路控制多个输出端子之间的电荷共享和电荷共享时的电压电平。
    • 2. 发明申请
    • DISPLAY DRIVE CIRCUIT
    • 显示驱动电路
    • US20110164006A1
    • 2011-07-07
    • US13063539
    • 2009-09-04
    • Young-Suk SonHyun-Min SongHyun-Ja ChoYong-Sung AhnHyung-Seong OhDae-keun Han
    • Young-Suk SonHyun-Min SongHyun-Ja ChoYong-Sung AhnHyung-Seong OhDae-keun Han
    • G09G5/00
    • G09G3/3614G09G3/3688G09G2310/0248G09G2310/0297G09G2330/021
    • A display driving circuit includes a buffer section, an N-dot switch circuit, a charge sharing switch circuit, and a sharing voltage level control switch circuit. The buffer section buffers a plurality of pixel driving signals outputted from a plurality of DACs. The N-dot switch circuit selects paths of the plurality of pixel driving signals outputted from the buffer section in response to a first path selecting signal or a second path selecting signal that is determined depending upon a dot inversion method, and switches the paths to a plurality of output terminals. The charge sharing switch circuit shares charges among the plurality of output terminals in response to a charge sharing control signal. The sharing voltage level control switch circuit controls charge sharing between the plurality of output terminals and a voltage level upon charge sharing, in response to a sharing voltage level control signal.
    • 显示驱动电路包括缓冲器部分,N点开关电路,电荷共享开关电路和共享电压电平控制开关电路。 缓冲器部分缓冲从多个DAC输出的多个像素驱动信号。 N点开关电路响应于根据点反转方法确定的第一路径选择信号或第二路径选择信号,选择从缓冲器部分输出的多个像素驱动信号的路径,并将路径切换到 多个输出端子。 电荷共享开关电路响应于电荷共享控制信号而在多个输出端子之间共享电荷。 响应于共享电压电平控制信号,共享电压电平控制开关电路控制多个输出端子之间的电荷共享和电荷共享时的电压电平。
    • 3. 发明申请
    • POWER SUPPLY CIRCUIT FOR LIQUID CRYSTAL DISPLAY DEVICE
    • 液晶显示器件电源电路
    • US20120044227A1
    • 2012-02-23
    • US12909272
    • 2010-10-21
    • Yong-Sung AhnJung-Min ChoiSang-Rok ChaDae-Keun HanHyung-Seog OhYong-Suk Kim
    • Yong-Sung AhnJung-Min ChoiSang-Rok ChaDae-Keun HanHyung-Seog OhYong-Suk Kim
    • G09G5/00G09G3/36
    • G09G3/3696G09G3/3677G09G2330/02G09G2330/06
    • A power supply circuit of a liquid crystal display device includes a first positive polarity charge charging unit including a first capacitor connected to positive and negative power terminals through switches to charge a charge, a second positive polarity charge charging unit including a second capacitor connected to the positive power terminal and a ground terminal through switches to charge a charge, a first positive polarity charge loading unit loading the charge supplied through the positive power terminal to a negative polarity terminal, a second positive polarity charge loading unit loading the charge charged in the first capacitor to a negative polarity terminal, a third positive polarity charge loading unit loading the charge charged in the second capacitor, and a positive polarity charge charging/loading control unit outputting charging control signals with a same phase to the switches, and periodically or irregularly changing durations of the charging and loading control signals.
    • 液晶显示装置的电源电路包括第一正极性充电充电单元,其包括通过开关对正电源端子和负电源端子连接的第一电容器进行充电;第二正极性充电单元,包括连接到 正电源端子和接地端子,通过开关对电荷充电,第一正极性电荷负载单元将通过正电源端子提供的电荷负载到负极端子;第二正极性电荷负载单元,负载在第一 电容器连接到负极端子,第三正极性电荷负载单元加载充电在第二电容器中的电荷;以及正极性充电充电/负载控制单元,向开关输出具有相同相位的充电控制信号,并周期性地或不规则地改变 充电和加载控制的持续时间 诺尔斯
    • 5. 发明申请
    • DISPLAY DRIVING INTEGRATED CIRCUIT AND DISPLAY DRIVING SYSTEM
    • 显示驱动集成电路和显示驱动系统
    • US20100259564A1
    • 2010-10-14
    • US12678999
    • 2008-09-29
    • Yong-Sung AhnDae-Seong KimDae-Keun Han
    • Yong-Sung AhnDae-Seong KimDae-Keun Han
    • G06F3/038
    • G09G3/3688G09G2310/027G09G2370/08
    • Provided is a high-resolution display driving system without a new design of interfaces between a timing controller and DDIs, particularly, without an entire change of a DAC unit having a role of determining gradation representation of DDIs and offsets between channels. The high-resolution display driving system includes a timing controller and a DDI unit. The timing controller generates a differential clock signal and differential data. The DDI unit generates a plurality of converted signals corresponding to the differential data in response to an operation instructing signal, a reset/enable signal, and the differential clock signal. A scheme of data transmission from the timing controller to the DDI unit is at least one of a multi-drop scheme and an m-LVDS (mini low voltage differential signaling) scheme.
    • 提供了一种高分辨率显示驱动系统,没有时序控制器和DDI之间的接口的新设计,特别是没有完全改变具有确定DDI的灰度表示和通道之间的偏移的DAC单元的整体变化。 高分辨率显示驱动系统包括定时控制器和DDI单元。 定时控制器产生差分时钟信号和差分数据。 DDI单元响应于操作指示信号,复位/使能信号和差分时钟信号产生对应于差分数据的多个转换信号。 从定时控制器到DDI单元的数据传输方案是多点方案和m-LVDS(迷你低电压差分信令)方案中的至少一种。