专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20110248972A1 POWER CONNECTION STRUCTURE OF DRIVER IC CHIP 有权
标题翻译：驱动IC芯片的电源连接结构
公开(公告)号：US20110248972A1
公开(公告)日：2011-10-13
申请号：US13081043
申请日：2011-04-06
申请人： Yong-Sung AHN , Jong-Soo Lee , Yu-Na Shin , Yong-Suk Kim
发明人： Yong-Sung AHN , Jong-Soo Lee , Yu-Na Shin , Yong-Suk Kim
IPC分类号： G06F3/038
CPC分类号： G09G3/3648 , G09G2300/0413 , G09G2300/0426 , G09G2320/0223 , G09G2330/02
摘要： A power connection structure of a driver IC chip including a first power terminal unit formed on one side thereof, a second power terminal unit formed on the other side thereof, and a dummy power terminal unit formed between the first power terminal unit and the second power terminal unit. The driver IC chip is mounted to a liquid crystal panel of a liquid crystal display device in a chip-on-glass (COG) type. Both of the first power terminal unit and the dummy power terminal unit and both of the dummy power terminal unit and the second power terminal unit are connected through routing lines in the driver IC chip.
摘要翻译：驱动器IC芯片的电源连接结构，包括形成在其一侧的第一电力端子单元，形成在其另一侧的第二电力端子单元和形成在第一电力端子单元和第二电力之间的虚拟电源端子单元终端单元。驱动IC芯片安装在玻璃（COG）型液晶显示装置的液晶面板上。第一电源端子单元和虚拟电源端子单元以及虚拟电源端子单元和第二电力端子单元都通过驱动器IC芯片中的布线来连接。

2. 发明申请

US20110175942A1 Gamma Reference Voltage Output Circuit of Source Driver 审中-公开
标题翻译：源驱动器的伽马参考电压输出电路
公开(公告)号：US20110175942A1
公开(公告)日：2011-07-21
申请号：US13008313
申请日：2011-01-18
申请人： Yong-Sung Ahn , Jong-Soo Lee
发明人： Yong-Sung Ahn , Jong-Soo Lee
IPC分类号： G09G5/10
CPC分类号： G09G3/3688 , G09G2310/027 , G09G2310/0291 , G09G2320/0276 , G09G2320/0673
摘要： A gamma reference voltage output circuit of a source driver includes a reference voltage generation unit configured to divide power supply voltages by using resistors which are connected in series, and generate a plurality of gamma reference voltages; a gamma buffer unit having a plurality of gamma buffers which selectively output, through internal switching operations, gamma reference voltages needed by a plurality of gamma voltage generation units; and the plurality of gamma voltage generation units configured to divide the gamma reference voltages which are inputted from the gamma buffer unit, by using resistors which are connected in series, in conformity with a required mode and output divided gamma voltages.
摘要翻译：源极驱动器的伽马参考电压输出电路包括参考电压产生单元，被配置为通过使用串联连接的电阻来分配电源电压，并产生多个伽马参考电压; 具有多个伽马缓冲器的伽马缓冲器单元，其通过内部切换操作选择性地输出多个伽马电压产生单元所需的伽马参考电压; 并且所述多个伽马电压生成单元被配置为通过使用与所需模式一致的串联连接的电阻来分割从伽马缓冲器单元输入的伽马参考电压并输出分割的伽马电压。

3. 发明申请

US20080068912A1 Flash memory device and refresh method thereof 失效
标题翻译：闪存设备及其刷新方法
公开(公告)号：US20080068912A1
公开(公告)日：2008-03-20
申请号：US11783173
申请日：2007-04-06
申请人： Jong-Soo Lee
发明人： Jong-Soo Lee
IPC分类号： G11C7/12
CPC分类号： G11C16/3418 , G11C11/406 , G11C11/40622 , G11C16/3431
摘要： A method for refreshing a flash memory device includes providing first and second refresh fields that include a plurality of memory blocks, and determining, when there is a request for a refresh, a condition of a memory block to be refreshed in accordance with which of the first and second refresh fields includes the memory block to be refreshed.
摘要翻译：一种刷新闪速存储器件的方法包括：提供包括多个存储器块的第一和第二刷新场，以及当存在要刷新的请求时，确定要刷新的存储器块的状态，第一和第二刷新字段包括要刷新的存储块。

4. 发明申请

US20070234183A1 Multi-bit memory device and memory system 有权
标题翻译：多位存储器和存储器系统
公开(公告)号：US20070234183A1
公开(公告)日：2007-10-04
申请号：US11605977
申请日：2006-11-30
申请人： Sang-Won Hwang , Jong-Soo Lee
发明人： Sang-Won Hwang , Jong-Soo Lee
IPC分类号： G11C29/00
CPC分类号： G11C29/44 , G11C11/5628 , G11C11/5642 , G11C16/04 , G11C16/0483 , G11C29/00 , G11C29/42 , G11C29/52 , G11C2029/0409 , G11C2211/5641 , G11C2211/5642
摘要： A nonvolatile memory device, memory system and read method are disclosed. The memory device comprises a memory cell array comprising a plurality of memory blocks each having a plurality of memory cells adapted to store N bits, where N is an integer greater than 1, a page buffer configured to perform a read operation adapted to read data from the memory cell array and output read data, an error correction circuit configured to detect and correct an error in read data stored in a memory block K and generate corresponding error information, and a control circuit configured to reduce the number of bits stored in the plurality of memory cells for memory block K from N to J, where J is an integer less than N but greater than zero, in response to the error information.
摘要翻译：公开了非易失性存储器件，存储器系统和读取方法。存储器件包括存储单元阵列，其包括多个存储器块，每个存储块具有适于存储N位的多个存储器单元，其中N是大于1的整数，被配置为执行适于从存储单元阵列和输出读取数据，错误校正电路，被配置为检测和校正存储在存储块K中的读取数据中的错误并产生相应的错误信息;以及控制电路，被配置为减少存储在多个存储单元阵列中的位数用于存储块K从N到J的存储器单元，其中J是小于N但大于零的整数，其响应于错误信息。

5. 发明申请

US20050134341A1 Duty cycle correcting circuits having a variable gain and methods of operating the same 失效
标题翻译：具有可变增益的占空比校正电路及其操作方法
公开(公告)号：US20050134341A1
公开(公告)日：2005-06-23
申请号：US10972847
申请日：2004-10-25
申请人： Jong-Soo Lee
发明人： Jong-Soo Lee
IPC分类号： H03K5/15 , H01L21/82 , H01L27/00 , H03K3/017 , H03K5/04 , H03K5/156
CPC分类号： H03K5/1565
摘要： Duty cycle correcting circuits having a gain adjusting circuit that selects one of a plurality of gains of the duty cycle correcting circuit based on a frequency of an input signal. An output circuit outputs a duty cycle corrected output signal based on the input signal and the selected one of the plurality of gains. The input signal may be an input clock signal and the output signal may be a corrected clock signal. Methods are also provided.
摘要翻译：具有增益调整电路的占空比校正电路，其基于输入信号的频率选择占空比校正电路的多个增益中的一个。输出电路基于输入信号和多个增益中选择的一个来输出占空比校正输出信号。输入信号可以是输入时钟信号，并且输出信号可以是校正的时钟信号。还提供了方法。

6. 发明申请

US20050050032A1 Method for automatically managing information using hyperlink features of a mobile terminal 有权
标题翻译：使用移动终端的超链接特征来自动管理信息的方法
公开(公告)号：US20050050032A1
公开(公告)日：2005-03-03
申请号：US10902801
申请日：2004-08-02
申请人： Jong-Soo Lee
发明人： Jong-Soo Lee
IPC分类号： H04B1/40 , G06F17/30
CPC分类号： G06F17/30893 , Y10S707/99933
摘要： A system and method for managing information of a mobile terminal automatically generates a link to related information in association with one or more separate function databases in the mobile terminal. All information stored in each function database is also stored in a link database to allow other functions to refer to them. When a certain function is used, its related information is automatically searched for in the link database. If related information exists, a hyperlink to the related information is automatically generated, so that a user can simply use the related information as necessary.
摘要翻译：用于管理移动终端的信息的系统和方法自动地生成与移动终端中的一个或多个单独的功能数据库相关联的与相关信息的链接。存储在每个功能数据库中的所有信息也存储在链接数据库中，以允许其他功能引用它们。当使用某个功能时，会在链接数据库中自动搜索相关信息。如果存在相关信息，则自动生成与相关信息的超链接，从而用户可以根据需要简单地使用相关信息。

7. 发明申请

US20050034741A1 Tooth-cleaning paper combined with dental floss 失效
标题翻译：牙齿清洁纸与牙线结合
公开(公告)号：US20050034741A1
公开(公告)日：2005-02-17
申请号：US10493174
申请日：2002-11-11
申请人： Jong-Soo Lee
发明人： Jong-Soo Lee
IPC分类号： A61C15/04 , A61C17/00 , A45D40/26
CPC分类号： A61C15/04
摘要： Disclosed is a tooth-cleaning paper combined with dental floss, in which the tooth-cleaning paper is formed of a thin paper or a gauze sterilized and wetted with an aqueous fluoride solution and has a plurality of edge cuts formed along an edge of the tooth-cleaning paper, and the dental floss is provided in a single strand or two strands along a margin of the tooth-cleaning paper to be fixed to the tooth-cleaning paper and has an exposed dental floss part formed by each of the plurality of edge cuts of the tooth-cleaning paper. The tooth-cleaning paper of the current invention is advantageous in terms of easily cleaning the teeth and interdental portions of users while not offending other persons at any time and in any place.
摘要翻译：公开了一种与牙线结合的牙齿清洁纸，其中牙齿清洁纸由薄纸或用氟化钠水溶液消毒和润湿的纱布形成，并且具有沿着牙齿边缘形成的多个边缘切口清洁纸，并且牙线沿着牙齿清洁纸的边缘以单股或两股提供，以固定到牙齿清洁纸上，并且具有由多个边缘中的每一个形成的暴露的牙线部分切割牙齿清洁纸。本发明的牙齿清洁纸在容易地清洁使用者的牙齿和齿间部分方面是有利的，而不会在任何时间和任何地方冒犯别人。

8. 发明授权

US5514708A Cytotoxic metabolites from Myriapora truncata 失效
标题翻译：来自Myriapora truncata + B的细胞毒代谢产物
公开(公告)号：US5514708A
公开(公告)日：1996-05-07
申请号：US198444
申请日：1994-02-18
申请人： Kenneth L. Rinehart , Jie-Fei Cheng , Jong-Soo Lee
发明人： Kenneth L. Rinehart , Jie-Fei Cheng , Jong-Soo Lee
IPC分类号： C07D303/32 , C07D407/06 , C07D493/08 , A61K31/35 , A61K31/335 , C07D309/10
CPC分类号： C07D407/06 , C07D303/32 , C07D493/08
摘要： The present invention is based upon the discovery that the methanol extract of the bryozoan Myriapora truncata showed potent cytotoxicity against L1210 murine leukemia cells (99% inhibition at 50 .mu.g/mL). Fractionation and purification of active components from this extract, guided by a cytotoxicity assay, resulted in the isolation of a novel, highly cytotoxic polyketide-derived metabolite MT-332 (Compound 3) and its equilibrium isomer (Compound 4), along with two less active compounds, MT-381 (Compound 1) and MT-381-B (Compound 2). The equilibrium mixture of Compounds 3 and 4 showed 88% inhibition at 0.2 .mu.g/mL against L1210 cells. ##STR1##
摘要翻译：本发明基于以下发现，即布鲁诺酵母Myriapora truncata的甲醇提取物显示出对L1210鼠白血病细胞的强力细胞毒性（以50μg/ mL抑制99％）。通过细胞毒性测定指导，从该提取物中分离和纯化活性成分，导致分离出一种新型高度细胞毒性的聚酮化合物衍生的代谢物MT-332（化合物3）及其平衡异构体（化合物4）以及两个较少的活性化合物，MT-381（化合物1）和MT-381-B（化合物2）。化合物3和4的平衡混合物对于L1210细胞显示出0.2μg/ mL的88％抑制。 + TR

9. 发明授权

US09846446B2 Apparatus for compensating for temperature and method therefor 有权
公开(公告)号：US09846446B2
公开(公告)日：2017-12-19
申请号：US14991408
申请日：2016-01-08
申请人： Jae-Won Choi , Jong-Soo Lee , Dae-Hyun Kwon , Bui Quang Diep , Seong-Sik Myoung , Jae-Hun Lee
发明人： Jae-Won Choi , Jong-Soo Lee , Dae-Hyun Kwon , Bui Quang Diep , Seong-Sik Myoung , Jae-Hun Lee
IPC分类号： G05F3/26 , G05F3/24 , G05F1/46 , G05F1/567
CPC分类号： G05F3/267 , G05F1/462 , G05F1/567 , G05F3/242 , G05F3/245
摘要： Disclosed are a temperature compensation apparatus and method. The apparatus includes a reference signal generator that supplies at least one of a first current which is constant regardless of temperature variation and a second current which is proportional to temperature variation, a slope amplifier that determines a first output current having a second temperature coefficient which is a multiple of a first temperature coefficient of the second current, based on the first current and the second current, and a slope controller that determines a second output current having a third temperature coefficient, using a weighted average of the first current and the second current.

10. 发明授权

US07757153B2 Multi-bit memory device and memory system 有权
标题翻译：多位存储器和存储器系统
公开(公告)号：US07757153B2
公开(公告)日：2010-07-13
申请号：US11605977
申请日：2006-11-30
申请人： Sang-Won Hwang , Jong-Soo Lee
发明人： Sang-Won Hwang , Jong-Soo Lee
IPC分类号： G11C29/00
CPC分类号： G11C29/44 , G11C11/5628 , G11C11/5642 , G11C16/04 , G11C16/0483 , G11C29/00 , G11C29/42 , G11C29/52 , G11C2029/0409 , G11C2211/5641 , G11C2211/5642
摘要： A nonvolatile memory device, memory system and read method are disclosed. The memory device comprises a memory cell array comprising a plurality of memory blocks each having a plurality of memory cells adapted to store N bits, where N is an integer greater than 1, a page buffer configured to perform a read operation adapted to read data from the memory cell array and output read data, an error correction circuit configured to detect and correct an error in read data stored in a memory block K and generate corresponding error information, and a control circuit configured to reduce the number of bits stored in the plurality of memory cells for memory block K from N to J, where J is an integer less than N but greater than zero, in response to the error information.
摘要翻译：公开了非易失性存储器件，存储器系统和读取方法。存储器件包括存储单元阵列，其包括多个存储器块，每个存储块具有适于存储N位的多个存储器单元，其中N是大于1的整数，被配置为执行适于从存储单元阵列和输出读取数据，错误校正电路，被配置为检测和校正存储在存储块K中的读取数据中的错误并产生相应的错误信息;以及控制电路，被配置为减少存储在多个存储单元阵列中的位数用于存储块K从N到J的存储器单元，其中J是小于N但大于零的整数，其响应于错误信息。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式