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1. 发明申请

US20140190410A1 EQUIPMENT FOR MANUFACTURING SEMICONDUCTOR 审中-公开
标题翻译：制造半导体设备
公开(公告)号：US20140190410A1
公开(公告)日：2014-07-10
申请号：US14235896
申请日：2012-07-31
申请人： Young Dae Kim , Jun Jin Hyon , Sang Ho Woo , Seung Woo Shin , Hai Won Kim
发明人： Young Dae Kim , Jun Jin Hyon , Sang Ho Woo , Seung Woo Shin , Hai Won Kim
IPC分类号： C30B25/10
CPC分类号： C30B25/10 , C30B25/08 , C30B29/06 , C30B35/00 , H01L21/02046 , H01L21/67178 , H01L21/67207 , H01L21/67757
摘要： Provided is an equipment for manufacturing a semiconductor. The equipment for manufacturing a semiconductor includes a cleaning chamber in which a cleaning process is performed on substrates, an epitaxial chamber in which an epitaxial process for forming an epitaxial layer on each of the substrates is performed, and a transfer chamber to which the cleaning chamber and the epitaxial chamber are connected to sides surfaces thereof, the transfer chamber including a substrate handler for transferring the substrates, on which the cleaning process is completed, into the epitaxial chamber.
摘要翻译：提供了一种用于制造半导体的设备。用于制造半导体的设备包括其中对基板进行清洁处理的清洁室，其中执行在每个基板上形成外延层的外延工艺的外延室，以及清洁室并且外延室连接到其侧表面，转移室包括用于将完成清洁处理的基板转移到外延室中的基板处理器。

2. 发明申请

US20140209024A1 EQUIPMENT FOR MANUFACTURING SEMICONDUCTOR 审中-公开
标题翻译：制造半导体设备
公开(公告)号：US20140209024A1
公开(公告)日：2014-07-31
申请号：US14235901
申请日：2012-07-31
申请人： Young Dae Kim , Jun Jin Hyon , Sang Ho Woo , Seung Woo Shin , Hai Won Kim
发明人： Young Dae Kim , Jun Jin Hyon , Sang Ho Woo , Seung Woo Shin , Hai Won Kim
IPC分类号： H01L21/67
CPC分类号： H01L21/67184 , C30B25/08 , C30B29/06 , C30B35/005 , H01L21/02046 , H01L21/67051 , H01L21/67178 , H01L21/67757
摘要： Provided is an equipment for manufacturing a semiconductor. The equipment for manufacturing a semiconductor includes a cleaning chamber in which a cleaning process is performed on substrates, an epitaxial chamber in which an epitaxial process for forming an epitaxial layer on each of the substrates is performed, a buffer chamber having a storage space for storing the substrates, and a transfer chamber to which the cleaning chamber, the buffer chamber, and the epitaxial chamber are connected to side surfaces thereof, the transfer chamber comprising a substrate handler for transferring the substrates between the cleaning chamber, the buffer chamber, and the epitaxial chamber. The substrate handler successively transfers the substrates, on which the cleaning process is completed, into the buffer chamber, transfers the substrates stacked within the buffer chamber the epitaxial chamber, and successively transfers the substrates, on which the epitaxial layers are respectively formed, into the buffer chamber.
摘要翻译：提供了一种用于制造半导体的设备。用于制造半导体的设备包括其中对基板进行清洁处理的清洁室，其中执行在每个基板上形成外延层的外延工艺的外延室，具有用于存储的存储空间的缓冲室所述基板和所述清洁室，所述缓冲室和所述外延室连接到其侧表面的传送室，所述传送室包括用于在所述清洁室，所述缓冲室和所述缓冲室之间传送所述基板的基板处理器外延室。衬底处理器将完成清洁处理的衬底连续地传送到缓冲室中，将堆叠在缓冲室内的衬底传送到外延室，并且将分别形成有外延层的衬底依次传送到缓冲室。

3. 发明申请

US20140174357A1 EQUIPMENT FOR MANUFACTURING SEMICONDUCTOR 审中-公开
标题翻译：制造半导体设备
公开(公告)号：US20140174357A1
公开(公告)日：2014-06-26
申请号：US14235313
申请日：2012-07-31
申请人： Young Dae Kim , Jun Jin Hyon , Sang Ho Woo , Seung Woo Shin , Hai Won Kim
发明人： Young Dae Kim , Jun Jin Hyon , Sang Ho Woo , Seung Woo Shin , Hai Won Kim
IPC分类号： C30B25/02
CPC分类号： C30B25/02 , C23C16/0236 , C23C16/54 , C30B25/08 , C30B35/005 , H01L21/02046 , H01L21/67051 , H01L21/67178 , H01L21/67757
摘要： Provided is an equipment for manufacturing a semiconductor. The equipment for manufacturing a semiconductor includes a cleaning chamber in which a cleaning process is performed on substrates, an epitaxial chamber in which an epitaxial process for forming an epitaxial layer on each of the substrates is performed, and a transfer chamber to which the cleaning chamber and the epitaxial chamber are connected to sides surfaces thereof, the transfer chamber including a substrate handler for transferring the substrates, on which the cleaning process is completed, into the epitaxial chamber. The cleaning chamber is performed in a batch type with respect to the plurality of substrates.
摘要翻译：提供了一种用于制造半导体的设备。用于制造半导体的设备包括其中对基板进行清洁处理的清洁室，其中执行在每个基板上形成外延层的外延工艺的外延室，以及清洁室并且外延室连接到其侧表面，转移室包括用于将完成清洁处理的基板转移到外延室中的基板处理器。清洁室相对于多个基板以批式进行。

4. 发明申请

US20130178066A1 METHOD AND APPARATUS FOR MANUFACTURING THREE-DIMENSIONAL-STRUCTURE MEMORY DEVICE 有权
标题翻译：用于制造三维结构存储器件的方法和装置
公开(公告)号：US20130178066A1
公开(公告)日：2013-07-11
申请号：US13823131
申请日：2011-10-06
申请人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
发明人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
IPC分类号： H01L21/306
CPC分类号： H01L21/306 , C23C16/4585 , H01L21/02126 , H01L21/02129 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/30604 , H01L21/31111 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.
摘要翻译：提供一种制造具有三维结构的存储器件的方法，其包括在衬底上交替堆叠一个或多个电介质层和一个或多个牺牲层，形成通过电介质层和牺牲层的通孔，形成填充通孔的图案，形成穿过电介质层和牺牲层的开口，以及通过开口提供蚀刻剂以除去牺牲层。电介质层的堆叠包括向衬底供给选自由SiH 4，Si 2 H 6，Si 3 H 8和Si 4 H 10组成的组中的一种或多种气体，以沉积氧化硅层。牺牲层的堆叠包括向基板供应一种或多种选自SiH 4，Si 2 H 6，Si 3 H 8，Si 4 H 10和二氯硅烷（SiCl 2 H 2）的气体和氨基气体，以沉积氮化硅层。

5. 发明授权

US09396954B2 Method and apparatus for manufacturing three-dimensional-structure memory device 有权
标题翻译：用于制造三维结构存储器件的方法和装置
公开(公告)号：US09396954B2
公开(公告)日：2016-07-19
申请号：US13823131
申请日：2011-10-06
申请人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
发明人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
IPC分类号： H01L21/306 , C23C16/458 , H01L21/02 , H01L21/311 , H01L27/115 , H01L29/66 , H01L29/792
CPC分类号： H01L21/306 , C23C16/4585 , H01L21/02126 , H01L21/02129 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02271 , H01L21/30604 , H01L21/31111 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.
摘要翻译：提供一种制造具有三维结构的存储器件的方法，其包括在衬底上交替堆叠一个或多个电介质层和一个或多个牺牲层，形成通过电介质层和牺牲层的通孔，形成填充通孔的图案，形成穿过电介质层和牺牲层的开口，以及通过开口提供蚀刻剂以除去牺牲层。电介质层的堆叠包括向衬底供给选自由SiH 4，Si 2 H 6，Si 3 H 8和Si 4 H 10组成的组中的一种或多种气体，以沉积氧化硅层。牺牲层的堆叠包括向基板供应一种或多种选自SiH 4，Si 2 H 6，Si 3 H 8，Si 4 H 10和二氯硅烷（SiCl 2 H 2）的气体和氨基气体，以沉积氮化硅层。

6. 发明申请

US20130171827A1 METHOD AND APPARATUS FOR MANUFACTURING THREE-DIMENSIONAL-STRUCTURE MEMORY DEVICE 有权
标题翻译：用于制造三维结构存储器件的方法和装置
公开(公告)号：US20130171827A1
公开(公告)日：2013-07-04
申请号：US13822416
申请日：2011-10-06
申请人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
发明人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
IPC分类号： H01L21/306 , H01L21/67
CPC分类号： H01L21/306 , C23C16/4585 , H01L21/02126 , H01L21/02129 , H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/30604 , H01L21/31111 , H01L21/67069 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiCl2H2) to the substrate.
摘要翻译：根据本发明的一个实施例的用于制造具有垂直结构的存储器件的方法包括：在衬底上交替层叠一个或多个绝缘层和一个或多个牺牲层的步骤; 形成用于穿透绝缘层和牺牲层的穿透孔的步骤; 形成填充贯通孔的图案的工序; 用于形成用于穿透绝缘层和牺牲层的开口的步骤; 以及通过向所述开口供给蚀刻剂来除去所述牺牲层的步骤，其中所述层叠所述绝缘层的步骤包括通过向所述基板供给至少一种选自SiH 4的气体来沉积第一氧化硅膜的步骤 Si 2 H 6，Si 3 H 8，Si 4 H 10，层叠牺牲层的步骤包括通过向衬底提供二氯硅烷（SiCl 2 H 2）而沉积第二氧化硅膜的步骤。

7. 发明授权

US09425057B2 Method and apparatus for manufacturing three-dimensional-structure memory device 有权
标题翻译：用于制造三维结构存储器件的方法和装置
公开(公告)号：US09425057B2
公开(公告)日：2016-08-23
申请号：US13822416
申请日：2011-10-06
申请人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
发明人： Sung Kil Cho , Hai Won Kim , Sang Ho Woo , Seung Woo Shin , Gil Sun Jang , Wan Suk Oh
IPC分类号： H01L21/306 , C23C16/458 , H01L21/02 , H01L21/311 , H01L27/115 , H01L29/66 , H01L29/792 , H01L21/67
CPC分类号： H01L21/306 , C23C16/4585 , H01L21/02126 , H01L21/02129 , H01L21/02164 , H01L21/02211 , H01L21/02271 , H01L21/30604 , H01L21/31111 , H01L21/67069 , H01L27/11578 , H01L27/11582 , H01L29/66833 , H01L29/7926
摘要： A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiCl2H2) to the substrate.
摘要翻译：根据本发明的一个实施例的用于制造具有垂直结构的存储器件的方法包括：在衬底上交替层叠一个或多个绝缘层和一个或多个牺牲层的步骤; 形成用于穿透绝缘层和牺牲层的穿透孔的步骤; 形成填充贯通孔的图案的工序; 用于形成用于穿透绝缘层和牺牲层的开口的步骤; 以及通过向所述开口供给蚀刻剂来除去所述牺牲层的步骤，其中所述层叠所述绝缘层的步骤包括通过向所述基板供给至少一种选自SiH 4的气体来沉积第一氧化硅膜的步骤 Si 2 H 6，Si 3 H 8，Si 4 H 10，层叠牺牲层的步骤包括通过向衬底提供二氯硅烷（SiCl 2 H 2）而沉积第二氧化硅膜的步骤。

8. 发明授权

US08828890B2 Method for depositing cyclic thin film 有权
标题翻译：沉积环状薄膜的方法
公开(公告)号：US08828890B2
公开(公告)日：2014-09-09
申请号：US13808926
申请日：2011-08-01
申请人： Hai Won Kim , Sang Ho Woo
发明人： Hai Won Kim , Sang Ho Woo
IPC分类号： H01L21/02 , C23C16/34 , C23C16/40 , C23C16/455
CPC分类号： H01L21/02271 , C23C16/345 , C23C16/401 , C23C16/4554 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02219 , H01L21/02274 , H01L21/0228 , H01L21/02532 , H01L21/0262
摘要： Provided is a method of depositing a cyclic thin film that can provide excellent film properties and step coverage. The method comprises the steps of forming a silicon thin film by repeating a silicon deposition step for depositing silicon on a substrate by injecting a silicon precursor into a chamber into which the substrate is loaded and a first purge step for removing a non-reacted silicon precursor and a reacted byproduct from the chamber; and forming the insulating film including silicon from the silicon thin film by forming a plasma atmosphere into the chamber.
摘要翻译：提供一种沉积能够提供优异的膜性质和阶梯覆盖的环状薄膜的方法。该方法包括以下步骤：通过重复硅沉积步骤形成硅薄膜，用于通过将硅前体注入到其中负载衬底的室中沉积硅，以及用于去除未反应的硅前体的第一吹扫步骤和来自室的反应副产物; 以及通过在所述室中形成等离子体气氛，从所述硅薄膜形成包括硅的绝缘膜。

9. 发明申请

US20130101752A1 METHOD FOR DEPOSITING CYCLIC THIN FILM 审中-公开
标题翻译：沉积环状薄膜的方法
公开(公告)号：US20130101752A1
公开(公告)日：2013-04-25
申请号：US13808111
申请日：2011-08-01
申请人： Hai Won Kim , Sang Ho Woo
发明人： Hai Won Kim , Sang Ho Woo
IPC分类号： B05D3/14
CPC分类号： B05D3/145 , C23C16/345 , C23C16/401 , C23C16/4554 , H01L21/02164 , H01L21/0217 , H01L21/02274 , H01L21/0228 , H01L21/02532 , H01L21/0262
摘要： Provided is a method of depositing a cyclic thin film that can provide excellent film properties and step coverage. The method includes the steps of depositing an insulating film by repeatedly performing a deposition step for depositing silicon on a substrate by injecting a silicon precursor into a chamber into which the substrate is loaded, a first purge step for removing a non-reacted silicon precursor and a reacted byproduct from the chamber, a reaction step for forming the deposited silicon as an insulating film including silicon by supplying a first reaction gas into the chamber and a second purge step for removing a non-reacted first reaction gas and a reacted byproduct from the chamber; and densifying the insulating film including silicon by supplying a plasma atmosphere into the chamber.
摘要翻译：提供一种沉积能够提供优异的膜性质和阶梯覆盖的环状薄膜的方法。该方法包括以下步骤：通过反复进行沉积步骤沉积绝缘膜，该沉积步骤通过将硅前体注入到其中载置衬底的室中沉积硅，用于除去未反应的硅前体的第一清除步骤和来自所述室的反应副产物，用于通过向所述室中供应第一反应气体而形成沉积的硅作为包括硅的绝缘膜的反应步骤和用于除去未反应的第一反应气体的第二吹扫步骤和从所述反应的副产物房间以及通过将等离子体气氛供应到所述室中来致密化包括硅的绝缘膜。

10. 发明申请

US20110136328A1 METHOD FOR DEPOSITING ULTRA FINE GRAIN POLYSILICON THIN FILM 审中-公开
标题翻译：沉积超细晶粒多晶硅薄膜的方法
公开(公告)号：US20110136328A1
公开(公告)日：2011-06-09
申请号：US12990632
申请日：2009-04-29
申请人： Hai Won Kim , Sang Ho Woo , Sung Gil Cho , Song Hwan Park , Kyung Soo Jung
发明人： Hai Won Kim , Sang Ho Woo , Sung Gil Cho , Song Hwan Park , Kyung Soo Jung
IPC分类号： H01L21/20 , C23C16/24 , C23C16/56 , C23C16/455
CPC分类号： C23C16/24 , H01L21/02532 , H01L21/0262 , H01L21/28556 , H01L21/32055
摘要： According to the present invention, a method for depositing an ultra-fine crystal particle polysilicon thin film supplies a source gas in a chamber loaded with a substrate to deposit a polysilicon thin film on the substrate, wherein the source gas contains a silicon-based gas, an oxygen-based gas and a phosphorous-based gas. The mixture ratio of the oxygen-based gas to the silicon-based gas may be 0.15 or lower (but, excluding zero). Oxygen in the thin film may be 0.8 atomic percent or lower (but, excluding zero).
摘要翻译：根据本发明，用于沉积超细晶粒多晶硅薄膜的方法在负载有衬底的室中提供源气体，以在衬底上沉积多晶硅薄膜，其中源气体包含硅基气体，氧基气体和磷基气体。氧基气体与硅系气体的混合比可以为0.15以下（但不包括零）。薄膜中的氧可以为0.8原子％以下（但不包括零）。

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