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1. 发明授权

US07045879B2 Silicon carbide semiconductor device having enhanced carrier mobility 有权
标题翻译：具有增强的载流子迁移率的碳化硅半导体器件
公开(公告)号：US07045879B2
公开(公告)日：2006-05-16
申请号：US10744071
申请日：2003-12-24
申请人： Yoshiyuki Hisada , Eiichi Okuno , Yoshihito Mitsuoka , Shinji Amano , Takeshi Endo , Shinichi Mukainakano , Ayahiko Ichimiya
发明人： Yoshiyuki Hisada , Eiichi Okuno , Yoshihito Mitsuoka , Shinji Amano , Takeshi Endo , Shinichi Mukainakano , Ayahiko Ichimiya
IPC分类号： H01L31/0312 , H01L31/036
CPC分类号： H01L29/7828 , H01L21/3247 , H01L29/045 , H01L29/1608 , H01L29/41766 , H01L29/66068 , H01L29/78 , H01L29/7802 , H01L29/7838
摘要： The principal surface of a p-type SiC substrate (1) is formed of a face intersecting (0001) Si-face at 10 to 16°. An n+ source region (2) and an n+ drain region (3) are formed in a surface layer portion at the principal surface of the p-type SiC substrate (1) so as to be separated from each other. A gate electrode (5) is formed on a gate oxide film (4) on the principal surface of the p-type SiC substrate (1).
摘要翻译： p型SiC衬底（1）的主表面由10-16度的与（0001）Si面相交的面形成。在p型SiC衬底的主表面上的表面层部分形成有n + +源极区（2）和n + +漏极区（3） 1）以便彼此分离。栅极电极（5）形成在p型SiC衬底（1）的主表面上的栅氧化膜（4）上。

2. 发明授权

US6165822A Silicon carbide semiconductor device and method of manufacturing the same 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US6165822A
公开(公告)日：2000-12-26
申请号：US224351
申请日：1999-01-04
申请人： Eiichi Okuno , Takeshi Endo , Shinji Amano
发明人： Eiichi Okuno , Takeshi Endo , Shinji Amano
IPC分类号： H01L29/16 , H01L21/04 , H01L29/04 , H01L29/06 , H01L29/12 , H01L29/24 , H01L29/423 , H01L29/78 , H01L21/335 , H01L21/338
CPC分类号： H01L29/0696 , H01L21/049 , H01L29/045 , H01L29/1608 , H01L29/41766 , H01L29/4236 , H01L29/66068 , H01L29/7802 , H01L29/7813 , H01L29/7838 , H01L2924/0002 , H01L2924/00
摘要： A vertical type power MOSFET made of silicon carbide includes a surface channel layer doped with nitrogen as dopant with a concentration equal to or less than 1.times.10.sup.15 cm.sup.-3. Accordingly, when a gate oxide film is formed on the surface channel layer, an amount of silicon nitride produced in the gate oxide film and at the interface between the gate oxide film and the surface channel layer becomes extremely small. As a result, carrier traps are prevented from being produced by silicon nitride, resulting in stable FET characteristics and high reliability to the gate oxide film.
摘要翻译：由碳化硅制成的垂直型功率MOSFET包括掺杂有氮作为掺杂剂的表面沟道层，其浓度等于或小于1×10 15 cm -3。因此，当在表面沟道层上形成栅极氧化膜时，在栅极氧化膜中产生的氮化硅的量和栅氧化膜与表面沟道层之间的界面变得非常小。结果，阻止了由氮化硅产生载流子阱，从而导致稳定的FET特性和对栅氧化膜的高可靠性。

3. 发明授权

US06482704B1 Method of manufacturing silicon carbide semiconductor device having oxide film formed thereon with low on-resistances 有权
标题翻译：制造其上形成有低导通电阻的氧化膜的碳化硅半导体器件的方法
公开(公告)号：US06482704B1
公开(公告)日：2002-11-19
申请号：US09714165
申请日：2000-11-17
申请人： Shinji Amano , Eiichi Okuno , Tsuyoshi Yamamoto
发明人： Shinji Amano , Eiichi Okuno , Tsuyoshi Yamamoto
IPC分类号： H01L21336
CPC分类号： H01L21/049 , H01L29/1608 , H01L29/41766 , H01L29/66068 , H01L29/7828 , H01L29/7838
摘要： In a method for manufacturing a silicon carbide semiconductor device including a gate oxide film formed on a surface channel layer, the gate oxide film is formed by a thermal oxidation treatment that is performed at conditions under which a recrystallization reaction between silicon dioxide (SiO2) and carbon (C) occurs to produce silicon carbide (SiC) with a Gibbs free energy G3 being negative. The recrystallization reaction is expressed by a chemical formula of SiO2+3C→SiC+2CO+G3. Accordingly, residual carbon can be reduced at an interface between the gate oxide film and the surface channel layer.
摘要翻译：在制造包括形成在表面沟道层上的栅极氧化膜的碳化硅半导体器件的方法中，通过热氧化处理形成栅极氧化膜，所述热氧化处理在二氧化硅（SiO 2）和碳（C）发生以产生具有吉布斯自由能G3的负极的碳化硅（SiC）。再结晶反应用化学式SiO2 + 3C-> SiC + 2CO + G3表示。因此，可以在栅极氧化膜和表面沟道层之间的界面处还原残留的碳。

4. 发明授权

US06455892B1 Silicon carbide semiconductor device and method for manufacturing the same 有权
标题翻译：碳化硅半导体器件及其制造方法
公开(公告)号：US06455892B1
公开(公告)日：2002-09-24
申请号：US09663134
申请日：2000-09-15
申请人： Eiichi Okuno , Shinji Amano
发明人： Eiichi Okuno , Shinji Amano
IPC分类号： H01L2994
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/41766 , H01L29/7828 , H01L29/7838
摘要： In an accumulation mode MOSFET, a surface channel layer is disposed on a p− type base region between an n+ type source region and an n− type epi layer. The surface channel layer is composed of an n type channel layer formed on the p− type base region and a p type channel layer formed on the n type channel layer. A gate insulating film is formed on the p type channel layer. A channel is formed in the n type channel layer. Accordingly, channel mobility can be improved and on-resistance can be reduced without being affected by a state of an interface between the gate insulating film and the surface channel layer.
摘要翻译：在累积模式MOSFET中，表面沟道层设置在n +型源区和n型外延层之间的p型基极区上。表面沟道层由形成在p型基极区上的n型沟道层和形成在n型沟道层上的p型沟道层构成。栅极绝缘膜形成在p型沟道层上。在n型沟道层中形成沟道。因此，可以改善沟道迁移率，并且可以降低导通电阻，而不受栅极绝缘膜和表面沟道层之间的界面的状态的影响。

5. 发明授权

US07616859B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07616859B2
公开(公告)日：2009-11-10
申请号：US12155949
申请日：2008-06-12
申请人： Norihito Tokura , Hiroki Sone , Shinji Amano , Hisato Kato
发明人： Norihito Tokura , Hiroki Sone , Shinji Amano , Hisato Kato
IPC分类号： G02B6/00
CPC分类号： H01L27/0664 , H01L29/407 , H01L29/7391 , H01L29/7397 , H01L29/861
摘要： A semiconductor device includes a spaced-channel IGBT and an antiparallel diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from the emitter. The IGBT is formed in a cell region of an IGBT region, and the diode is formed in a diode region. A boundary region of the IGBT region is located between the cell region and the diode region. A spacing between adjacent gate trenches in the boundary region is less than a spacing between adjacent gate trenches between which the floating region is located in the cell region.
摘要翻译：半导体器件包括形成在同一半导体衬底中的间隔沟道IGBT和反并联二极管。 IGBT包括基极层和绝缘栅极沟槽，基极层被分成与发射极连接的主体区域和与发射极断开的浮动区域。 IGBT形成在IGBT区域的单元区域中，二极管形成在二极管区域中。 IGBT区域的边界区域位于单元区域和二极管区域之间。边界区域中的相邻栅极沟槽之间的间隔小于相邻栅极沟槽之间的间隔，在该沟槽之间的浮动区域位于单元区域中。

6. 发明申请

US20100187567A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20100187567A1
公开(公告)日：2010-07-29
申请号：US12656340
申请日：2010-01-26
申请人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki , Shinji Amano
发明人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki , Shinji Amano
IPC分类号： H01L29/739
CPC分类号： H01L29/0834 , H01L29/0615 , H01L29/1095 , H01L29/7397 , H01L29/861 , H01L2924/0002 , H03K2217/0027 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体衬底。主区域和感测区域形成在半导体衬底的第一表面侧上。在主区域中形成RC-IGBT，并且在感测区域中形成用于使电流与流过RC-IGBT的电流成比例的电流的感测元件。感测元件的集电极区域和阴极区域形成在半导体衬底的第二表面侧上。集电极区域位于半导体基板的厚度方向的感测区域正下方。阴极区域不位于厚度方向的感测区域正下方。

7. 发明申请

US20070075798A1 Voltage control oscillator and voltage control oscillator unit 审中-公开
标题翻译：电压控制振荡器和压控振荡器单元
公开(公告)号：US20070075798A1
公开(公告)日：2007-04-05
申请号：US11528472
申请日：2006-09-28
申请人： Shinji Amano
发明人： Shinji Amano
IPC分类号： H03B5/08
CPC分类号： H03B5/1231 , H03B5/1212 , H03B5/1253 , H03B5/1265
摘要： A voltage control oscillator that is provided to suitably receive digital broadcasting and is produced at low costs includes: a resonance circuit that includes variable capacitors, each having a capacitance controlling terminal, that are provided parallel to each other and are connected to an inductor, the circuit resonating at a resonant frequency that varies depending upon a sum of (i) an inductance of the inductor and (ii) capacitances of the variable capacitors; and at least one switch to determine what should be connected to at least one of said capacitance controlling terminals.
摘要翻译：提供用于适当接收数字广播并以低成本生产的电压控制振荡器包括：谐振电路，其包括彼此并联并连接到电感器的各自具有电容控制端子的可变电容器，谐振频率根据（i）电感器的电感和（ii）可变电容器的电容的和而变化的谐振频率谐振; 以及至少一个开关，用于确定应该连接到所述电容控制端子中的至少一个。

8. 发明授权

US06977545B2 FM signal receiver and wireless communications device using same 失效
标题翻译： FM信号接收机和无线通信设备使用相同
公开(公告)号：US06977545B2
公开(公告)日：2005-12-20
申请号：US10808472
申请日：2004-03-25
申请人： Shinji Amano , Yusuke Kishino
发明人： Shinji Amano , Yusuke Kishino
IPC分类号： H03D3/00 , H04B1/16 , H04B1/38 , H04L27/14 , H03K9/06
CPC分类号： H04W88/02 , H03D3/001 , H04B1/3805 , H04L27/14 , H04W84/18
摘要： An FM signal receiver for use in receiving a burst signals as in a Bluetooth system includes a BPF and a frequency-demodulation circuit, each having, for example, a phase shifter, which is constructed from similar or related circuitry so as to enable adjustment of the frequency characteristics of the BPF and frequency-demodulation circuit through an identical control signal. A short-circuit switch is disposed linking the input and output terminals of an amplifier. A control circuit opens the switch in a receiving operation and closes the switch in an adjusting operation. Thus, adjustment is carried out without using the amplifier. Therefore, an amplifier offset does not affect the frequency-to-voltage conversion by the frequency-demodulation circuit in the adjusting of the frequency-demodulation circuit and similar adjusting of the BPF. Thus, the BPF is prevented from being incorrectly adjusted due to the offset. The BPF characteristics are suitably adjusted.
摘要翻译：用于接收蓝牙系统中的突发信号的FM信号接收机包括一个BPF和一个频率解调电路，每个具有例如相移或相关电路构成的移相器，以便能够调整 BPF和频率解调电路的频率特性通过相同的控制信号。布置了将放大器的输入和输出端连接起来的短路开关。控制电路在接收操作中打开开关，并在调整操作中关闭开关。因此，不使用放大器进行调整。因此，在频率解调电路的调整和BPF的类似调整中，放大器偏置不会影响频率解调电路的频率 - 电压转换。因此，防止BPF由于偏移而被错误地调整。适当调整BPF特性。

9. 发明授权

US08242536B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08242536B2
公开(公告)日：2012-08-14
申请号：US12656340
申请日：2010-01-26
申请人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki , Shinji Amano
发明人： Hiromitsu Tanabe , Kenji Kouno , Yukio Tsuzuki , Shinji Amano
IPC分类号： H01L29/739
CPC分类号： H01L29/0834 , H01L29/0615 , H01L29/1095 , H01L29/7397 , H01L29/861 , H01L2924/0002 , H03K2217/0027 , H01L2924/00
摘要： A semiconductor device includes a semiconductor substrate having a first surface and a second surface. A main region and a sensing region are formed on the first surface side of the semiconductor substrate. A RC-IGBT is formed in the main region and a sensing element for passing electric currents proportional to electric currents flowing through the RC-IGBT is formed in the sensing region. A collector region and a cathode region of the sensing element are formed on the second surface side of the semiconductor substrate. The collector region is located directly below the sensing region in a thickness direction of the semiconductor substrate. The cathode region is not located directly below the sensing region in the thickness direction.
摘要翻译：半导体器件包括具有第一表面和第二表面的半导体衬底。主区域和感测区域形成在半导体衬底的第一表面侧上。在主区域中形成RC-IGBT，并且在感测区域中形成用于使电流与流过RC-IGBT的电流成比例的电流的感测元件。感测元件的集电极区域和阴极区域形成在半导体衬底的第二表面侧上。集电极区域位于半导体基板的厚度方向的感测区域正下方。阴极区域不位于厚度方向的感测区域正下方。

10. 发明申请

US20090001411A1 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US20090001411A1
公开(公告)日：2009-01-01
申请号：US12155949
申请日：2008-06-12
申请人： Norihito Tokura , Hiroki Sone , Shinji Amano , Hisato Kato
发明人： Norihito Tokura , Hiroki Sone , Shinji Amano , Hisato Kato
IPC分类号： H01L29/739
CPC分类号： H01L27/0664 , H01L29/407 , H01L29/7391 , H01L29/7397 , H01L29/861
摘要： A semiconductor device includes a spaced-channel IGBT and an antiparalell diode that are formed in a same semiconductor substrate. The IGBT includes a base layer and insulated gate trenches by which the base layer is divided into a body region connected to an emitter and a floating region disconnected from the emitter. The IGBT is formed in a cell region of an IGBT region, and the diode is formed in a diode region. A boundary region of the IGBT region is located between the cell region and the diode region. A spacing between adjacent gate trenches in the boundary region is less than a spacing between adjacent gate trenches between which the floating region is located in the cell region.
摘要翻译：半导体器件包括形成在同一半导体衬底中的间隔沟道IGBT和反分解二极管。 IGBT包括基极层和绝缘栅极沟槽，基极层被分成连接到发射极的体区和与发射极断开的浮动区域。 IGBT形成在IGBT区域的单元区域中，二极管形成在二极管区域中。 IGBT区域的边界区域位于单元区域和二极管区域之间。边界区域中的相邻栅极沟槽之间的间隔小于相邻栅极沟槽之间的间隔，在该沟槽之间的浮动区域位于单元区域中。

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