专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06560090B2 Solid electrolytic capacitor and method of manufacturing same 有权
公开(公告)号：US06560090B2
公开(公告)日：2003-05-06
申请号：US09983024
申请日：2001-10-22
申请人： Yoshitsugu Uenishi , Tsuneshi Nakamura , Minoru Omori , Masashi Kadoya , Yoshihiro Higuchi , Tsuyoshi Yoshino
发明人： Yoshitsugu Uenishi , Tsuneshi Nakamura , Minoru Omori , Masashi Kadoya , Yoshihiro Higuchi , Tsuyoshi Yoshino
IPC分类号： H01G9045
CPC分类号： H01G9/012
摘要： A solid electrolytic capacitor having excellent solder wettability and heat resisting adhesion and a method of manufacturing same are obtained by a simple plating configuration. The capacitor includes a capacitor element, positive electrode terminal and negative electrode terminal. The positive electrode terminal and the negative electrode terminal include a metallic member containing (i) at least one selected from the group consisting of nickel, nickel alloy, copper and copper alloy, (ii) a first plated layer of tin or tin alloy, directly disposed without undercoat on the metallic member, and (iii) an intermetallic compound layer formed between the metallic member and the first plated layer. The intermetallic compound layer contains tin-nickel or tin-copper formed through heat reflow treatment of the metallic member disposed on the first plated layer.

2. 发明授权

US06613190B2 Method of and apparatus for manufacturing tantalum solid electrolytic capacitors 有权
公开(公告)号：US06613190B2
公开(公告)日：2003-09-02
申请号：US10162574
申请日：2002-06-06
申请人： Minoru Omori , Yoshitsugu Uenishi , Osamu Tomita , Nario Kawakita , Masakuni Ogino , Yoji Masuda , Tsuyoshi Yoshino
发明人： Minoru Omori , Yoshitsugu Uenishi , Osamu Tomita , Nario Kawakita , Masakuni Ogino , Yoji Masuda , Tsuyoshi Yoshino
IPC分类号： B30B1534
CPC分类号： H01G9/012 , Y10T29/41 , Y10T29/413 , Y10T29/417
摘要： A length of metallic lead from having anode terminals and cathode terminals integrally formed with each other extends between upper and lower molds of an apparatus for manufacturing tantalum solid electrolytic capacitors. The cathode terminals are first coated with a thermosetting conductive adhesive, and cathode layers of capacitor elements are then placed on the conductive adhesive. Thereafter, anode leads extending outwardly from the capacitor elements are placed on the anode terminals are joined thereto, respectively, by welding. A pressure is applied to the capacitor elements so that a portion of the conductive adhesive is squeezed out from one surface of each of the plurality of capacitor elements to a neighboring side surface thereof. The cathode terminals are then joined to the capacitor elements, respectively, by heat-curing the conductive adhesive, and the capacitor elements are finally covered with a sheathing resin.

3. 发明授权

US06423104B1 Method of and apparatus for manufacturing tantalum solid electrolytic capacitors 有权
标题翻译：钽固体电解电容器的制造方法和设备
公开(公告)号：US06423104B1
公开(公告)日：2002-07-23
申请号：US09712158
申请日：2000-11-15
申请人： Minoru Omori , Yoshitsugu Uenishi , Osamu Tomita , Nario Kawakita , Masakuni Ogino , Yoji Masuda , Tsuyoshi Yoshino
发明人： Minoru Omori , Yoshitsugu Uenishi , Osamu Tomita , Nario Kawakita , Masakuni Ogino , Yoji Masuda , Tsuyoshi Yoshino
IPC分类号： H01G900
CPC分类号： H01G9/012 , Y10T29/41 , Y10T29/413 , Y10T29/417
摘要： A length of metallic lead from having anode terminals and cathode terminals integrally formed with each other extends between upper and lower molds of an apparatus for manufacturing tantalum solid electrolytic capacitors. The cathode terminals are first coated with a thermosetting conductive adhesive, and cathode layers of capacitor elements are then placed on the conductive adhesive. Thereafter, anode leads extending outwardly from the capacitor elements are placed on the anode terminals are joined thereto, respectively, by welding. A pressure is applied to the capacitor elements so that a portion of the conductive adhesive is squeezed out from one surface of each of the plurality of capacitor elements to a neighboring side surface thereof The cathode terminals are then joined to the capacitor elements, respectively, by heat-curing the conductive adhesive, and the capacitor elements are finally covered with a sheathing resin.
摘要翻译：具有彼此一体形成的阳极端子和阴极端子的金属引线的长度在用于制造钽固体电解电容器的设备的上模和下模之间延伸。阴极端子首先涂覆有热固性导电粘合剂，然后将电容器元件的阴极层放置在导电粘合剂上。此后，分别通过焊接将放置在阳极端子上的从电容器元件向外延伸的阳极引线连接到阳极端子上。对电容器元件施加压力，使得导电粘合剂的一部分从多个电容器元件的每一个的一个表面挤出到其相邻的侧表面。然后，阴极端子分别通过热固化导电粘合剂，电容器元件最后用护套树脂覆盖。

4. 发明授权

US07612987B2 Chip-type filter 有权
标题翻译：片式过滤器
公开(公告)号：US07612987B2
公开(公告)日：2009-11-03
申请号：US12368569
申请日：2009-02-10
申请人： Junichi Kurita , Kenji Kuranuki , Youichi Aoshima , Hiroshi Higashitani , Tsuyoshi Yoshino
发明人： Junichi Kurita , Kenji Kuranuki , Youichi Aoshima , Hiroshi Higashitani , Tsuyoshi Yoshino
IPC分类号： H01G9/00
CPC分类号： H01G9/012 , H01F17/0006 , H01F27/40 , H01G9/14 , H01G9/28 , H03H1/0007 , H03H2001/0085
摘要： A chip-type filter has a laminated body formed by stacking a plurality of capacitor elements, a pair of positive electrode terminals, a pair of negative electrode terminals, insulating outer resin, and an inductor section. The laminated body includes capacitor elements in a first group and capacitor elements in a second group, the positive electrode sections in both groups are disposed on the opposite sides with respect to the negative electrode sections. Positive electrode terminals are electrically connected to the positive electrode sections of capacitor elements in the first group and those of capacitor elements in the second group, respectively. Negative electrode terminals are electrically connected to the negative electrode sections in the laminated body, and are disposed at both ends of the direction crossing the connecting direction between the positive electrode terminals. The inductor section is insulated from the negative electrode sections and couples the positive electrode terminals.
摘要翻译：芯片型滤波器具有通过堆叠多个电容器元件，一对正极端子，一对负极端子，绝缘外部树脂和电感器部分而形成的层叠体。层叠体包括第一组中的电容器元件和第二组中的电容器元件，两组中的正极部分相对于负极部分设置在相对侧上。正极端子分别电连接到第一组中的电容器元件的正极部分和第二组中的电容器元件的正极部分。负极端子与层叠体中的负极部电连接，并且配置在与正极端子之间的连接方向交叉的方向的两端。电感器部分与负极部分绝缘并连接正极端子。

5. 发明申请

US20090160579A1 DIGITAL SIGNAL PROCESSOR 有权
标题翻译：数字信号处理器
公开(公告)号：US20090160579A1
公开(公告)日：2009-06-25
申请号：US11885458
申请日：2006-05-15
申请人： Hiroshi Serikawa , Kenji Kuranuki , Junichi Kurita , Tsuyoshi Yoshino , Katsuyuki Nakamura , Hiroshi Fujii
发明人： Hiroshi Serikawa , Kenji Kuranuki , Junichi Kurita , Tsuyoshi Yoshino , Katsuyuki Nakamura , Hiroshi Fujii
IPC分类号： H03H7/00
CPC分类号： H05K1/0231 , H01G4/35 , H01G9/012 , H01G9/10 , H01G9/15 , H01G9/28 , H05K2201/10689
摘要： A digital signal processor includes a component for processing a digital signal, a power line for supplying a power to the component, and a decoupling capacitor connected between the power line and a ground. The decoupling capacitor has an equivalent series resistance larger than zero and not larger than 25 mΩ at 100 kHz and an equivalent series inductance larger than zero and not larger than 800 pH at 500 MHz. This digital signal processor does not generate a lot of digital noise, and has a small, thin size.
摘要翻译：数字信号处理器包括用于处理数字信号的部件，用于向部件供电的电力线以及连接在电源线和地之间的去耦电容器。去耦电容器具有大于零且不大于100MHz时的25mOmega的等效串联电阻，以及在500MHz下大于零且不大于800PH的等效串联电感。该数字信号处理器不会产生大量的数字噪声，并且具有小而薄的尺寸。

6. 发明授权

US07206185B2 Capacitor device and fabricating method thereof 失效
标题翻译：电容器件及其制造方法
公开(公告)号：US07206185B2
公开(公告)日：2007-04-17
申请号：US10734290
申请日：2003-12-15
申请人： Minoru Tsunezaki , Tsuyoshi Yoshino
发明人： Minoru Tsunezaki , Tsuyoshi Yoshino
IPC分类号： H01G2/00
CPC分类号： H01G2/04 , H05K3/301 , H05K7/12 , H05K2201/10015 , H05K2201/10606 , Y10T29/4913
摘要： The invention relates to a capacitor device comprising the combination of a cylindrical capacitor and a holder for holding the capacitor in a sideways position. The holder includes a capacitor holding part that has an opening at the top and is arc-shaped in cross section, and a mounting part for mounting the holder itself to another device. The capacitor is held in a sideways position in the holding part of the holder with a heat shrinking resin tube interposed therebetween. Accordingly, the height of the capacitor device is reduced, so that the size of the capacitor device can be reduced. In addition, the connection distance between the capacitor device and another electronic device is shortened, so that the inductance can be made smaller.
摘要翻译：本发明涉及一种电容器装置，其包括圆柱形电容器和用于将电容器保持在侧面位置的保持器的组合。保持器包括电容器保持部分，其在顶部具有开口并且具有横截面的弧形，以及用于将保持器本身安装到另一装置的安装部。电容器被保持在保持器的保持部分的侧向位置，其间插有热收缩树脂管。因此，电容器器件的高度减小，从而可以减小电容器器件的尺寸。此外，电容器装置与另一电子装置之间的连接距离缩短，使得可以使电感更小。

7. 发明授权

US06280483B1 Method of manufacturing solid electrolytic capacitors 有权
标题翻译：固体电解电容器的制造方法
公开(公告)号：US06280483B1
公开(公告)日：2001-08-28
申请号：US09493003
申请日：2000-01-28
申请人： Yukari Shimamoto , Tsuyoshi Yoshino
发明人： Yukari Shimamoto , Tsuyoshi Yoshino
IPC分类号： H01G900
CPC分类号： H01G9/0029 , H01G9/0032 , H01G9/15 , Y10T29/417
摘要： A method of manufacturing solid electrolytic capacitors which prevents decrease in product yield due to degradation in characteristics of anode foil during a process of forming a MnO2 layer, and achieves high quality solid electrolytic capacitors with high yield, wherein aluminum foil is sampled from each lot before inputting the lot into the next process of forming MnO2 layer on a surface of aluminum foil, and a predetermined inspection is implemented after forming the MnO2 layer on this sample. Based on inspection results, the lot of the sample is input to the next process. This method prevents occurrence of defects in the MnO2 layer formation process in advance, and avoids finding defects after inputting the entire lot of aluminum foil to the MnO2 layer formation process. Consequently, highly reliable solid electrolytic capacitors are manufactured inexpensively and stably without loss in costs and efficiency.
摘要翻译：一种制造固体电解电容器的方法，其防止了在形成MnO 2层的过程中由于阳极箔的特性劣化而导致的产品收率降低，并且实现了高产量的高质量固体电解电容器，其中铝箔是从每个批次中取样的将该批次输入到在铝箔的表面上形成MnO 2层的下一个工序中，在该样品上形成MnO 2层之后，进行规定的检查。根据检查结果，样本的大量输入到下一个过程。该方法预先防止了MnO2层形成过程中的缺陷的发生，并且避免了在将大量的铝箔输入到MnO 2层形成过程之后发现缺陷。因此，廉价且稳定地制造高可靠性的固体电解电容器，而不会降低成本和效率。

8. 发明申请

US20100259868A1 CHIP TYPE SOLID ELECTROLYTIC CAPACITOR 有权
标题翻译：芯片型固体电解电容器
公开(公告)号：US20100259868A1
公开(公告)日：2010-10-14
申请号：US12821568
申请日：2010-06-23
申请人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
发明人： Tatsuo Fujii , Junichi Kurita , Hiroshi Fujii , Tsuyoshi Yoshino
IPC分类号： H01G9/012
CPC分类号： H01G9/012 , H01G2/06 , H01G9/004 , H01G9/14 , H01G9/15
摘要： A chip type solid electrolytic capacitor includes a capacitor element-laminate. In the capacitor element-laminate, a plurality of capacitor elements, each having an anode portion and a cathode portion, are laminated so that the anode portions of the adjacent capacitor elements are disposed in the direction opposite to each other. Anode lead terminals are joined to the bottom faces of the anode portions of the capacitor elements disposed at both ends of the capacitor element-laminate. A cathode lead terminal is joined to the bottom face of the cathode portion of the capacitor element disposed in the center of the capacitor element-laminate. An Electrically insulating exterior resin coats the capacitor element-laminate so as to expose at least a part of the bottom faces of the anode lead terminals and a part of the cathode lead terminal.
摘要翻译：芯片型固体电解电容器包括电容器元件层叠体。在电容器元件层叠体中，层叠多个具有阳极部和阴极部的电容器元件，使得相邻的电容器元件的阳极部沿相反方向配置。阳极引线端子连接到设置在电容器元件 - 层叠体的两端的电容器元件的阳极部分的底面。阴极引线端子连接到设置在电容器元件 - 层叠体的中心的电容器元件的阴极部分的底面。电绝缘外部树脂涂覆电容器元件层压体，以暴露阳极引线端子和阴极引线端子的一部分的至少一部分底面。

9. 发明授权

US07787234B2 Digital signal processor 有权
标题翻译：数字信号处理器
公开(公告)号：US07787234B2
公开(公告)日：2010-08-31
申请号：US11885458
申请日：2006-05-15
申请人： Hiroshi Serikawa , Kenji Kuranuki , Junichi Kurita , Tsuyoshi Yoshino , Katsuyuki Nakamura , Hiroshi Fujii
发明人： Hiroshi Serikawa , Kenji Kuranuki , Junichi Kurita , Tsuyoshi Yoshino , Katsuyuki Nakamura , Hiroshi Fujii
IPC分类号： H01G9/02
CPC分类号： H05K1/0231 , H01G4/35 , H01G9/012 , H01G9/10 , H01G9/15 , H01G9/28 , H05K2201/10689
摘要： A digital signal processor includes a component for processing a digital signal, a power line for supplying a power to the component, and a decoupling capacitor connected between the power line and a ground. The decoupling capacitor has an equivalent series resistance larger than zero and not larger than 25 mΩ at 100 kHz and an equivalent series inductance larger than zero and not larger than 800 pH at 500 MHz. This digital signal processor does not generate a lot of digital noise, and has a small, thin size.
摘要翻译：数字信号处理器包括用于处理数字信号的部件，用于向部件供电的电力线以及连接在电源线和地之间的去耦电容器。去耦电容器具有大于零且不大于25mΩ的等效串联电阻; 在100 kHz时，等效串联电感大于零，并且在500 MHz时不大于800 pH。该数字信号处理器不会产生大量的数字噪声，并且具有小而薄的尺寸。

10. 发明申请

US20090052115A1 CAPACITOR AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：电容器及其制造方法
公开(公告)号：US20090052115A1
公开(公告)日：2009-02-26
申请号：US12256694
申请日：2008-10-23
申请人： Teruhisa Miura , Hideki Simamoto , Tatehiko Inoue , Tsuyoshi Yoshino
发明人： Teruhisa Miura , Hideki Simamoto , Tatehiko Inoue , Tsuyoshi Yoshino
IPC分类号： H01G9/00
CPC分类号： H01G9/008 , H01G9/10 , Y10T29/417
摘要： A capacitor is provided to overcome the following problem: when plural capacitors are linked, a large coupling space is required because an anode and a cathode are brought out through the opposite ends, so that downsizing of the capacitor is difficult. The capacitor also allows easy electrical and mechanical coupling, reducing the required coupling space and unnecessary resistance. According to a structure of the capacitor, capacitor element (2) is enclosed in mechanical housing (3) having an opening sealed by terminal plate (4). Terminal slip (5), which includes rib (5b) to be coupled to one of the anode and the cathode of capacitor element (2) and terminal (5a), is insert-molded into terminal plate (4). The other of the anode and the cathode is coupled to an inner bottom face of metal housing (3). The one of the anode and the cathode is brought out through terminal (5a), and the other of the anode and the cathode is brought out through metal housing (3), thus a lower resistance is expected. When plural capacitors (1) are linked together, the coupling space is reduced by half, so that downsizing is achieved.
摘要翻译：提供电容器以克服以下问题：当连接多个电容器时，由于通过相对端引出阳极和阴极而需要大的耦合空间，因此电容器的小型化变得困难。电容器还允许轻松的电气和机械耦合，减少所需的耦合空间和不必要的电阻。根据电容器的结构，将电容器元件（2）封闭在具有由端子板（4）密封的开口的机械壳体（3）中。包括要耦合到电容器元件（2）的阳极和阴极之一的肋（5b）和端子（5a）的端子滑块（5）被插入模制到端子板（4）中。阳极和阴极中的另一个耦合到金属外壳（3）的内底面。阳极和阴极中的一个通过端子（5a）引出，并且阳极和阴极中的另一个通过金属壳体（3）被引出，因此预期较低的电阻。当多个电容器（1）连接在一起时，耦合空间减少一半，从而实现了小型化。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式