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1. 发明授权

US5355081A Method for testing a semiconductor integrated circuit having self testing circuit 失效
标题翻译：用于测试具有自检电路的半导体集成电路的方法
公开(公告)号：US5355081A
公开(公告)日：1994-10-11
申请号：US65123
申请日：1993-05-20
申请人： Yoshiro Nakata , Atsushi Fujiwara , Akinori Shibayama
发明人： Yoshiro Nakata , Atsushi Fujiwara , Akinori Shibayama
IPC分类号： H01L27/10 , G01R31/28 , H01L21/66 , G01R15/12
CPC分类号： G01R31/2884
摘要： A method is provided for testing a semiconductor integrated circuit including a main circuit, a self testing circuit for testing at least one part of the functions of the main circuit, and a test result output circuit having at least one light emitting device for outputting results from the self testing circuit in the form of light. The method includes the steps of inputting a test start to the self testing circuit so as to initiate operation of the self testing circuit; detecting light emitted from the light emitting device with an optical system, the light being emitted based on the test results from the self testing circuit; and obtaining the test results based on the light detection.
摘要翻译：提供了一种用于测试半导体集成电路的方法，该半导体集成电路包括主电路，用于测试主电路功能的至少一部分的自检电路，以及具有至少一个发光装置的测试结果输出电路，自检电路以光的形式。该方法包括以下步骤：将测试开始输入到自检电路，以启动自检电路的操作; 利用光学系统检测从发光装置发出的光，基于来自自检电路的测试结果发射光; 并基于光检测获得测试结果。

2. 发明授权

US5248936A Semiconductor integrated circuit and a method of testing the same 失效
标题翻译：半导体集成电路及其测试方法
公开(公告)号：US5248936A
公开(公告)日：1993-09-28
申请号：US767998
申请日：1991-09-30
申请人： Yoshiro Nakata , Atsushi Fujiwara , Akinori Shibayama
发明人： Yoshiro Nakata , Atsushi Fujiwara , Akinori Shibayama
IPC分类号： H01L27/10 , G01R31/28 , H01L21/66
CPC分类号： G01R31/2884
摘要： A semiconductor integrated circuit has a main circuit (1), a self testing circuit (2) for testing the main circuit (1), a test start signal detection circuit (5) having at least one light sensitive device for detecting a test start signal in the form of light, and a test result output circuit (4) having at least one light emitting device for outputting test results from the self testing circuit (2) in the form of light. A drastic reduction in test time is accomplished by applying the test start signal in a non-contacting manner to the semiconductor integrated circuit so as to activate the self testing circuit. Furthermore, the test result is output to the outside of the semiconductor integrated circuit without having to provide electrical connections, and the simultaneous testing of a greater number of semiconductor integrated circuits as formed on the same wafer can be accomplished.
摘要翻译：半导体集成电路具有主电路（1），用于测试主电路（1）的自检电路（2），具有至少一个用于检测测试开始信号的光敏装置的测试开始信号检测电路（5）以及具有至少一个发光装置的测试结果输出电路（4），用于以光的形式从自检电路（2）输出测试结果。通过将测试开始信号以非接触的方式施加到半导体集成电路以激活自检电路来实现测试时间的急剧减少。此外，测试结果输出到半导体集成电路的外部，而不必提供电连接，并且可以实现在同一晶片上形成的更多数量的半导体集成电路的同时测试。

3. 发明授权

US5424629A Power circuit for a semiconductor apparatus 失效
标题翻译：半导体装置的电源电路
公开(公告)号：US5424629A
公开(公告)日：1995-06-13
申请号：US865363
申请日：1992-04-08
申请人： Atsushi Fujiwara , Akinori Shibayama
发明人： Atsushi Fujiwara , Akinori Shibayama
IPC分类号： G05F3/24 , G05F5/08
CPC分类号： G05F3/247
摘要： A power circuit for a semiconductor apparatus comprising an internal power voltage generating circuit generating an internal power voltage, an external power voltage detecting circuit, a power voltage switching circuit switching the internal power voltage to the external power voltage in response to the output of the external power voltage detecting circuit, and a switching signal setting circuit. The output of the power voltage switching circuit is the internal power voltage when power is first applied to the semiconductor device. The switching signal setting circuit provides the correct power voltage switching signals quickly to the power voltage switching circuit when power is applied and the external power voltage is not inputted to the apparatus at the early stage of power application.
摘要翻译：一种用于半导体装置的电源电路，包括产生内部电源电压的内部电源电压产生电路，外部电源电压检测电路，电源电压切换电路，响应于外部的输出将内部电源电压切换到外部电源电压电源电压检测电路和开关信号设定电路。电源电压切换电路的输出是当第一次向半导体器件供电时的内部电源电压。开关信号设定电路在供电时向电源电压切换电路提供正确的电源电压切换信号，并且在电源应用的早期阶段未将外部电源电压输入到设备。

4. 发明授权

US5545977A Reference potential generating circuit and semiconductor integrated circuit arrangement using the same 失效
标题翻译：参考电位发生电路和使用其的半导体集成电路布置
公开(公告)号：US5545977A
公开(公告)日：1996-08-13
申请号：US74561
申请日：1993-06-09
申请人： Toshio Yamada , Akinori Shibayama , Shunichi Iwanari , Atsushi Fujiwara
发明人： Toshio Yamada , Akinori Shibayama , Shunichi Iwanari , Atsushi Fujiwara
IPC分类号： G05F1/24 , G05F1/613 , G05F3/24 , G11C11/407 , G11C11/408 , H01L27/10 , H03K19/00 , G05F3/22
CPC分类号： G05F3/245 , Y10S323/907
摘要： In a circuit, a resistance element is interposed between a positive power supply line (external power supply voltage level VCC) and an output node. To feedback an output potential, there is disposed an N-type MOSFET of which gate is connected to the output node and of which source is connected to the earth line (earth potential VSS) in the circuit. Another three N-type MOSFETs which are so connected in series to one another as to form a MOS diode, are interposed between the drain of the feedback N-type MOSFET and the output node. The earth line also serves as a reference potential line for the potential of the output node. Variations of the threshold voltages of the MOSFETs due to temperature variations are compensated. This restrains the output potential from varying.
摘要翻译：在电路中，在正电源线（外部电源电压电平VCC）和输出节点之间插入电阻元件。为了反馈输出电位，设置了一个N型MOSFET，其栅极连接到输出节点，并且其中的源极连接到电路中的地线（地电位VSS）。在反馈N型MOSFET的漏极和输出节点之间插入另外三个彼此串联连接形成MOS二极管的N型MOSFET。地线也可作为输出节点电位的参考电位线。由于温度变化导致的MOSFET的阈值电压的变化被补偿。这就抑制了输出电位的变化。

5. 发明授权

US07702280B2 Mobile communication system, transmission station, reception station, relay station, communication path deciding method, and communication path deciding program 失效
标题翻译：移动通信系统，发送站，接收站，中继站，通信路径决定方法以及通信路径决定程序
公开(公告)号：US07702280B2
公开(公告)日：2010-04-20
申请号：US10483998
申请日：2003-05-21
申请人： Shinji Takeda , Atsushi Fujiwara , Hitoshi Yoshino , Toru Otsu , Yasushi Yamao
发明人： Shinji Takeda , Atsushi Fujiwara , Hitoshi Yoshino , Toru Otsu , Yasushi Yamao
IPC分类号： H04B3/36 , H04B7/14
CPC分类号： H04W40/12 , H04B7/2606 , H04L45/00 , H04L45/122 , H04L45/125 , H04L45/20 , H04L45/302 , H04W40/08 , H04W40/16 , H04W40/22 , H04W52/46 , H04W72/08 , H04W84/18 , H04W88/02 , Y02D70/324 , Y02D70/34 , Y02D70/39 , Y02D70/449
摘要： A mobile communication system capable of determining a communication path to implement fast communication by multihop connection. The mobile communication system includes a mobile station, at least one relay station, and a base station and implements packet transmission from the mobile station to the base station through a communication path with an intermediary of at least one relay station or through a communication path without an intermediary of a relay station. The mobile communication system is provided with a communication path determiner for determining a communication path with a largest communication speed or a communication path satisfying a required line quality, based on interference levels of respective signals received at a relay station constituting a communication path between the transmitting station and the receiving station, and at the base station.
摘要翻译：一种移动通信系统，能够确定通过多跳连接实现快速通信的通信路径。移动通信系统包括移动站，至少一个中继站和基站，并且通过与至少一个中继站或通过通信路径的通信路径实现从移动站到基站的分组传输，而没有中继站的中介。移动通信系统具有通信路径确定器，用于基于在构成发送端之间的通信路径的中继站处接收到的各信号的干扰电平，确定具有最大通信速度的通信路径或满足所需线路质量的通信路径站和接收站，并在基站。

6. 发明授权

US07619998B2 Multi-hop communication system, radio control station, radio station and multi-hop communication method 失效
标题翻译：多跳通信系统，无线电控制站，无线电台和多跳通信方式
公开(公告)号：US07619998B2
公开(公告)日：2009-11-17
申请号：US10782929
申请日：2004-02-23
申请人： Shinji Takeda , Atsushi Fujiwara , Hitoshi Yoshino , Toru Otsu
发明人： Shinji Takeda , Atsushi Fujiwara , Hitoshi Yoshino , Toru Otsu
IPC分类号： H04H20/71
CPC分类号： H04W68/00 , H04L45/302 , H04W4/24 , H04W40/02 , H04W48/08 , H04W48/16 , H04W84/18 , Y02D70/142 , Y02D70/22 , Y02D70/30
摘要： The multi-hop communication system according to the present invention is configured by a radio control station 1 connected to a core network, and radio stations 21, 22, 31-33. The radio control station 1 has a control signal TX/RX unit 12 which transmits/receives the control signal, an information signal TX/RX unit 13 which transmits/receives the information signal, and a communication channel controller 15 which transmits a “usage notification” indicating usage of communication channels managed by the radio control station 1 to the radio stations 21, 22, 31-33 using the control signal. The radio station has a control signal TX/RX unit 42 which transmits/receives the control signal, and an information signal TX/RX unit 43 which transmits/receives the information signal.
摘要翻译：根据本发明的多跳通信系统由连接到核心网络的无线电控制站1和无线电台21,22,31-33构成。无线电控制站1具有发送/接收控制信号的控制信号TX / RX单元12，发送/接收信息信号的信息信号TX / RX单元13以及发送“使用通知”的通信信道控制器15 使用控制信号指示由无线电控制站1管理的通信信道对无线电站21,22,31-33的使用。无线电台具有发送/接收控制信号的控制信号TX / RX单元42以及发送/接收信息信号的信息信号TX / RX单元43。

7. 发明授权

US07352729B2 Wireless communication system for multi-hop connection, source station, radio station and pilot signal used therein 失效
标题翻译：用于多跳连接，源站，无线电台和其中使用的导频信号的无线通信系统
公开(公告)号：US07352729B2
公开(公告)日：2008-04-01
申请号：US10376244
申请日：2003-03-03
申请人： Atsushi Fujiwara , Shinji Takeda , Hitoshi Yoshino , Toru Otsu
发明人： Atsushi Fujiwara , Shinji Takeda , Hitoshi Yoshino , Toru Otsu
IPC分类号： H04Q7/24
CPC分类号： H04L45/00 , H04W40/00 , H04W40/08 , H04W40/16 , H04W40/246 , H04W88/04 , Y02D70/324 , Y02D70/34
摘要： A destination station in a wireless communication system for a multi-hop connection selects a transmission path having a minimum total of required transmission power values of respective stations on the transmission path among candidates of the transmission path from a source station to the destination station and transmits a pilot signal to the source station and a relay station, the pilot signal including identification information about the respective stations on the selected transmission path and required transmission power values thereof. Thus, the source station and the relay station, which have received this pilot signal, can determine the transmission path having the minimum total of the required transmission power values by use of the identification information included in the received pilot signal.
摘要翻译：用于多跳连接的无线通信系统中的目的站在从源站到目的站的传输路径的候选中选择具有传输路径上各站的所需发射功率值的最小总和的传输路径，并且发送向所述源站和中继站发送导频信号，所述导频信号包括关于所选传输路径上的各个站的标识信息及其所需的传输功率值。因此，已经接收到该导频信号的源站和中继站可以通过使用包含在接收到的导频信号中的识别信息来确定具有所需传输功率值的最小总数的传输路径。

8. 发明申请

US20060023514A1 Semiconductor nonvolatile storage device 有权
公开(公告)号：US20060023514A1
公开(公告)日：2006-02-02
申请号：US11242894
申请日：2005-10-05
申请人： Kenji Misumi , Atsushi Fujiwara , Masanori Matsuura , Toshio Nishimoto
发明人： Kenji Misumi , Atsushi Fujiwara , Masanori Matsuura , Toshio Nishimoto
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C16/3454
摘要： A writing operation selecting circuit is provided for selecting a temporary writing operation having a prescribed writing time for a memory cell transistor element and an additional writing operation for the memory cell transistor element. A writing time control circuit is provided for controlling an additional writing operation time by an output signal of the writing operation selecting circuit.

9. 发明授权

US6081919A Coding and decoding system using CRC check bit 失效
标题翻译：使用CRC校验位的编码和解码系统
公开(公告)号：US6081919A
公开(公告)日：2000-06-27
申请号：US997121
申请日：1997-12-23
申请人： Atsushi Fujiwara , Tomohiro Dohi , Toshifumi Sato
发明人： Atsushi Fujiwara , Tomohiro Dohi , Toshifumi Sato
IPC分类号： H03M13/00 , H03M13/23 , H03M13/27 , H03M13/29 , H03M13/12 , H03M13/22
CPC分类号： H03M13/29
摘要： A coding and decoding system which uses CRC check bits is disclosed. When a coding apparatus performs coding, symbol interleaving is performed after coding by an outer code of a concatenated code, and coding by an inner code is performed after CRC check bits are added. Then, upon decoding by a decoding apparatus, error detection using the CRC check bits is performed after decoding of the inner code. After symbol deinterleaving is performed, decoding of the outer code by erasure decoding or error correction is performed depending upon the number of symbols included in a frame in which an error has been detected.
摘要翻译：公开了一种使用CRC校验位的编码和解码系统。当编码装置执行编码时，在通过级联代码的外部代码进行编码之后执行符号交织，并且在添加CRC校验位之后执行内部代码的编码。然后，在通过解码装置的解码之后，在内部码的解码之后执行使用CRC校验位的错误检测。在执行符号解交织之后，根据包含在检测到错误的帧中的符号的数量来执行通过擦除解码或纠错的外部码的解码。

10. 发明授权

US5477349A Liquid crystal injecting method 失效
标题翻译：液晶注入法
公开(公告)号：US5477349A
公开(公告)日：1995-12-19
申请号：US229453
申请日：1994-04-18
申请人： Atsushi Fujiwara
发明人： Atsushi Fujiwara
IPC分类号： G02F1/1341 , B65B31/02
CPC分类号： G02F1/1341
摘要： A liquid crystal injecting method, wherein the area of a portion of a liquid crystal cell, which is dipped in a liquid crystal contained in a liquid crystal vessel, is reduced to a minimum, thereby preventing the liquid crystal in the vessel from being contaminated with foreign matter and reducing the amount of the liquid crystal which unnecessarily adheres to the outer surface of the cell. The liquid level of the liquid crystal in the vessel is detected by a sensor. Liquid crystal is supplied to the vessel on the basis of the detected liquid level to maintain the liquid level at a predetermined height. A portion of the liquid crystal is raised. A liquid crystal injecting port of the cell is dipped into the raised portion of the liquid crystal after an inner space of the cell is evacuated. Thus, the liquid crystal is injected into the cell. Since only the injecting port of the cell is dipped into the liquid crystal in the vessel, the area of the cell which contacts the liquid crystal is reduced, thereby preventing the liquid crystal from contamination by foreign matters adhering to the cell. Further, since the amount of the liquid crystal adhered to the outer surface of the cell is reduced, the liquid crystal can be saved.
摘要翻译：一种液晶注入方法，其中将浸在液晶容器中的液晶中的一部分液晶单元的面积减小到最小，从而防止容器中的液晶被异物并且减少不必要地粘附到电池外表面的液晶的量。通过传感器检测容器中的液晶的液位。基于检测到的液面将液晶提供给容器，以将液面保持在预定的高度。液晶的一部分升高。在将电池的内部空间抽真空之后，将电池的液晶注入口浸入液晶的隆起部分。因此，将液晶注入到电池中。由于只有电池的注入口被浸入容器中的液晶中，与液晶接触的电池的面积减小，从而防止液晶被附着在电池上的异物污染。此外，由于附着在电池外表面的液晶的量减少，因此可以节省液晶。

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