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1. 发明申请

US20110095777A1 TEST WAFER UNIT AND TEST SYSTEM 有权
标题翻译：测试波形单元和测试系统
公开(公告)号：US20110095777A1
公开(公告)日：2011-04-28
申请号：US12947721
申请日：2010-11-16
申请人： Yoshio KOMOTO , Yoshiharu UMEMURA , Shinichi HAMAGUCHI , Yasushi KAWAGUCHI
发明人： Yoshio KOMOTO , Yoshiharu UMEMURA , Shinichi HAMAGUCHI , Yasushi KAWAGUCHI
IPC分类号： G01R31/00
CPC分类号： G01R31/2874 , G01R31/2863 , G01R31/2867
摘要： A wafer unit for testing is electrically connected to a plurality of chips to be tested formed on a wafer to be tested, the wafer unit for testing including: a connecting wafer provided to face the wafer to be tested, and to be electrically connected to each of the plurality of chips to be tested; and a temperature distribution adjusting section provided on the connecting wafer, and to adjust a temperature distribution of the wafer to be tested.
摘要翻译：用于测试的晶片单元电连接到待测试的晶片上形成的待测试的多个芯片，用于测试的晶片单元包括：设置成面对待测晶片的连接晶片，并与每个芯片电连接的待测试的多个芯片; 以及温度分布调整部，设置在连接晶片上，并调整被测试晶片的温度分布。

2. 发明申请

US20110062979A1 TEST SYSTEM AND PROBE APPARATUS 有权
标题翻译：测试系统和探测器
公开(公告)号：US20110062979A1
公开(公告)日：2011-03-17
申请号：US12901484
申请日：2010-10-08
申请人： Yoshiharu UMEMURA , Yoshio KOMOTO
发明人： Yoshiharu UMEMURA , Yoshio KOMOTO
IPC分类号： G01R1/067
CPC分类号： G01R31/2891 , G01R1/0491 , G01R31/2893
摘要： A probe apparatus includes a wire substrate with terminals; a wafer tray forming a hermetically sealed space with the wire substrate and for mounting a semiconductor wafer; a probe wafer provided between the wire substrate and the wafer tray, having an apparatus connection terminal electrically connected to a terminal of the wire substrate and wafer connection terminals electrically connected to the semiconductor chips respectively and collectively; an apparatus anisotropic conductive sheet provided between the wire substrate and the probe wafer; a wafer anisotropic conductive sheet provided between the probe wafer and the semiconductor wafer; and a decompressing section that decompresses the hermetically sealed space between the wire substrate and the wafer tray, to cause the wafer tray to move to a predetermined position from the wire substrate, to electrically connect the wire substrate and the probe wafer, and to electrically connect the probe wafer and the semiconductor wafer.
摘要翻译：探针装置包括具有端子的线基板; 晶片托盘，用丝线基板形成密封空间并安装半导体晶片; 设置在所述线基板和所述晶片托盘之间的探针晶片，具有与所述线基板的端子电连接的装置连接端子和分别电连接到所述半导体芯片的晶片连接端子; 设置在线基板和探针晶片之间的装置各向异性导电片; 设置在探针晶片和半导体晶片之间的晶片各向异性导电片; 以及减压部，其对所述线基板和所述晶片托盘之间的密封空间进行减压，以使所述晶片托盘从所述线基板移动到预定位置，以电连接所述线基板和所述探针晶片，并且电连接探针晶片和半导体晶片。

3. 发明申请

US20110121848A1 PROBE WAFER, PROBE DEVICE, AND TESTING SYSTEM 有权
标题翻译：探测器，探头设备和测试系统
公开(公告)号：US20110121848A1
公开(公告)日：2011-05-26
申请号：US12857483
申请日：2010-08-16
申请人： Yoshio KOMOTO , Yoshiharu UMEMURA
发明人： Yoshio KOMOTO , Yoshiharu UMEMURA
IPC分类号： G01R1/067 , H01L23/544
CPC分类号： G01R31/2889
摘要： There is provided a testing system for testing a plurality of semiconductor chips formed on a single semiconductor wafer. The testing system includes a wafer substrate, a plurality of wafer connector terminals that are provided on the wafer substrate in such a manner that one or more wafer connector terminals correspond to each of the semiconductor chips, where each wafer connector terminal is to be electrically connected to an input/output terminal of a corresponding semiconductor chip, a plurality of circuit units that are provided on the wafer substrate in such a manner that one or more circuit units corresponds to each of the semiconductor chips, where each circuit unit generates a test signal to be used for testing a corresponding semiconductor chip and supplies the test signal to the corresponding semiconductor chip to test the corresponding semiconductor chip, and a controller that generates a control signal used to control the plurality of circuit units.
摘要翻译：提供了一种用于测试形成在单个半导体晶片上的多个半导体芯片的测试系统。测试系统包括晶片衬底，设置在晶片衬底上的多个晶片连接器端子，使得一个或多个晶片连接器端子对应于每个晶片连接器端子要电连接的每个半导体芯片连接到相应的半导体芯片的输入/输出端子，多个电路单元，其设置在晶片基板上，使得一个或多个电路单元对应于每个半导体芯片，其中每个电路单元产生测试信号用于测试对应的半导体芯片，并将测试信号提供给相应的半导体芯片以测试对应的半导体芯片;以及控制器，其产生用于控制多个电路单元的控制信号。

4. 发明申请

US20110109337A1 PROBE WAFER, PROBE DEVICE, AND TESTING SYSTEM 失效
标题翻译：探测器，探头设备和测试系统
公开(公告)号：US20110109337A1
公开(公告)日：2011-05-12
申请号：US12857478
申请日：2010-08-16
申请人： Yoshio KOMOTO , Yoshiharu UMEMURA
发明人： Yoshio KOMOTO , Yoshiharu UMEMURA
IPC分类号： G01R31/00
CPC分类号： G01R1/07378 , G01R31/2831
摘要： A probe wafer electrically connected to a semiconductor wafer on which a plurality of semiconductor chips are formed includes: a wafer substrate for pitch conversion including a wafer connection surface and an apparatus connection surface opposing the wafer connection surface; a plurality of wafer connection terminals formed on the wafer connection surface of the wafer substrate for pitch conversion, at least one wafer connection terminal provided for each of the semiconductor chips and electrically connected to an input/output terminal of the corresponding semiconductor chip; a plurality of apparatus connection terminals formed on the apparatus connection surface of the wafer substrate in one-to-one relation with the plurality of wafer connection terminals at an interval different from an interval of the wafer connection terminals, to be electrically connected to an external apparatus; and a plurality of transfer paths, each electrically connecting a corresponding wafer connection terminal to an apparatus connection terminal.
摘要翻译：电连接到其上形成有多个半导体芯片的半导体晶片的探针晶片包括：用于间距变换的晶片衬底，包括晶片连接表面和与晶片连接表面相对的器件连接表面; 形成在用于间距变换的晶片基板的晶片连接表面上的多个晶片连接端子，为每个半导体芯片设置的电连接到相应的半导体芯片的输入/输出端子的至少一个晶片连接端子; 多个装置连接端子以与晶片连接端子的间隔不同的间隔与所述多个晶片连接端子成一一对应地形成在所述晶片基板的所述装置连接面上，以电连接到外部仪器; 以及多个传送路径，每个传送路径将相应的晶片连接端子电连接到装置连接端子。

5. 发明申请

US20110043237A1 WAFER TRAY AND TEST APPARATUS 有权
标题翻译： WAFER托盘和测试装置
公开(公告)号：US20110043237A1
公开(公告)日：2011-02-24
申请号：US12881137
申请日：2010-09-13
申请人： Toshiyuki KIYOKAWA , Yoshiharu UMEMURA
发明人： Toshiyuki KIYOKAWA , Yoshiharu UMEMURA
IPC分类号： G01R31/00
CPC分类号： H01L21/67207 , G01R31/2893 , H01L21/67346 , H01L21/681
摘要： In order to shorten testing time of a plurality of devices under test formed on a semiconductor wafer, a wafer tray used by a test apparatus performing the test is provided. The wafer tray includes a first flow passage for fixing the semiconductor wafer to the wafer tray using vacuum suction, a second flow passage for fixing the wafer tray to the test apparatus using vacuum suction, and a heater for heating a loading surface on which at least the semiconductor wafer is loaded. By using this wafer tray, the semiconductor wafer, which is the object being tested, can be smoothly attached to and detached from different test heads, and testing can be begun quickly after the semiconductor wafer is attached to a test head.
摘要翻译：为了缩短形成在半导体晶片上的多个待测器件的测试时间，提供了由执行测试的测试设备使用的晶片托盘。晶片托盘包括用于使用真空抽吸将半导体晶片固定到晶片托盘的第一流动通道，用于使用真空抽吸将晶片托盘固定到测试装置的第二流动通道，以及加热器，用于加热装载表面至少加载半导体晶片。通过使用该晶片托盘，作为被测定对象的半导体晶片能够平滑地安装到不同的测试头上并从其拆卸，并且可以在将半导体晶片安装到测试头之后快速开始测试。

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