专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08564101B2 Semiconductor apparatus having a through-hole interconnection 有权
标题翻译：具有通孔互连的半导体装置
公开(公告)号：US08564101B2
公开(公告)日：2013-10-22
申请号：US12348988
申请日：2009-01-06
申请人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
发明人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
IPC分类号： H01L29/40
CPC分类号： H01L27/14618 , H01L21/76831 , H01L21/76898 , H01L23/481 , H01L24/16 , H01L2224/05009 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/14 , H01L2224/05599
摘要： A semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has another insulating layer formed in the via hole and a conductive layer formed thereon. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.
摘要翻译：一种在半导体衬底中具有通孔互连的半导体器件。绝缘层形成在半导体衬底上。通过半导体衬底和绝缘层形成通孔。通孔布线具有形成在通孔中的另一绝缘层和形成在其上的导电层。形成在通孔中的绝缘层形成为使得通孔的内表面基本上平坦化。

2. 发明申请

US20110136342A1 SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20110136342A1
公开(公告)日：2011-06-09
申请号：US13027614
申请日：2011-02-15
申请人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
发明人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
IPC分类号： H01L21/768
CPC分类号： H01L27/14618 , H01L21/76831 , H01L21/76898 , H01L23/481 , H01L24/16 , H01L2224/05009 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/14 , H01L2224/05599
摘要： A semiconductor apparatus including a semiconductor substrate, an insulating layer, a via hole, and a through-hole interconnection is provided. The insulating layer is formed on the semiconductor substrate. The via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has a conductive layer formed on an insulating layer in the via hole. The surface of the insulating layer formed on the inner surface of the via hole is substantially planarized by filling a recessed portion on a boundary between the semiconductor substrate and the insulating layer formed on the semiconductor substrate.
摘要翻译：提供了包括半导体衬底，绝缘层，通孔和通孔互连的半导体器件。绝缘层形成在半导体衬底上。通孔形成为穿过半导体衬底和绝缘层。通孔互连具有形成在通孔中的绝缘层上的导电层。通过在半导体衬底和形成在半导体衬底上的绝缘层之间的边界填充凹陷部分，在通孔的内表面上形成的绝缘层的表面基本平坦化。

3. 发明申请

US20090200679A1 SEMICONDUCTOR APPARATUS AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20090200679A1
公开(公告)日：2009-08-13
申请号：US12348988
申请日：2009-01-06
申请人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
发明人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L27/14618 , H01L21/76831 , H01L21/76898 , H01L23/481 , H01L24/16 , H01L2224/05009 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/14 , H01L2224/05599
摘要： A semiconductor apparatus including a semiconductor substrate, an insulating layer, a via hole, and a through-hole interconnection is provided. The insulating layer is formed on the semiconductor substrate. The via hole is formed through the semiconductor substrate and the insulating layer. The through-hole interconnection has a conductive layer formed on an insulating layer in the via hole. The surface of the insulating layer formed on the inner surface of the via hole is substantially planarized by filling a recessed portion on a boundary between the semiconductor substrate and the insulating layer formed on the semiconductor substrate.
摘要翻译：提供了包括半导体衬底，绝缘层，通孔和通孔互连的半导体器件。绝缘层形成在半导体衬底上。通孔形成为穿过半导体衬底和绝缘层。通孔互连具有形成在通孔中的绝缘层上的导电层。通过在半导体衬底和形成在半导体衬底上的绝缘层之间的边界填充凹陷部分，在通孔的内表面上形成的绝缘层的表面基本平坦化。

4. 发明授权

US08273657B2 Method for manufacturing a semiconductor apparatus having a through-hole interconnection 有权
标题翻译：具有通孔互连的半导体装置的制造方法
公开(公告)号：US08273657B2
公开(公告)日：2012-09-25
申请号：US13027614
申请日：2011-02-15
申请人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
发明人： Yoshimichi Harada , Masami Suzuki , Yoshihiro Nabe , Yuji Takaoka , Tatsuo Suemasu , Hideyuki Wada , Masanobu Saruta
IPC分类号： H01L21/44
CPC分类号： H01L27/14618 , H01L21/76831 , H01L21/76898 , H01L23/481 , H01L24/16 , H01L2224/05009 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05181 , H01L2224/05548 , H01L2224/05573 , H01L2224/05624 , H01L2224/05666 , H01L2224/05671 , H01L2224/05681 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H01L2924/01019 , H01L2924/01078 , H01L2924/14 , H01L2224/05599
摘要： A method for manufacturing a semiconductor apparatus having a through-hole interconnection in a semiconductor substrate. An insulating layer is formed on the semiconductor substrate. A via hole is formed through the semiconductor substrate and the insulating layer. Another insulating layer is formed in the via hole, and a conductive layer of the through-hole interconnection is subsequently formed. The insulating layer formed in the via hole is formed such as to substantially planarize an inner surface of the via hole.
摘要翻译：一种在半导体衬底中具有通孔互连的半导体装置的制造方法。绝缘层形成在半导体衬底上。通过半导体衬底和绝缘层形成通孔。在通孔中形成另一绝缘层，随后形成通孔互连的导电层。形成在通孔中的绝缘层形成为使得通孔的内表面基本上平坦化。

5. 发明申请

US20060113057A1 Metal filling process and metal filling apparatus 审中-公开
标题翻译：金属灌装工艺和金属灌装设备
公开(公告)号：US20060113057A1
公开(公告)日：2006-06-01
申请号：US11333345
申请日：2006-01-18
申请人： Sayaka Hirafune , Tatsuo Suemasu
发明人： Sayaka Hirafune , Tatsuo Suemasu
IPC分类号： B22D37/00 , B22D41/00
CPC分类号： C23C2/34 , C23C2/00 , H01L21/76898 , H05K3/4038 , H05K2203/0285 , H05K2203/128 , H05K2203/1527
摘要： A metal filling process is provided in which micro holes formed in a work piece are filled with metal by immersing the work piece in molten metal and then removing the work piece from the molten metal. As the work piece is dipped into molten metal, a bottom surface of the work piece is tilted to an angle of 0.5° or more relative to the surface of the molten metal, and as the work piece is removed from the molten metal, a top surface of the work piece is tilted to an angle of 0.5° or more and less than 85° relative to the surface of the molten metal. Failures such as a work piece fracturing when it is dipped into molten metal, or when it is removed from molten metal, are prevented, and failures such as metal remaining on a surface of a work piece after the work piece has been removed from molten metal are also prevented.
摘要翻译：提供一种金属填充工艺，其中通过将工件浸入熔融金属中然后从熔融金属中去除工件，在工件中形成的微孔被金属填充。当工件浸入熔融金属中时，工件的底面相对于熔融金属的表面倾斜0.5°或更大的角度，当工件从熔融金属中取出时，顶部工件的表面相对于熔融金属的表面倾斜至0.5°以上且小于85°的角度。防止在将其浸入熔融金属中时工件断裂或者从熔融金属中除去时的失效，并且在工件从熔融金属中除去后残留在工件表面上的金属等故障也被阻止。

6. 发明申请

US20050205997A1 Device with through-hole interconnection and method for manufacturing the same 审中-公开
标题翻译：具有通孔互连的装置及其制造方法
公开(公告)号：US20050205997A1
公开(公告)日：2005-09-22
申请号：US11078356
申请日：2005-03-14
申请人： Satoshi Yamamoto , Tatsuo Suemasu
发明人： Satoshi Yamamoto , Tatsuo Suemasu
IPC分类号： H01L27/14 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L27/146 , H01L31/02 , H01L33/48 , H01S5/022 , H05K1/03 , H05K1/11 , H05K3/38 , H05K3/40 , H01L23/48 , H01L29/40
CPC分类号： H01L21/76898 , H01L27/14634 , H01L27/14636 , H01L2224/02372 , H01L2224/05001 , H01L2224/05008 , H01L2224/05009 , H01L2224/05024 , H01L2224/05111 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05569 , H01L2224/11 , H01L2924/00014 , H05K1/0306 , H05K3/388 , H05K3/4038 , H05K2201/0394 , H05K2201/09572 , H01L2224/05599
摘要： A device having improved electrical connection includes a first substrate including a first side and a second side; a functional element on the first side of the first substrate; a pad that is electrically connected to the functional element; and a through-hole interconnection provided in a hole extending through the first substrate from the first side to the second side, the through-hole interconnection including a first conductive material and being electrically connected to the pad, and a conductive region that is provided along a portion of an inner surface of the hole, and is made of a second conductive material, different from the first conductive material.
摘要翻译：具有改进的电连接的装置包括包括第一侧和第二侧的第一基板; 在所述第一基板的第一侧上的功能元件; 电连接到所述功能元件的焊盘; 以及设置在从第一侧到第二侧延伸穿过第一基板的孔中的通孔互连，通孔互连包括第一导电材料并且电连接到焊盘，并且导电区域沿着孔的内表面的一部分，并且由与第一导电材料不同的第二导电材料制成。

7. 发明授权

US07180149B2 Semiconductor package with through-hole 有权
标题翻译：半导体封装带通孔
公开(公告)号：US07180149B2
公开(公告)日：2007-02-20
申请号：US10924205
申请日：2004-08-24
申请人： Satoshi Yamamoto , Tatsuo Suemasu , Sayaka Hirafune , Toshihiko Isokawa , Koichi Shiotani , Kazuya Matsumoto
发明人： Satoshi Yamamoto , Tatsuo Suemasu , Sayaka Hirafune , Toshihiko Isokawa , Koichi Shiotani , Kazuya Matsumoto
IPC分类号： H01L31/0203
CPC分类号： H01L24/94 , H01L21/76898 , H01L23/481 , H01L23/5389 , H01L24/48 , H01L25/0652 , H01L25/0657 , H01L27/14618 , H01L27/14632 , H01L27/14687 , H01L2224/02372 , H01L2224/0401 , H01L2224/13024 , H01L2224/451 , H01L2224/48091 , H01L2224/48227 , H01L2225/06524 , H01L2225/06541 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01029 , H01L2924/01033 , H01L2924/01057 , H01L2924/01067 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/04953 , H01L2924/10253 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15788 , H01L2924/16195 , H01L2924/3025 , H01L2924/00 , H01L2224/45099
摘要： A semiconductor package of the invention comprises: a semiconductor element provided with a circuit element on one surface of a semiconductor substrate; an external wiring region provided on an other surface of the semiconductor substrate; a support substrate disposed on the one surface of the semiconductor substrate; an electrode pad disposed on the one surface of the semiconductor substrate; and a through-electrode which extends from the electrode pad through to the other surface of the semiconductor substrate.
摘要翻译：本发明的半导体封装包括：在半导体衬底的一个表面上设置有电路元件的半导体元件; 设置在所述半导体衬底的另一个表面上的外部布线区域; 支撑基板，设置在所述半导体基板的一个表面上; 设置在所述半导体衬底的一个表面上的电极焊盘; 以及从电极焊盘延伸到半导体衬底的另一个表面的贯通电极。

8. 发明申请

US20060001147A1 Semiconductor package and method for manufacturing the same 失效
标题翻译：半导体封装及其制造方法
公开(公告)号：US20060001147A1
公开(公告)日：2006-01-05
申请号：US11166195
申请日：2005-06-27
申请人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
发明人： Michikazu Tomita , Tatsuo Suemasu , Sayaka Hirafune
IPC分类号： H01L29/76
CPC分类号： H01L27/14618 , H01L31/0203 , H01L2224/94
摘要： A semiconductor package includes: a first substrate including: a semiconductor base material having a first side and a second side; a functional element that is provided at the first side of the semiconductor base material; a first wiring; a pad that is electrically connected to the functional element via the first wiring; a through-hole interconnection that is electrically connected to the pad and is provided in a hole that is defined penetrating the semiconductor base material from the first side thereof to the second side thereof, the through-hole interconnection including a first insulating film and a first conductive material formed on the first insulating film; and a sealing material provided surrounding the functional element; a second substrate that is bonded to a first side of the first substrate via the sealing material.
摘要翻译：半导体封装包括：第一基板，包括：具有第一侧和第二侧的半导体基体材料; 设置在所述半导体基材的第一侧的功能元件; 第一布线通过所述第一布线电连接到所述功能元件的焊盘; 通孔互连，其电连接到所述焊盘，并且设置在从所述半导体基材的第一侧至其第二侧贯通的孔中，所述通孔互连包括第一绝缘膜和第一绝缘膜形成在第一绝缘膜上的导电材料; 以及围绕所述功能元件设置的密封材料; 经由密封材料结合到第一基板的第一侧的第二基板。

9. 发明授权

US07814651B2 Method for fabricating a through-hole interconnection substrate 有权
标题翻译：通孔互连基板的制造方法
公开(公告)号：US07814651B2
公开(公告)日：2010-10-19
申请号：US11739575
申请日：2007-04-24
申请人： Tatsuo Suemasu , Takashi Takizawa
发明人： Tatsuo Suemasu , Takashi Takizawa
IPC分类号： H01K3/10
CPC分类号： H05K3/4038 , H01L21/288 , H01L21/3063 , H01L21/486 , H01L21/76898 , H01L23/481 , H01L25/0657 , H01L2224/0401 , H01L2224/05551 , H01L2224/0557 , H01L2224/05572 , H01L2224/05582 , H01L2224/05644 , H01L2224/05671 , H01L2224/11424 , H01L2224/13009 , H01L2224/13144 , H01L2225/06513 , H01L2225/06541 , H01L2924/0002 , H01L2924/09701 , H05K1/0306 , H05K2203/128 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/0105 , H01L2924/00012 , H01L2224/05552
摘要： A blind hole (3) is formed on a substrate (1) from a first side of the substrate toward a second side of the substrate (1). A conductor (11) is filled in the blind hole (3). The substrate (1) is removed from the opposite side to expose the conductor (13) filled in the blind hole (3).
摘要翻译：在基板（1）上从基板的第一侧向基板（1）的第二侧形成盲孔（3）。导体（11）填充在盲孔（3）中。从相对侧移除基板（1）以露出填充在盲孔（3）中的导体（13）。

10. 发明授权

US06743499B2 Metal filling method and member with filled metal sections 有权
标题翻译：金属填充方法和填充金属部件的构件
公开(公告)号：US06743499B2
公开(公告)日：2004-06-01
申请号：US10247264
申请日：2002-09-19
申请人： Tatsuo Suemasu , Takashi Takizawa
发明人： Tatsuo Suemasu , Takashi Takizawa
IPC分类号： B32B1500
CPC分类号： H01L21/76877 , C23C2/00 , C23C2/02 , C23C2/26 , H01L21/288 , H01L21/76882 , H01L21/76898 , H01L25/0657 , H01L2224/05556 , H01L2224/05572 , H01L2224/05573 , H01L2224/13025 , H01L2224/16 , H01L2924/00014 , H05K3/3468 , H05K3/4038 , H05K3/4076 , H05K3/426 , H05K2201/0305 , H05K2201/09572 , H05K2203/044 , H05K2203/085 , H05K2203/1394 , Y10S428/901 , Y10T428/24851 , Y10T428/24917 , Y10T428/31678 , H01L2224/05599
摘要： In the formation of through wirings in a silicon substrate and so forth, there was a need for the development of a technology that would allow metal to be reliably filled particularly in the vicinity of openings of through holes and other fine holes. This invention provides a metal filling method and member with filled metal sections in which, in the inflow and filling of a plating solution into through holes 11 of a substrate 10 by immersing said substrate 10 in heated and melted conductive metal, filled metal sections are formed by preliminarily forming a metal layer 15 on the inner surface of one of the ends of through holes 11 of this substrate 10 as well as on substrate top surface 13 around those openings, removing substrate 10 on which inflow and filling of the plating solution into through holes 11 has been completed from the plating solution, and then cooling to solidify the plating solution that has been filled into the through holes.
摘要翻译：在硅衬底等中形成通过布线的方法中，需要开发一种能够使金属被可靠地填充到特别是通孔和其它细孔的开口附近的技术。本发明提供了一种金属填充方法和具有填充金属部分的部件，其中，通过将所述基板10浸入加热和熔化的导电金属中，在将电镀液流入和填充到基板10的通孔11中时，形成填充的金属部分通过在该基板10的通孔11的一个端部的内表面以及围绕这些开口的基板顶表面13上预先形成金属层15，去除基板10，电镀液的流入和填充通过从电镀液中完成孔11，然后冷却固化已经填充到通孔中的电镀液。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式