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1. 发明授权

US6104183A Semiconductor device testing apparatus 失效
标题翻译：半导体器件测试仪器
公开(公告)号：US6104183A
公开(公告)日：2000-08-15
申请号：US809243
申请日：1997-05-28
申请人： Yoshihito Kobayashi , Tsuyoshi Yamashita , Hiroto Nakamura , Shin Nemoto , Yoshiyuki Masuo , Akihiko Ito
发明人： Yoshihito Kobayashi , Tsuyoshi Yamashita , Hiroto Nakamura , Shin Nemoto , Yoshiyuki Masuo , Akihiko Ito
IPC分类号： G01R31/26 , G01R31/28 , H01L21/677
CPC分类号： G01R31/2868
摘要： A semiconductor device testing apparatus having a reduced transverse width and compact in size is provided. Adjacent to a constant temperature chamber 101 containing therein a vertical transport means is located a test chamber 102 which is in turn adjoined by a temperature-stress removing chamber 103 likewise containing therein a vertical transport means, so that the constant temperature chamber 101, the test chamber 102 and the temperature-stress removing chamber 103 are arranged transversely in a line. Further, a loader section 300 is located in front of the constant temperature chamber, and an unloader section 400 is located in front of the test chamber and the temperature-stress removing chamber. With this arrangement, the transverse width of the testing apparatus may be reduced to about three test tray lengths.
摘要翻译： PCT No.PCT / JP96 / 02067 Sec。 371日期1997年5月28日 102（e）日期1997年5月28日PCT提交1996年7月24日PCT公布。出版物WO97 / 05495 日期：1997年2月13日提供了具有减小的横向宽度和尺寸紧凑的半导体器件测试装置。在其中容纳有垂直传送装置的恒温室101附近设置有测试室102，测试室102又由同样包含垂直传送装置的温度应力消除室103邻接，使得恒温室101，测试室102和温度应力消除室103横向排列成一行。此外，装载部300位于恒温室前方，卸载部400位于试验室前方和温度应力消除室。通过这种布置，测试装置的横向宽度可以减小到约三个测试托盘长度。

2. 发明授权

US06384593B1 Semiconductor device testing apparatus 失效
标题翻译：半导体器件测试仪器
公开(公告)号：US06384593B1
公开(公告)日：2002-05-07
申请号：US09596062
申请日：2000-06-16
申请人： Yoshihito Kobayashi , Tsuyoshi Yamashita , Hiroto Nakamura , Shin Nemoto , Yoshiyuki Masuo , Akihiko Ito
发明人： Yoshihito Kobayashi , Tsuyoshi Yamashita , Hiroto Nakamura , Shin Nemoto , Yoshiyuki Masuo , Akihiko Ito
IPC分类号： G01R3128
CPC分类号： G01R31/2868
摘要： A semiconductor device testing apparatus having a reduced transverse width and compact in size is provided. Adjacent to a constant temperature chamber containing therein a vertical transport means is located a test chamber which is in turn adjoined by a temperature-stress removing chamber likewise containing therein a vertical transport means, so that the constant temperature chamber and the test chamber are arranged transversely in a line, while the temperature-stress removing chamber is located in front of the test chamber when viewed in front view of the apparatus. Further, a loader section is located in front of the constant temperature chamber, and an unloader section is located above the temperature-stress removing chamber. With this arrangement, the transverse width of the testing apparatus may be reduced to about two test tray lengths.
摘要翻译：提供了具有减小的横向宽度并且尺寸紧凑的半导体器件测试装置。在其中容纳有垂直输送装置的恒温室附近设有试验室，该试验室又由同样含有垂直输送装置的温度应力消除室邻接，使得恒温室和试验室横向布置在该装置的正视图中观察时，温度应力消除室位于测试室的前方。此外，装载部位于恒温室前方，卸载部位于温度应力消除室的上方。通过这种布置，测试装置的横向宽度可以减小到大约两个测试托盘长度。

3. 发明授权

US06459259B1 Tester for semiconductor devices and test tray used for the same 失效
标题翻译：用于半导体器件和测试托盘的测试仪用于相同
公开(公告)号：US06459259B1
公开(公告)日：2002-10-01
申请号：US09254084
申请日：1999-02-26
申请人： Akihiko Ito , Yoshihito Kobayashi , Yoshiyuki Masuo , Tsuyoshi Yamashita
发明人： Akihiko Ito , Yoshihito Kobayashi , Yoshiyuki Masuo , Tsuyoshi Yamashita
IPC分类号： B65G4300
CPC分类号： G01R31/2893 , G01R31/01 , G01R31/2851 , G01R31/2867
摘要： An IC tester which is capable of reducing the time required before completion of testing on all of ICs to be tested is provided. The depth (length in the Y-axis direction) of the constant temperature chamber 4 and the exit chamber 5 is expanded by a dimension corresponding approximately to one transverse width (length of the minor edge) of the rectangular test tray 3, and two generally parallel test tray transport paths or alternatively a widened test tray transport path broad enough to transport two test trays simultaneously with the two test trays juxtaposed in a direction transverse to the widened test tray transport path are provided in the section of test tray transport path extending from the soak chamber 41 in the constant temperature chamber 4 through the testing section 42 in the constant temperature chamber 4 to the exit chamber 5 so that two test trays may be simultaneously transported along the two test tray transport paths or the widened test tray transport path.
摘要翻译：提供了一种能够在所有要测试的IC上测试完成之前减少所需时间的IC测试器。恒温室4和出口室5的深度（Y轴方向的长度）以相当于矩形试验盘3的一个横向宽度（小边的长度）的尺寸扩大，平行的测试托盘传送路径或者可选地，加宽的测试托盘传送路径足够宽以与横向于加宽的测试托盘传送路径的方向并置的两个测试托盘同时传送两个测试托盘设置在从托盘传送路径延伸的部分恒温室4中的浸泡室41通过恒温室4中的检测部分42到出口室5，从而沿着两个试纸盘传送路径或加宽的试纸盘传送路径同时传送两个试纸盘。

4. 发明授权

US06856128B2 Semiconductor device testing apparatus and a test tray for use in the testing apparatus 有权
标题翻译：半导体器件测试装置和用于测试装置的测试托盘
公开(公告)号：US06856128B2
公开(公告)日：2005-02-15
申请号：US09964211
申请日：2001-09-25
申请人： Akihiko Ito , Yoshihito Kobayashi , Yoshiyuki Masuo , Tsuyoshi Yamashita
发明人： Akihiko Ito , Yoshihito Kobayashi , Yoshiyuki Masuo , Tsuyoshi Yamashita
IPC分类号： G01R31/01 , G01R31/28 , B65G43/00
CPC分类号： G01R31/2893 , G01R31/01 , G01R31/2851 , G01R31/2867
摘要： An IC tester which is capable of reducing the time required before completion of testing on all of ICs to be tested is provided. The depth (length in the Y-axis direction) of the constant temperature chamber 4 and the exit chamber 5 is expanded by a dimension corresponding approximately to one transverse width (length of the minor edge) of the rectangular test tray 3, and two generally parallel test tray transport paths or alternatively a widened test tray transport path broad enough to transport two test trays simultaneously with the two test trays juxtaposed in a direction transverse to the widened test tray transport path are provided in the section of test tray transport path extending from the soak chamber 41 in the constant temperature chamber 4 through the testing section 42 in the constant temperature chamber 4 to the exit chamber 5 so that two test trays may be simultaneously transported along the two test tray transport paths or the widened test tray transport path.
摘要翻译：提供了一种能够在所有要测试的IC上测试完成之前减少所需时间的IC测试器。恒温室4和出口室5的深度（Y轴方向的长度）以相当于矩形试验盘3的一个横向宽度（小边的长度）的尺寸扩大，平行的测试托盘传送路径或者可选地，加宽的测试托盘传送路径足够宽以与横向于加宽的测试托盘传送路径的方向并置的两个测试托盘同时传送两个测试托盘设置在从托盘传送路径延伸的部分恒温室4中的浸泡室41通过恒温室4中的检测部分42到出口室5，从而沿着两个试纸盘传送路径或加宽的试纸盘传送路径同时传送两个试纸盘。

5. 发明授权

US07612575B2 Electronic device test apparatus for successively testing electronic devices 有权
标题翻译：用于连续测试电子设备的电子设备测试装置
公开(公告)号：US07612575B2
公开(公告)日：2009-11-03
申请号：US11571428
申请日：2005-07-25
申请人： Akihiko Ito , Kazuyuki Yamashita , Yoshihito Kobayashi
发明人： Akihiko Ito , Kazuyuki Yamashita , Yoshihito Kobayashi
IPC分类号： G01R31/26 , G01R31/28
CPC分类号： G01R31/31718 , G01R31/2865 , G01R31/2868 , G01R31/2893 , G01R31/31905
摘要： An apparatus having a plurality of test units (520), a loading transport unit (510) transporting a plurality of electronic devices from a customer tray (4C) to a test tray (4T) before being loaded in a test unit, and a classifying transport unit (530) transporting a plurality of electronic devices from a test tray while classifying them to customer trays in accordance with test results, the loading transport unit being provided at least at a frontmost stage of a plurality of test units, the classifying transport unit being provided at least at a rearmost stage of the plurality of test units, the test tray being successively conveyed from the frontmost stage to the rearmost stage of the plurality of test units in the state carrying electronic devices and returned from the rearmost stage test unit to the frontmost stage test unit.
摘要翻译：一种具有多个测试单元（520）的装置，在加载到测试单元之前将多个电子设备从客户托盘（4C）运送到测试托盘（4T）的装载传送单元（510），以及分类运输单元（530），其根据测试结果将多个电子设备从测试盘传送到客户托盘，所述装载运输单元至少设置在多个测试单元的最前段，所述分类运输单元至少设置在多个测试单元的最后阶段，测试托盘在携带电子设备的状态下从多个测试单元的最前一阶段到最后阶段被连续传送并从最后阶段测试单元返回到最前台测试单元。

6. 发明申请

US20080038098A1 Electronic Device Test Apparatus 有权
标题翻译：电子设备测试仪器
公开(公告)号：US20080038098A1
公开(公告)日：2008-02-14
申请号：US11571428
申请日：2005-07-25
申请人： Akihiko Ito , Kazuyuki Yamashita , Yoshihito Kobayashi
发明人： Akihiko Ito , Kazuyuki Yamashita , Yoshihito Kobayashi
IPC分类号： H01L21/677
CPC分类号： G01R31/31718 , G01R31/2865 , G01R31/2868 , G01R31/2893 , G01R31/31905
摘要： An apparatus having a plurality of test units (520), a loading transport unit (510) transporting a plurality of electronic devices from a customer tray (4C) to a test tray (4T) before being loaded in a test unit, and a classifying transport unit (530) transporting a plurality of electronic devices from a test tray while classifying them to customer trays in accordance with test results, the loading transport unit being provided at least at a frontmost stage of a plurality of test units, the classifying transport unit being provided at least at a rearmost stage of the plurality of test units, the test tray being successively conveyed from the frontmost stage to the rearmost stage of the plurality of test units in the state carrying electronic devices and returned from the rearmost stage test unit to the frontmost stage test unit.
摘要翻译：一种具有多个测试单元（520）的装置，在加载到测试单元之前将多个电子设备从客户托盘（4C）传送到测试托盘（4T）的装载传送单元（510），以及分类运输单元（530），其根据测试结果将多个电子设备从测试盘传送到客户托盘，所述装载运输单元至少设置在多个测试单元的最前面，分类运送单元至少设置在多个测试单元的最后阶段，测试托盘在携带电子设备的状态下从多个测试单元的最前一阶段到最后阶段连续传送并从最后阶段测试返回单元到最前台测试单元。

7. 发明申请

US20100147088A1 ELECTRONIC DEVICE TEST APPARATUS AND METHOD OF TESTING ELECTRONIC DEVICES 审中-公开
标题翻译：电子设备测试装置和测试电子设备的方法
公开(公告)号：US20100147088A1
公开(公告)日：2010-06-17
申请号：US12161067
申请日：2006-01-17
申请人： Akihiko Ito , Koya Karino , Yoshihito Kobayashi
发明人： Akihiko Ito , Koya Karino , Yoshihito Kobayashi
IPC分类号： G01N1/00 , G01R31/02
CPC分类号： G01R31/2893
摘要： An electronic device test apparatus used for bringing the ICs into electrical contact with contact parts of the test head in the state where the ICs are held on a test tray and running tests on the electrical characteristics of ICs, the electronic device test apparatus including an inversion system for rotating the test tray which holds a plurality of ICs in a direction dropping ICs which are insufficiently held at least once before testing.
摘要翻译：一种电子设备测试装置，用于在IC保持在测试托盘上的状态下使IC与测试头的接触部分电接触，并对IC的电气特性进行运行测试，电子设备测试设备包括反演系统，用于使测试托盘旋转，所述测试托盘在测试之前沿着不足够保持至少一次的IC的方向保持多个IC。

8. 发明授权

US07800393B2 Electronic device test apparatus for successively testing electronic devices 失效
标题翻译：用于连续测试电子设备的电子设备测试装置
公开(公告)号：US07800393B2
公开(公告)日：2010-09-21
申请号：US12566265
申请日：2009-09-24
申请人： Akihiko Ito , Kazuyuki Yamashita , Yoshihito Kobayashi
发明人： Akihiko Ito , Kazuyuki Yamashita , Yoshihito Kobayashi
IPC分类号： G01R31/26
CPC分类号： G01R31/31718 , G01R31/2865 , G01R31/2868 , G01R31/2893 , G01R31/31905
摘要： An electronic device test apparatus includes a plurality of testers on which are mounted test heads that are connected to test outputters for outputting test signals to the electronic devices and for receiving response signals from the electronic devices. A loading transporter is provided at a frontmost stage of the testers that transports the electronic devices from a previous process conveyance medium to a test tray before loading the electronic devices into the testers. An unloading transporter is provided at a rearmost stage of the testers that unloads the electronic devices from the test tray to a later process conveyance medium corresponding to the response signals. A transporter is provided between the testers that transports the test tray from a previous process tester to a later process tester. The transporter includes a buffer that holds test trays to absorb a waiting time due to differences in processing capacities between test trays.
摘要翻译：一种电子设备测试装置，包括多个测试器，其上安装有测试头，测试头连接到测试输出器，用于向电子设备输出测试信号并接收来自电子设备的响应信号。在将电子设备加载到测试器中之前，在测试器的最前面的一个阶段提供一个装载运送器，它将电子设备从先前的处理传送介质输送到测试托盘。在测试器的最后阶段提供卸载运送器，其将电子设备从测试托盘卸载到对应于响应信号的后续处理输送介质。在将测试托盘从先前的过程测试仪传送到后来的过程测试器的测试器之间提供运输器。转运器包括一个缓冲器，该缓冲器保持测试托盘，以吸收由于测试盘之间的处理能力差异而导致的等待时间。

9. 发明授权

US5635832A IC carrier for use with an IC handler 失效
标题翻译： IC载体与IC处理程序一起使用
公开(公告)号：US5635832A
公开(公告)日：1997-06-03
申请号：US596279
申请日：1996-02-08
申请人： Akihiko Ito , Yoshihito Kobayashi
发明人： Akihiko Ito , Yoshihito Kobayashi
IPC分类号： G01R1/04 , H05K7/10 , H05K13/00 , G01R31/28
CPC分类号： H05K7/1023 , G01R1/0433 , H05K13/0084
摘要： An IC carrier for loading thereon and transporting a device under test is used in an IC handler. The IC carrier is capable of easily and reliably loading thereon and positioning in place a device under test even the device under test having a reduced pitch between lead pins thereof. A box-like housing open in the top is formed and the bottom wall thereof has two generally parallel contact holes in the form of elongated slots, these two contact holes being spaced from each other by a spacing corresponding to that between two arrays of lead pins of the device under test. Each of the contact holes has a length corresponding to that of the associated lead pin array and a width sufficient to receive the associated lead pin array. Carrier guides are formed one adjacent each of opposite longitudinal ends of each of the contact holes and extend upwardly to a predetermined height from the bottom floor of the housing. The distance between the side walls of the carrier guides opposing each other transversely of the length of the contact holes is selected such that the device under test is accommodated between the opposed side walls of the carrier guides. The socket for applying electric signals to the device under test has two rows of socket terminals spaced apart by substantially the same distance as the spacing between the two contact holes, each row containing socket terminals of the same number and same pitch as the pins of the corresponding lead pin array of the device under test. Insulating thin plate members are interposed between adjacent socket terminals of each of said socket terminal rows. The socket terminals are adapted to be inserted into the contact holes and be electrically connected with the lead pins of the device under test during the electric testing.
摘要翻译： PCT No.PCT / JP95 / 01187 Sec。 371日期1996年2月8日 102（e）日期1996年2月8日PCT归档1995年6月14日PCT公布。第WO95 / 34825号公报日期1995年12月21日在IC处理程序中使用用于在其上装载并运送被测器件的集成电路运营商。即使被测器件的引脚之间的间距减小，IC载体也能够容易且可靠地将其装载在一起并将其放置在适当的位置。形成在顶部开口的盒状壳体，并且其底壁具有两个大致平行的细长槽形式的接触孔，这两个接触孔彼此间隔开一定距离，这两个接触孔对应于两个引线引脚阵列的被测设备。每个接触孔具有对应于相关联的引线引脚阵列的长度的长度和足以接收相关引脚阵列的宽度。载体导向件形成在每个接触孔的每个相对的纵向端部附近，并且从壳体的底部底部向上延伸到预定的高度。选择横向于接触孔的长度的彼此相对的载体引导件的侧壁之间的距离，使得被测试的装置容纳在载体引导件的相对的侧壁之间。用于向被测器件施加电信号的插座具有两排插座端子，间隔开距离与两个接触孔之间的距离大致相同的距离，每行包含相同数量的插座端子和与相应的引脚阵列的被测器件。绝缘薄板构件插入在每个所述插座端子排的相邻插座端子之间。插座端子适于插入接触孔，并在电测试期间与被测器件的引脚相电连接。

10. 发明授权

US06437593B1 Electric device testing apparatus and electric device testing method 失效
标题翻译：电气设备检测仪器及电气设备检测方法
公开(公告)号：US06437593B1
公开(公告)日：2002-08-20
申请号：US09500486
申请日：2000-02-09
申请人： Akihiko Ito , Yoshihito Kobayashi
发明人： Akihiko Ito , Yoshihito Kobayashi
IPC分类号： G01R3126
CPC分类号： G01R31/2874
摘要： An electric device testing apparatus for carrying out a test by pushing a terminal of an IC against a contact portion of a test head, comprising a temperature calculation means for calculating an actual temperature of the IC based on a signal from a temperature sensing element provided on the IC.
摘要翻译：一种电气设备测试装置，用于通过将IC的端子推靠在测试头的接触部分上来进行测试，所述电气设备测试装置包括：温度计算装置，用于根据来自所提供的温度感测元件的信号计算IC的实际温度; IC。

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