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1. 发明授权

US4787997A Etching solution for evaluating crystal faults 失效
标题翻译：用于评估晶体缺陷的蚀刻解决方案
公开(公告)号：US4787997A
公开(公告)日：1988-11-29
申请号：US163033
申请日：1988-03-02
申请人： Yoshihiko Saito , Yoshiaki Matsushita
发明人： Yoshihiko Saito , Yoshiaki Matsushita
IPC分类号： H01L21/66 , B62L1/00 , H01L21/306 , H01L21/308 , B44C1/22
CPC分类号： C09K13/08 , G01N1/32
摘要： An etching solution used for evaluating crystal defects in a silicon wafer is disclosed. The etching solution is characterized by consisting of acetic acid, hydrofluoric acid, nitric acid, silver nitrate, and copper nitrate, and is very advantageous in consideration of the operator's health, since it does not contain Cr.sup.6+. The etching solution has a sufficiently high etching rate and detection properties.

2. 发明授权

US4894349A Two step vapor-phase epitaxial growth process for control of autodoping 失效
标题翻译：用于控制自动掺杂的两步气相外延生长工艺
公开(公告)号：US4894349A
公开(公告)日：1990-01-16
申请号：US284512
申请日：1988-12-15
申请人： Yoshihiko Saito , Yoshiaki Matsushita
发明人： Yoshihiko Saito , Yoshiaki Matsushita
IPC分类号： H01L21/205 , H01L21/22 , H01L21/74
CPC分类号： H01L21/74 , H01L21/02381 , H01L21/0242 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/2205 , Y10S148/007 , Y10S148/025 , Y10S148/169
摘要： A process for forming a vapor-phase epitaxial growth layer on a silicon wafer having a buried layer of a high As or B concentration. This vapor-phase epitaxial growth process is performed in two steps of (i) performing a vapor-phase epitaxial growth at a relatively low temperature by using a reaction gas containing at least one kind selected from a group consisting of SiH.sub.x F.sub.4-x (x=0 to 3) and Si.sub.2 H.sub.x F.sub.6-x (x=0-5) and at least one kind selected from a group consisting of SiH.sub.4 and Si.sub.2 H.sub.6, and (ii) performing a vapor-phase epitaxial growth under a condition which allows a higher growth rate that in the step (i) by using a reaction gas containing SiH.sub.4 or Si.sub.2 H.sub.6 which may or may not be accompanied with silane fluoride.

3. 发明授权

US07651930B2 Method of manufacturing semiconductor storage device 有权
标题翻译：制造半导体存储装置的方法
公开(公告)号：US07651930B2
公开(公告)日：2010-01-26
申请号：US12146802
申请日：2008-06-26
申请人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
发明人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
IPC分类号： H01L21/20
CPC分类号： H01L27/115 , H01L21/76264 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203 , H01L29/66825
摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
摘要翻译：一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在开口部。然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。然后，在硅单晶层上形成存储单元阵列。

4. 发明授权

US07510769B2 Laminate film 有权
标题翻译：层压膜
公开(公告)号：US07510769B2
公开(公告)日：2009-03-31
申请号：US11074702
申请日：2005-03-09
申请人： Takakazu Hase , Yoshihiko Saito , Koichi Takahashi , Yasushi Kojima , Kenichi Shinya , Keishi Hamada
发明人： Takakazu Hase , Yoshihiko Saito , Koichi Takahashi , Yasushi Kojima , Kenichi Shinya , Keishi Hamada
IPC分类号： B32B27/30 , B32B27/40
CPC分类号： C09D133/14 , C08J7/042 , C08J2433/14 , Y10T428/31551 , Y10T428/31554 , Y10T428/31573 , Y10T428/31855 , Y10T428/31909
摘要： A laminate film has a clear layer (B) comprising an acrylic-based polymer (B1) having at least one longer unsaturated double bond group and at least one shorter unsaturated double bond group as side chains, and having a weight-average molecular weight not less than 50,000 but not more than 500,000, the longer unsaturated double bond group introduced in the acrylic-based polymer (B1) by a long-chain unsaturated carboxylic acid having a molecular weight of 150 or more, and the shorter unsaturated double bond group introduced in the acrylic-based polymer (B1) by a short-chain unsaturated carboxylic acid having a molecular weight of less than 150. Compared with laminate films prepared by spray coating, dip coating, or other coating methods, this laminate film is excellent in processability, coating film properties, and ornamental properties. Thus, an article can be excellently decorated with the laminate film provided by the present invention.
摘要翻译：层压膜具有透明层（B），其包含具有至少一个较长不饱和双键基团和至少一个较短不饱和双键基团作为侧链的丙烯酸类聚合物（B1），并且具有重均分子量小于50,000但不超过500,000，通过分子量为150以上的长链不饱和羧酸引入丙烯酸类聚合物（B1）中较长的不饱和双键基团，并引入较短的不饱和双键基团在丙烯酸类聚合物（B1）中，通过分子量小于150的短链不饱和羧酸。与通过喷涂，浸涂或其它涂布方法制备的层压膜相比，该层压膜具有优异的加工性，涂膜性质和装饰性。因此，用本发明提供的层压膜可以很好地装饰物品。

5. 发明授权

US07067870B2 Power semiconductor switching element 有权
公开(公告)号：US07067870B2
公开(公告)日：2006-06-27
申请号：US10770014
申请日：2004-02-03
申请人： Ichiro Omura , Wataru Saito , Tsuneo Ogura , Hiromichi Ohashi , Yoshihiko Saito , Kenichi Tokano
发明人： Ichiro Omura , Wataru Saito , Tsuneo Ogura , Hiromichi Ohashi , Yoshihiko Saito , Kenichi Tokano
IPC分类号： H01L29/76
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0619 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/41741 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/66734 , H01L29/7397 , H01L29/7722 , H01L29/7811 , H01L29/7813 , H01L29/872 , H01L29/8725
摘要： A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.

6. 发明申请

US20120181598A1 NONVOLATILE SEMICONDUCTOR MEMORY 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US20120181598A1
公开(公告)日：2012-07-19
申请号：US13430153
申请日：2012-03-26
申请人： Masayuki ICHIGE , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
发明人： Masayuki ICHIGE , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/0207 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
摘要翻译：非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

7. 发明授权

US07982259B2 Nonvolatile semiconductor memory 有权
标题翻译：非易失性半导体存储器
公开(公告)号：US07982259B2
公开(公告)日：2011-07-19
申请号：US11687758
申请日：2007-03-19
申请人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
发明人： Masayuki Ichige , Fumitaka Arai , Riichiro Shirota , Toshitake Yaegashi , Yoshio Ozawa , Akihito Yamamoto , Ichiro Mizushima , Yoshihiko Saito
IPC分类号： H01L29/788
CPC分类号： H01L29/42336 , H01L21/28273 , H01L27/0207 , H01L27/115 , H01L27/11521 , H01L27/11524 , H01L29/42324 , H01L29/7881
摘要： A nonvolatile semiconductor memory includes first and second memory cells having a floating gate and a control gate. The floating gate of the first and second memory cells is comprised a first part, and a second part arranged on the first part, and a width of the second part in an extending direction of the control gate is narrower than that of the first part. A first space between the first parts of the first and second memory cells is filled with one kind of an insulator. The control gate is arranged at a second space between the second parts of the first and second memory cells.
摘要翻译：非易失性半导体存储器包括具有浮动栅极和控制栅极的第一和第二存储单元。第一和第二存储单元的浮动栅极包括第一部分和布置在第一部分上的第二部分，并且第二部分在控制栅极的延伸方向上的宽度比第一部分的宽度窄。第一和第二存储单元的第一部分之间的第一空间填充有一种绝缘体。控制栅极被布置在第一和第二存储单元的第二部分之间的第二空间处。

8. 发明申请

US20100112791A1 METHOD OF MANUFACTURING SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：制造半导体存储器件的方法
公开(公告)号：US20100112791A1
公开(公告)日：2010-05-06
申请号：US12646563
申请日：2009-12-23
申请人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
发明人： Takashi Suzuki , Hirokazu Ishida , Ichiro Mizushima , Yoshio Ozawa , Fumiki Aiso , Katsuyuki Sekine , Takashi Nakao , Yoshihiko Saito
IPC分类号： H01L21/20
CPC分类号： H01L27/115 , H01L21/76264 , H01L21/84 , H01L27/11521 , H01L27/11524 , H01L27/1203 , H01L29/66825
摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.
摘要翻译：一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在开口部。然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。然后，在硅单晶层上形成存储单元阵列。

9. 发明授权

US07531871B2 Power semiconductor switching element 有权
公开(公告)号：US07531871B2
公开(公告)日：2009-05-12
申请号：US11293301
申请日：2005-12-05
申请人： Ichiro Omura , Wataru Saito , Tsuneo Ogura , Hiromichi Ohashi , Yoshihiko Saito , Kenichi Tokano
发明人： Ichiro Omura , Wataru Saito , Tsuneo Ogura , Hiromichi Ohashi , Yoshihiko Saito , Kenichi Tokano
IPC分类号： H01L29/94
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0619 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/405 , H01L29/407 , H01L29/408 , H01L29/41741 , H01L29/4236 , H01L29/42368 , H01L29/4238 , H01L29/66734 , H01L29/7397 , H01L29/7722 , H01L29/7811 , H01L29/7813 , H01L29/872 , H01L29/8725
摘要： A semiconductor element of this invention includes a drift layer of a first conductivity type formed on a semiconductor substrate of the first conductivity type, a well layer of a second conductivity type selectively formed in the surface of the drift layer, a source layer of the first conductivity type selectively formed in the surface of the well layer, a trench formed to reach at least the inside of the drift layer from the surface of the source layer through the well layer, a buried electrode formed in the trench through a first insulating film, and a control electrode formed on the drift layer, the well layer, and the source layer through a second insulating film.

10. 发明授权

US4956392A Process for producing methanol or mixed alcohol 失效
标题翻译：生产甲醇或混合醇的方法
公开(公告)号：US4956392A
公开(公告)日：1990-09-11
申请号：US437314
申请日：1989-11-17
申请人： Yoshihiko Saito , Osamu Hashimoto , Masaaki Kuwa , Takashi Kojima , Kinya Tsuji
发明人： Yoshihiko Saito , Osamu Hashimoto , Masaaki Kuwa , Takashi Kojima , Kinya Tsuji
IPC分类号： C07C29/153 , B01J23/80 , C07B61/00 , C07C27/00 , C07C27/06 , C07C29/15 , C07C29/154 , C07C31/02 , C07C67/00
CPC分类号： C07C29/154 , C12C11/02 , Y02P20/52
摘要： A process for producing methanol or mixed alcohol which comprises reacting a synthesis gas containing hydrogen and carbon monoxide and/or carbon dioxide in a fluidized catalyst bed.Catalyst particles having an average particle diameter of not more than 150 microns and a particle density of at least 1.7 g/cm.sup.3 are used as the fluidized catalyst.The catalyst particles are contacted with the synthesis gas at a superficial linear velocity of at least 0.2 m/sec. under a pressure of 40 to 200 atmospheres.
摘要翻译：一种生产甲醇或混合醇的方法，其包括在流化催化剂床中使含氢和一氧化碳和/或二氧化碳的合成气反应。作为流化催化剂，使用平均粒径为150μm以下，粒子密度为1.7g / cm 3以上的催化剂粒子。催化剂颗粒以至少0.2m / sec的表观线速度与合成气体接触。在40至200个大气压的压力下。

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