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    • 1. 发明授权
    • Code conversion method and apparatus, code recording medium, code
recording apparatus and code reproducing apparatus
    • 代码转换方法和装置,代码记录介质,代码记录装置和代码再现装置
    • US5898394A
    • 1999-04-27
    • US900436
    • 1997-07-25
    • Yoshiharu KobayashiAkira MutohShin-ichi TanakaNobuo Akahira
    • Yoshiharu KobayashiAkira MutohShin-ichi TanakaNobuo Akahira
    • G11B20/10G11B20/14H03M5/14H03M7/00
    • G11B20/10009G11B20/10G11B20/1426H03M5/145
    • A code conversion method and apparatus is provided for scrambling and modulating data. The method and apparatus includes scrambling an input main data unit based on any of plural types of pseudo-random number sequences, and modulating the scrambled main data unit based on any of plural types of modulation data. An output main data unit is produced from the modulated main data unit, and a calculated value representing a difference between a number of 0 bits and a number of 1 bits included in the output main data unit is obtained. Any of the modulation data is then selected dependent upon the calculated value. The method and apparatus further includes determining whether or not a variation of the calculated value has exceeded a predetermined threshold, newly selecting another pseudo-random number sequence used for the step of scrambling if it is determined that the variation of the calculated value has exceeded the predetermined threshold value, and re-scrambling the input main data unit based on the newly selected pseudo-random number sequence.
    • 提供了用于对数据进行加扰和调制的代码转换方法和装置。 所述方法和装置包括基于多种类型的伪随机数序列中的任何一种对输入主数据单元进行加扰,并且基于多种类型的调制数据中的任何一种调制加扰的主数据单元。 从调制主数据单元产生输出主数据单元,得到表示输出主数据单元中包含的0位数与1位数之间的差的计算值。 然后根据计算值选择任何调制数据。 所述方法和装置还包括:确定计算值的变化是否已经超过预定阈值,如果确定计算值的变化已经超过所述阈值,则新选择用于加扰步骤的另一伪随机数序列 基于新选择的伪随机数序列重新加扰输入主数据单元。
    • 2. 再颁专利
    • Code conversion method and apparatus, code recording medium, code recording apparatus and code reproducing apparatus
    • 代码转换方法和装置,代码记录介质,代码记录装置和代码再现装置
    • USRE39771E1
    • 2007-08-14
    • US09844740
    • 2001-04-26
    • Yoshiharu KobayashiAkira MutohShin-ichi TanakaNobuo Akahira
    • Yoshiharu KobayashiAkira MutohShin-ichi TanakaNobuo Akahira
    • H03M7/00
    • H03M5/145
    • A code conversion method and apparatus is provided for scrambling and modulating data. The method and apparatus includes scrambling an input main data unit based on any of plural types of pseudo-random number sequences, and modulating the scrambled main data unit based on any of plural types of modulation data. An output main data unit is produced from the modulated main data unit, and a calculated value representing a difference between a number of 0 bits and a number of 1 bits included in the output main data unit is obtained. Any of the modulation data is then selected dependent upon the calculated value. The method and apparatus further includes determining whether or not a variation of the calculated value has exceeded a predetermined threshold, newly selecting another pseudo-random number sequence used for the step of scrambling if it is determined that the variation of the calculated value has exceeded the predetermined threshold value, and re-scrambling the input main data unit based on the newly selected pseudo-random number sequence.
    • 提供了用于对数据进行加扰和调制的代码转换方法和装置。 所述方法和装置包括基于多种类型的伪随机数序列中的任何一种对输入主数据单元进行加扰,并且基于多种类型的调制数据中的任何一种调制加扰的主数据单元。 从调制主数据单元产生输出主数据单元,得到表示输出主数据单元中包含的0位数与1位数之间的差的计算值。 然后根据计算值选择任何调制数据。 所述方法和装置还包括:确定计算值的变化是否已经超过预定阈值,如果确定计算值的变化已经超过所述阈值,则新选择用于加扰步骤的另一伪随机数序列 基于新选择的伪随机数序列重新加扰输入主数据单元。
    • 7. 发明申请
    • Recorder, Player, and Recorder/Player
    • 录音机,播放器和录音机/播放器
    • US20080285399A1
    • 2008-11-20
    • US11577413
    • 2005-10-20
    • Yoshiharu Kobayashi
    • Yoshiharu Kobayashi
    • G11B7/00
    • G11B7/24088B82Y10/00G11B7/00456G11B7/245G11B20/10194H04L27/2601H04L27/34
    • An apparatus according to the present invention includes a write compensation section, which generates a write signal to write information on an information storage medium, and a writing section for irradiating the information storage medium with a pulsed beam based on the write signal generated by the write compensation section. The information storage medium includes a recording layer, which has an optical constant that changes continuously with the total quantity of light received. The writing section radiates and condenses multiple pulsed beams on the recording layer at an interval that is shorter than the diameter of the pulsed beams on the recording layer. The write compensation section generates the write signal such that the each sum of variations in the optical constant at each irradiated spot of the pulsed beam on the recording layer through the end of a write operation forms a predetermined variation pattern.
    • 根据本发明的装置包括写入补偿部分,其产生写入信号以在信息存储介质上写入信息;以及写入部分,用于基于由写入产生的写入信号用脉冲光束照射信息存储介质 赔偿部分。 信息存储介质包括具有随所接收的总光量而连续变化的光学常数的记录层。 写入部分以比记录层上的脉冲光束的直径更短的间隔在记录层上辐射和凝结多个脉冲光束。 写入补偿部分产生写入信号,使得通过写入操作结束在记录层上的脉冲光束的每个照射点处的光学常数的每个变化的总和形成预定的变化图案。
    • 10. 发明授权
    • Digital modulator and demodulator circuit
    • 数字调制器和解调器电路
    • US5422641A
    • 1995-06-06
    • US986966
    • 1992-12-08
    • Yoshiharu Kobayashi
    • Yoshiharu Kobayashi
    • H03M5/14H03M7/40
    • H03M5/145
    • In a digital modulator circuit for modulating a fixed-length code into a variable-length code and a digital demodulator for demodulating a variable-length code into a fixed-length code in a parallel data form, pre-modulation and pre-demodulation data is input to a logic circuit in synchronization with a pulse input, while a remainder of the fixed-length or variable-length code digital parallel input data taking place in modulating or demodulating process is fed back as an input to the logic circuit via a flip-flop to modulate or demodulate the data together with pre-modulation or pre-demodulation parallel data input at the next input pulse in a parallel data form. A post-modulation or post-demodulation data as well as a modulation or demodulation bit number output from the logic circuit are input to the buffer circuit to output post-modulation or post-demodulation data of which bits have been all modulated or demodulated.
    • 在用于将固定长度码调制成可变长度码的数字调制器电路和用于以可并行数据形式将可变长度码解调为固定长度码的数字解调器,预调制和预解调数据是 与脉冲输入同步地输入到逻辑电路,而在调制或解调处理中发生的固定长度或可变长度码数字并行输入数据的其余部分作为输入反馈到逻辑电路, 以并行数据形式在下一个输入脉冲处调制或解调数据以及预调制或预解调并行数据输入。 将后调制或后解调数据以及从逻辑电路输出的调制或解调比特数输入到缓冲电路,以输出已经对其位进行了全部调制或解调的后调制或后解调数据。