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1. 发明申请

US20060268530A1 Wiring board, semiconductor device and display module 失效
标题翻译：接线板，半导体器件和显示模块
公开(公告)号：US20060268530A1
公开(公告)日：2006-11-30
申请号：US11441678
申请日：2006-05-26
申请人： Kouichi Nagao , Yoshifumi Nakamura , Hiroyuki Imamura , Michinari Tetani
发明人： Kouichi Nagao , Yoshifumi Nakamura , Hiroyuki Imamura , Michinari Tetani
IPC分类号： H05K1/03 , H05K1/09
CPC分类号： H05K1/028 , H01L2224/73204 , H05K1/111 , H05K1/189 , H05K3/025 , H05K3/243 , H05K3/28 , H05K3/382 , H05K3/4007 , H05K2201/0367 , H05K2201/10674 , Y02P70/611
摘要： A wiring board includes: a flexible insulating base 1; a plurality of conductive wirings 2 arranged on the flexible insulating base 1; protruding electrodes 3 provided respectively at an end portion of the same side of each of the conductive wirings; external terminals 4, 5 formed respectively at the other end portions of each of the conductive wirings; metal plating layers applied on the conductive wirings, the protruding electrodes and the external terminals; and solder resist layers 7 formed respectively by coating the conductive wirings in regions between the end portions at which the protruding electrodes are provided and the external terminals. In the regions where the solder resist layers are formed, no metal plating layers are formed on the conductive wirings, and the surfaces of the conductive wirings to be contacted with the flexible insulating base are rougher than the surfaces not to be contacted with the flexible insulating base. Even when a film base is thin, bending stress applied to the conductive wirings is relieved sufficiently, and thus breaks in the wirings are suppressed.
摘要翻译：布线板包括：柔性绝缘基座1; 布置在柔性绝缘基座1上的多个导电布线2; 突出电极3分别设置在每个导电布线的同一侧的端部处; 外部端子4,5分别形成在每个导电布线的另一端部; 施加在导电布线，突出电极和外部端子上的金属镀层; 以及分别通过在设置有突出电极的端部与外部端子之间的区域中涂覆导电布线而形成的阻焊层7。在形成阻焊层的区域中，在导电布线上不形成金属镀层，与挠性绝缘基体接触的导电配线的表面比不与柔性绝缘体接触的表面更粗糙基础。即使当薄膜基底较薄时，施加到导电布线的弯曲应力被充分地减轻，因此抑制布线中断。

2. 发明授权

US07250575B2 Wiring board, semiconductor device and display module 失效
标题翻译：接线板，半导体器件和显示模块
公开(公告)号：US07250575B2
公开(公告)日：2007-07-31
申请号：US11441678
申请日：2006-05-26
申请人： Kouichi Nagao , Yoshifumi Nakamura , Hiroyuki Imamura , Michinari Tetani
发明人： Kouichi Nagao , Yoshifumi Nakamura , Hiroyuki Imamura , Michinari Tetani
IPC分类号： H05K3/46
CPC分类号： H05K1/028 , H01L2224/73204 , H05K1/111 , H05K1/189 , H05K3/025 , H05K3/243 , H05K3/28 , H05K3/382 , H05K3/4007 , H05K2201/0367 , H05K2201/10674 , Y02P70/611
摘要： A wiring board includes: a flexible insulating base 1; a plurality of conductive wirings 2 arranged on the flexible insulating base 1; protruding electrodes 3 provided respectively at an end portion of the same side of each of the conductive wirings; external terminals 4, 5 formed respectively at the other end portions of each of the conductive wirings; metal plating layers applied on the conductive wirings, the protruding electrodes and the external terminals; and solder resist layers 7 formed respectively by coating the conductive wirings in regions between the end portions at which the protruding electrodes are provided and the external terminals. In the regions where the solder resist layers are formed, no metal plating layers are formed on the conductive wirings, and the surfaces of the conductive wirings to be contacted with the flexible insulating base are rougher than the surfaces not to be contacted with the flexible insulating base. Even when a film base is thin, bending stress applied to the conductive wirings is relieved sufficiently, and thus breaks in the wirings are suppressed.
摘要翻译：布线板包括：柔性绝缘基座1; 布置在柔性绝缘基座1上的多个导电布线2; 突出电极3分别设置在每个导电布线的同一侧的端部处; 外部端子4,5分别形成在每个导电布线的另一端部; 施加在导电布线，突出电极和外部端子上的金属镀层; 以及分别通过在设置有突出电极的端部与外部端子之间的区域中涂覆导电布线而形成的阻焊层7。在形成阻焊层的区域中，在导电布线上不形成金属镀层，与挠性绝缘基体接触的导电配线的表面比不与柔性绝缘体接触的表面更粗糙基础。即使当薄膜基底较薄时，施加到导电布线的弯曲应力被充分地减轻，因此抑制布线中断。

3. 发明申请

US20060267219A1 Wiring board and semiconductor device 审中-公开
标题翻译：接线板和半导体器件
公开(公告)号：US20060267219A1
公开(公告)日：2006-11-30
申请号：US11442185
申请日：2006-05-26
申请人： Yoshifumi Nakamura , Kouichi Nagao , Hiroyuki Imamura
发明人： Yoshifumi Nakamura , Kouichi Nagao , Hiroyuki Imamura
IPC分类号： H01L23/52
CPC分类号： H01L23/49838 , H01L23/49816 , H01L23/4985 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2924/00014 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A flexible insulating base, a plurality of conductor wirings provided on the base, and a plurality of bump electrodes that are formed on the plurality of conductor wirings, respectively, are provided. A semiconductor chip having electrode pads is to be mounted by placing the semiconductor chip on the bump electrodes and bonding the electrode pads and the bump electrodes, respectively. The bump electrodes are placed on the conductor wirings, respectively, in edge portions of at least two sides of a chip mounting region in which the semiconductor chip is to be mounted. The conductor wiring corresponding to at least one of the bump electrodes placed in the edge portions of the two sides passes through the chip mounting region so as to be routed via a side different from the side on which the at least one of the bump electrodes is placed, and then led to an outside of the chip mounting region. It is possible to route wirings more freely for leading conductor wirings from bump electrodes placed in an edge portion of a semiconductor chip mounting region to an outside of the chip mounting region.
摘要翻译：提供柔性绝缘基座，设置在基座上的多个导体布线和分别形成在多个导体布线上的多个凸块电极。通过将半导体芯片放置在凸块电极上并分别结合电极焊盘和凸块电极来安装具有电极焊盘的半导体芯片。凸起电极分别放置在芯片安装区域的至少两侧的边缘部分中，半导体芯片将要安装在其中。对应于放置在两侧边缘部分中的凸起电极中的至少一个凸起电极的导体布线通过芯片安装区域，以便经由与其中至少一个凸起电极的侧面不同的一侧放置，然后引导到芯片安装区域的外部。可以更加自由地将布线布线从位于半导体芯片安装区域的边缘部分中的凸起电极引导到芯片安装区域的外部。

4. 发明授权

US08283775B2 Wiring board, semiconductor device and method for manufacturing the same 有权
标题翻译：接线板，半导体器件及其制造方法
公开(公告)号：US08283775B2
公开(公告)日：2012-10-09
申请号：US13049307
申请日：2011-03-16
申请人： Nozomi Shimoishizaka , Yoshifumi Nakamura , Kouichi Nagao
发明人： Nozomi Shimoishizaka , Yoshifumi Nakamura , Kouichi Nagao
IPC分类号： H01L23/34 , H01L23/10
CPC分类号： H01L23/4334 , H01L21/563 , H01L23/3107 , H01L23/3121 , H01L23/36 , H01L23/3677 , H01L24/16 , H01L24/17 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/90 , H01L2224/02166 , H01L2224/0401 , H01L2224/16225 , H01L2224/16227 , H01L2224/16245 , H01L2224/1703 , H01L2224/17051 , H01L2224/171 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48257 , H01L2224/48465 , H01L2224/73203 , H01L2224/73204 , H01L2224/73207 , H01L2224/73215 , H01L2224/73265 , H01L2224/81136 , H01L2224/81193 , H01L2224/81205 , H01L2224/81801 , H01L2224/83192 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12041 , H01L2924/181 , H01L2924/1815 , H01L2924/18301 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor device including a semiconductor element 1 having an active element region 1a, a plurality of element electrodes 2 formed on a principal face of the semiconductor element, external terminals 6 and 7 connected to one or more element electrodes via connection members 8 and 9, one or more first heat-dissipation protrusions 4 formed on the principal face of the semiconductor element, an insulation resin layer 10 covering the principal face of the semiconductor element and the first heat-dissipation protrusions, and a heat-dissipation medium 11 contacting a face of the insulation resin layer on a side opposite to a side contacting front faces of the first heat-dissipation protrusions. At least a part of the active element region is included in a region below a bottom face of the first heat-dissipation protrusion, the first heat-dissipation protrusion is not connected to the external terminal within the active element region, a thermal conductivity of the first heat-dissipation protrusion is larger than a thermal conductivity of the insulation resin layer, and a thickness of the insulation resin layer from the front face of the first heat-dissipation protrusion to the heat-dissipation medium is thinner than a thickness of the insulation resin layer from the principal face of the semiconductor element to the heat-dissipation medium. Thereby, it is possible to improve the speed of dissipating heat from the active element region of the mounted semiconductor element to the heat-dissipation medium.
摘要翻译：一种半导体器件，包括具有有源元件区域1a的半导体元件1，形成在半导体元件的主面上的多个元件电极2，经由连接构件8和9连接到一个或多个元件电极的外部端子6和7，形成在半导体元件的主面上的一个或多个第一散热突起4，覆盖半导体元件的主面的绝缘树脂层10和第一散热突起，以及与面对面接触的散热介质11 绝缘树脂层的与接触第一散热突起的前表面的一侧相反的一侧。有源元件区域的至少一部分被包括在第一散热突起的底面下方的区域中，第一散热突起不与有源元件区域内的外部端子连接，导热系数第一散热突起大于绝缘树脂层的导热率，绝缘树脂层从第一散热突起到散热介质的前表面的厚度比绝缘层的厚度薄树脂层从半导体元件的主面到散热介质。因此，可以提高从安装的半导体元件的有源元件区域到散热介质的散热速度。

5. 发明授权

US07514802B2 Wiring board 有权
标题翻译：接线板
公开(公告)号：US07514802B2
公开(公告)日：2009-04-07
申请号：US11531381
申请日：2006-09-13
申请人： Michinari Tetani , Takayuki Tanaka , Hiroyuki Imamura , Nozomi Shimoishizaka , Kouichi Nagao
发明人： Michinari Tetani , Takayuki Tanaka , Hiroyuki Imamura , Nozomi Shimoishizaka , Kouichi Nagao
IPC分类号： H01L23/544
CPC分类号： H01L23/544 , H01L23/4985 , H01L24/81 , H01L2223/5442 , H01L2223/54473 , H01L2224/81121 , H01L2224/81192 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H05K1/0269 , H05K1/0393 , H05K3/0097 , H05K3/303 , H05K2201/0367 , H05K2201/09781 , H05K2201/09918 , H05K2201/10674 , H05K2203/1545 , H05K2203/166
摘要： A flexible insulating base, a plurality of conductor wirings aligned on the flexible insulating base, and bump electrodes provided respectively in end portions of the plurality of conductor wirings in a region where a semiconductor chip is to be placed are provided. The semiconductor chip is mounted on the conductor wirings by bonding electrode pads formed on the semiconductor chip to the bump electrodes. An auxiliary conductor wiring formed similarly to the conductor wirings is provided on the insulating base, and an auxiliary bump electrode formed similarly to the bump electrodes is provided on the auxiliary conductor wiring, so that the electrode pads formed on the semiconductor chip can be registered with respect to the bump electrodes on the conductor wirings by positioning the semiconductor chip with reference to the auxiliary bump electrode. It is possible to configure a wiring board having register marks capable of positioning electrode pads of a semiconductor chip with respect to bump electrodes with high accuracy.
摘要翻译：提供柔性绝缘基座，在柔性绝缘基座上对准的多个导体布线和分别设置在要放置半导体芯片的区域中的多个导体布线的端部中的凸起电极。通过将形成在半导体芯片上的电极焊盘接合到凸块电极，将半导体芯片安装在导体布线上。在导体布线上形成类似于导体布线的辅助导体布线设置在绝缘基底上，并且在辅助导体布线上设置类似于隆起电极形成的辅助凸起电极，使得形成在半导体芯片上的电极焊盘可以被注册通过相对于辅助凸起电极定位半导体芯片，相对于导体布线上的凸块电极。可以配置具有能够高精度地相对于凸块电极定位半导体芯片的电极焊盘的对准标记的布线板。

6. 发明授权

US07442074B2 Wiring board and method for producing the same 有权
标题翻译：接线板及其制造方法
公开(公告)号：US07442074B2
公开(公告)日：2008-10-28
申请号：US11558706
申请日：2006-11-10
申请人： Nozomi Shimoishizaka , Nobuyuki Koutani , Kouichi Nagao , Michiharu Torii , Yoshifumi Nakamura , Takayuki Tanaka
发明人： Nozomi Shimoishizaka , Nobuyuki Koutani , Kouichi Nagao , Michiharu Torii , Yoshifumi Nakamura , Takayuki Tanaka
IPC分类号： H01R12/24
CPC分类号： H05K3/242 , H01L2924/0002 , H05K3/0097 , H05K2201/094 , H05K2203/1545 , H01L2924/00
摘要： A wiring board includes first and second feeding electrodes (2, 3) provided along both sides of an insulating substrate (1), feeding bus lines (4) extending in a traverse direction and connected to both the feeding electrodes, and conductor wirings (6, 8, 12) having one side terminals forming inner leads having protruding electrodes (9, 11, 13) and the other side terminals connected to the feeding bus lines. The inner leads in each unit region are arranged in two lines extending in the traverse direction. The inner leads of a first group are arranged with a dense wiring pitch, and the inner leads of a second group include a dense pitch region in which a wiring pitch is the same as that of the inner leads of the first group, and a sparse pitch region in which a wiring pitch is longer than that of the inner leads of the first group. The inner leads (6) of the first group and the inner leads (12) in the dense pitch region of the second group are connected to the feeding bus line on one side of each region, and the inner leads (8) in the sparse pitch region of the second group are connected to the feeding bus line on the other side of each unit region. Non-uniformity of heights of the protruding electrodes due to a difference in the wiring pitches of the inner leads can be suppressed easily.
摘要翻译：布线板包括沿着绝缘基板（1）的两侧设置的第一和第二馈送电极（2,3），馈送沿横向方向延伸并连接到馈电电极的总线（4）和导体布线（6），8,12），其一个端子形成具有突出电极（9,11,13）的内部引线，另一个侧端子连接到馈电总线。每个单元区域中的内引线布置成沿横向方向延伸的两条线。第一组的内部引线布置成具有致密的布线间距，并且第二组的内部引线包括密集的间距区域，其中布线间距与第一组的内部引线相同，并且稀疏其中布线间距比第一组的内引线长的间距区域。第一组的内部引线（6）和第二组的密集间隔区域中的内部引线（12）在每个区域的一侧连接到馈电总线，并且内部引线（8）在稀疏第二组的音调区域连接到每个单元区域的另一侧的馈送总线。可以容易地抑制由于内部引线的布线间距的差异导致的突出电极的高度的不均匀性。

7. 发明授权

US07582968B2 Wiring board with a protective film greater in heights than bumps 有权
标题翻译：保护膜的接线板高于颠簸
公开(公告)号：US07582968B2
公开(公告)日：2009-09-01
申请号：US11558632
申请日：2006-11-10
申请人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
发明人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
IPC分类号： H01L23/48 , H05K7/00
CPC分类号： H01L23/4985 , H01L23/5387 , H01L2924/0002 , H05K1/0393 , H05K3/0097 , H05K3/242 , H05K3/243 , H05K3/28 , H05K3/4007 , H05K2201/0191 , H05K2201/0367 , H05K2201/09736 , H05K2203/0191 , H05K2203/1545 , H01L2924/00
摘要： A wiring board according to the present invention includes: an insulating base 22; a plurality of first conductor wirings 23a aligned in an inner region on the insulating base; bumps 24 formed on the respective first conductor wirings; and a protective film 25a that is formed on the insulating base so as to cover the first conductor wirings and has an opening region through which the bumps are exposed. The height of at least part of a surface of the protective film from a surface of the insulating base is greater than the height of the bumps from the surface of the insulating base. With this configuration, it is possible to decrease the thickness in the state where a protective tape is placed on the wiring board to protect bumps, thereby increasing the length of the wiring board that can be held by a reel for supplying the wiring board.
摘要翻译：根据本发明的布线板包括：绝缘基底22; 在绝缘基底上的内部区域中排列的多个第一导体布线23a; 形成在各自的第一导体布线上的凸块24; 以及保护膜25a，其形成在绝缘基底上以覆盖第一导体布线并具有露出凸起的开口区域。绝缘基底的表面的保护膜的表面的至少一部分的高度大于凸起从绝缘基底表面的高度。利用这种结构，可以在布线板上放置保护带的状态下减小厚度以保护凸起，从而增加可由用于供应布线板的卷轴保持的布线板的长度。

8. 发明申请

US20070120235A1 WIRING BOARD AND METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE 有权
标题翻译：接线板及其制造方法和半导体器件
公开(公告)号：US20070120235A1
公开(公告)日：2007-05-31
申请号：US11558632
申请日：2006-11-10
申请人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
发明人： Nozomi Shimoishizaka , Kouichi Nagao , Hiroyuki Imamura
IPC分类号： H01L23/495
CPC分类号： H01L23/4985 , H01L23/5387 , H01L2924/0002 , H05K1/0393 , H05K3/0097 , H05K3/242 , H05K3/243 , H05K3/28 , H05K3/4007 , H05K2201/0191 , H05K2201/0367 , H05K2201/09736 , H05K2203/0191 , H05K2203/1545 , H01L2924/00
摘要： A wiring board according to the present invention includes: an insulating base 22; a plurality of first conductor wirings 23a aligned in an inner region on the insulating base; bumps 24 formed on the respective first conductor wirings; and a protective film 25a that is formed on the insulating base so as to cover the first conductor wirings and has an opening region through which the bumps are exposed. The height of at least part of a surface of the protective film from a surface of the insulating base is greater than the height of the bumps from the surface of the insulating base. With this configuration, it is possible to decrease the thickness in the state where a protective tape is placed on the wiring board to protect bumps, thereby increasing the length of the wiring board that can be held by a reel for supplying the wiring board.
摘要翻译：根据本发明的布线板包括：绝缘基底22; 在绝缘基底上的内部区域中排列的多个第一导体布线23a; 形成在各自的第一导体布线上的凸块24; 以及保护膜25a，其形成在绝缘基底上以覆盖第一导体布线，并且具有露出凸起的开口区域。绝缘基底的表面的保护膜的表面的至少一部分的高度大于凸起从绝缘基底表面的高度。利用这种结构，可以在布线板上放置保护带的状态下减小厚度以保护凸起，从而增加可由用于供应布线板的卷轴保持的布线板的长度。

9. 发明授权

US5171826A Heat resistant adhesive composition and bonding method using the same 失效
标题翻译：耐热粘合剂组合物和使用其的粘合方法
公开(公告)号：US5171826A
公开(公告)日：1992-12-15
申请号：US792027
申请日：1991-11-13
申请人： Junichi Imaizumi , Hiroshi Nomura , Kouichi Nagao , Masakatsu Suzuki , Koushi Sakairi , Eikichi Satou
发明人： Junichi Imaizumi , Hiroshi Nomura , Kouichi Nagao , Masakatsu Suzuki , Koushi Sakairi , Eikichi Satou
IPC分类号： B32B7/12 , C08G73/12 , C08L79/08 , H01B3/30 , H05K1/00 , H05K1/03 , H05K3/28 , H05K3/38 , H05K3/46
CPC分类号： H01B3/306 , B32B7/12 , C08G73/12 , C08L79/085 , H05K3/28 , H05K3/281 , H05K3/386 , H05K1/036 , H05K1/0393 , H05K2201/0154 , H05K2201/0355 , H05K2201/0358 , H05K2203/0759 , H05K2203/095 , H05K3/4611 , H05K3/4635
摘要： A heat resistant adhesive composition comprising a specific polyamic acid solution and a bis-maleimide compound exhibits flexibility and excellent heat resistance after bonding two material bodies, and therefore, it can be suitably used for producing of flexible metal-clad laminates, double-sided flexible metal-clad laminates, and multilayer printed circuit boards, and for attaching coverlay films to printed circuit boards.
摘要翻译：包含特定聚酰胺酸溶液和双马来酰亚胺化合物的耐热粘合剂组合物在粘合两种材料体之后显示出柔韧性和优异的耐热性，因此可以适用于柔性金属包覆层压板的制造，双面柔性金属覆层压板和多层印刷电路板，以及用于将覆盖膜附着到印刷电路板上。

10. 发明授权

US5234522A Method of producing flexible printed-circuit board covered with coverlay 失效
标题翻译：生产覆盖有柔性印刷电路板的方法
公开(公告)号：US5234522A
公开(公告)日：1993-08-10
申请号：US800586
申请日：1991-11-27
申请人： Masakatsu Suzuki , Junichi Imaizumi , Hiroshi Nomura , Kouichi Nagao , Yasushi Katoh , Takato Oti , Eikichi Satou
发明人： Masakatsu Suzuki , Junichi Imaizumi , Hiroshi Nomura , Kouichi Nagao , Yasushi Katoh , Takato Oti , Eikichi Satou
IPC分类号： H05K3/20 , B32B15/08 , C08G73/10 , C08J7/04 , C09J179/08 , H01B3/30 , H05K1/00 , H05K3/28 , H05K3/38
CPC分类号： C08J7/047 , B32B15/08 , C08G73/1046 , C08G73/1071 , C09J179/08 , H01B3/306 , H05K3/281 , C08J2379/08 , C08J2479/00 , H05K1/0393 , H05K2201/0154 , H05K2203/066 , H05K2203/095 , H05K3/386 , Y10T29/49124 , Y10T428/2486 , Y10T428/31721
摘要： A flexible printed-circuit board covered with a coverlay is produced by bonding (a) a flexible printed-circuit board that comprises a flexible base having a surface bearing a circuit and (b) a polyimide film having a surface treated to increase adhering property and another surface not treated to increase adhering property, each of the surfaces being coated with an adhesive layer, with the adhesive layer on the surface treated to increase adhering property interposed between the polyimide film and the surface bearing the circuit, and then peeling off the adhesive layer coating the polyimide film on the surface not treated to increase adhering property.

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