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    • 1. 发明授权
    • Quantum interference transistor
    • 量子干涉晶体管
    • US5497015A
    • 1996-03-05
    • US435987
    • 1989-11-13
    • Akira IshibashiKenji FunatoYoshifumi Mori
    • Akira IshibashiKenji FunatoYoshifumi Mori
    • H01L29/66H01L29/775H01L29/80
    • B82Y10/00H01L29/66977H01L29/775
    • A semiconductor device using interference effects of electron waves passing through a multichannel, wherein the multichannel is formed by a Dirac-delta-doped layer. A method of manufacturing a semiconductor device comprising the steps of: selectively forming a region of a predetermined crystallographic orientation onto a semiconductor substrate; and alternately growing the first semiconductor layer and the second semiconductor layer whose electron affinity is smaller than that of the first semiconductor layer onto the region of the predetermined crystallographic orientation by a vapor-phase growth method so as to have a convex shape in a manner such that an area of an upper layer is smaller. A semiconductor device in which a channel portion comprising a zigzag fine line is provided between a source and a drain.
    • 使用通过多通道的电子波的干涉效应的半导体器件,其中多通道由狄拉克-δ掺杂层形成。 一种制造半导体器件的方法,包括以下步骤:在半导体衬底上选择性地形成预定晶体取向的区域; 并且通过气相生长方法将电子亲和力小于第一半导体层的第一半导体层和第二半导体层交替地生长到具有预定结晶取向的区域上,从而具有凸形形状 上层的面积较小。 在源极和漏极之间设置有包括锯齿形细线的沟道部分的半导体器件。
    • 2. 发明授权
    • Optical device using photonics
    • 使用光子学的光学器件
    • US06438298B1
    • 2002-08-20
    • US09616687
    • 2000-07-14
    • Eriko MatsuiAkira IshibashiYoshifumi Mori
    • Eriko MatsuiAkira IshibashiYoshifumi Mori
    • G02B626
    • G02B6/2852G02B6/125
    • An optical device includes a plurality of first optical waveguides (or optical fibers) arranged in the horizontal direction; a plurality of second optical waveguides (or optical fibers) arranged on the same plane as the plane on which the first optical waveguides (or optical fibers) are arranged, the second optical waveguides (or optical fibers) being perpendicular or nearly perpendicular to the first optical waveguides (or optical fibers); and elements to be excited by light rays waveguided in the first and second optical waveguides(or optical fibers), the elements being arranged at crossing portions at which the first and second optical waveguides (or optical fibers) cross each other. In this display, the elements to be excited are selected for each line by intensities of light rays in the first optical waveguides (or optical fibers) functioning as horizontal waveguides (or optical fibers), and light rays in the second waveguides (or optical fibers) functioning as vertical waveguides (or optical fibers) are modulated in intensity on the basis of data signals, and the data signal light rays whose intensities have been modulated are extracted to the outside via the selected elements to be excited.
    • 光学装置包括沿水平方向布置的多个第一光波导(或光纤); 布置在与其上布置有第一光波导(或光纤)的平面相同的平面上的多个第二光波导(或光纤),第二光波导(或光纤)垂直于或几乎垂直于第一光波导 光波导(或光纤); 以及要在第一和第二光波导(或光纤)中波导的光线激发的元件,元件布置在第一和第二光波导(或光纤)彼此交叉的交叉部分。 在该显示中,通过用作水平波导(或光纤)的第一光波导(或光纤)中的光线的强度,针对每一行选择要激发的元件,并且第二波导(或光纤)中的光线 )作为垂直波导(或光纤)的功能在数据信号的基础上进行强度调制,并且已经调制了强度的数据信号光线经由被激励的选定元件提取到外部。
    • 7. 发明授权
    • Method for forming a fine pattern by using a patterned resist layer
    • 通过使用图案化抗蚀剂层形成精细图案的方法
    • US5171718A
    • 1992-12-15
    • US639325
    • 1991-01-09
    • Akira IshibashiYoshifumi MoriKenji Funato
    • Akira IshibashiYoshifumi MoriKenji Funato
    • G03F7/004G03F7/20
    • G03F7/004G03F7/2041Y10S148/10Y10S148/131Y10S148/137Y10S438/949
    • A fine pattern formation using an electron beam induced resist, and use of the resist in making semiconductor devices are disclosed. Collimated electron beam is irradiated and scanned along a desired pattern on a layer on which a resist layer of a desired pattern is deposited under an atmosphere containing a starting material layer for the resist. The resist thus deposited is partially removed by reactive ion etching to remove the skirt like portion of the resist layer, or totally removed by reactive ion etching during or after processing by using the resist layer as a processing mask. Since the resist layer width is determined by a diameter of the collimated electron beam, line width of less than hundred .ANG. can be directly drawn. There are also disclosed processes using the resist layer in manufacturing semiconductor devices.
    • 公开了使用电子束感应抗蚀剂的精细图案形成,以及在制造半导体器件中使用抗蚀剂。 沿着期望的图案沿着期望的图案照射准直的电子束,在其上沉积有所需图案的抗蚀剂层的层上,在含有抗蚀剂的起始材料层的气氛下。 通过反应离子蚀刻部分去除由此沉积的抗蚀剂以去除抗蚀剂层的裙状部分,或者通过使用抗蚀剂层作为处理掩模在处理期间或之后通过反应离子蚀刻完全除去。 由于抗蚀剂层宽度由准直电子束的直径确定,所以可以直接绘制小于100的棱线宽度。 还公开了在制造半导体器件中使用抗蚀剂层的工艺。
    • 8. 发明授权
    • A method of manufacturing a quantum interference semiconductor device
    • 一种制造量子干涉半导体器件的方法
    • US5156988A
    • 1992-10-20
    • US757605
    • 1991-09-11
    • Yoshifumi MoriAkira Ishibashi
    • Yoshifumi MoriAkira Ishibashi
    • H01J9/02H01J21/10
    • H01J21/105H01J9/025Y10S438/962
    • A method of making a quantum interference semiconductor device comprising the steps of forming a first semiconductor layer on a semi-insulating semiconductor substrate, forming a semi-insulating second semiconductor layer on the first semiconductor layer, forming a metal film so as to form a gate electrode on the second semiconductor layer, forming a first opening by selectively removing the metal film to form the gate electrode, forming a mask on the first opening and etching until midway in the film thickness direction of the semi-insulative second semiconductor layer by anitropic etching through said first opening and subsequently forming an etching until an upper surface of the semiconductor substrate by isotropic etching occurs so as to form a second opening into the semi-insulative second semiconductor layer and the first semiconductor layer which is continuous with the first opening portion and forming a cathode from the first semiconductor layer and a blocker made of the second semiconductor layer.
    • 一种制造量子干涉半导体器件的方法,包括以下步骤:在半绝缘半导体衬底上形成第一半导体层,在第一半导体层上形成半绝缘的第二半导体层,形成金属膜以形成栅极 在第二半导体层上形成第一开口,通过选择性地去除金属膜以形成栅电极,在第一开口上形成掩模,并通过无孔蚀刻蚀刻直到半绝缘性第二半导体层的膜厚度方向的中间 通过所述第一开口并随后形成蚀刻,直到半导体衬底的上表面通过各向同性蚀刻发生,以形成到半绝缘性第二半导体层和与第一开口部分连续的第一半导体层的第二开口,以及 从第一半导体层形成阴极和由第二半导体层制成的阻挡层 半导体层。