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    • 9. 发明授权
    • Nonvolatile semiconductor memory device
    • 非易失性半导体存储器件
    • US07876619B2
    • 2011-01-25
    • US12368667
    • 2009-02-10
    • Shinji TakedaYoshiharu Hirata
    • Shinji TakedaYoshiharu Hirata
    • G11C11/34G11C16/04
    • G11C16/0483G11C16/10
    • A semiconductor memory device comprises: a write circuit including a latch circuit configured by two inverters having a positive side power supply terminal supplied with a first voltage and a negative side power supply terminal supplied with a second voltage; and a write state machine controlling the first and second voltages. When writing data to a memory cell, the first voltage is changed to a second value that is lower than a first value. When writing data to a memory cell, the second voltage is changed to a third value that is lower than the second value. The write state machine lowers the second voltage to an intermediate value between the second value and the third value and, while maintaining this intermediate value, lowers the first voltage from the first value to the second value.
    • 一种半导体存储器件,包括:写入电路,包括由具有提供有第一电压的正侧电源端子和被提供有第二电压的负侧电源端子的两个反相器构成的锁存电路; 以及控制第一和第二电压的写状态机。 当将数据写入存储单元时,将第一电压改变为低于第一值的第二值。 当将数据写入存储单元时,第二电压被改变为低于第二值的第三值。 写状态机将第二电压降低到第二值和第三值之间的中间值,并且在保持该中间值的同时,将第一电压从第一值降低到第二值。