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1. 发明申请

US20070007533A1 PIXEL ARRAY STRCUTURE 审中-公开
标题翻译：像素阵列
公开(公告)号：US20070007533A1
公开(公告)日：2007-01-11
申请号：US11160775
申请日：2005-07-08
申请人： Yi-Tyng Wu , Tsuan-Lun Lung , Chih-Hung Cheng , Kuan-Te Pai
发明人： Yi-Tyng Wu , Tsuan-Lun Lung , Chih-Hung Cheng , Kuan-Te Pai
IPC分类号： H01L29/08
CPC分类号： H01L27/3246 , H01L27/3244 , H01L51/5221 , H01L2251/5315 , H01L2251/558
摘要： A pixel array structure is provided. The pixel array structure comprises a plurality of pixel units and a plurality of dielectric walls. Each dielectric wall is disposed between two neighboring pixel units, wherein each pixel unit comprises at least one organic light emitting diode and a complementary metal-oxide-semiconductor (CMOS). The organic light emitting diode comprises a transparent electrode, a bottom electrode, and a light emitting material between the transparent electrode and the bottom electrode. The CMOS is disposed in a substrate. The substrate comprises a top-metal-layer structure located thereon and the top-metal-layer structure comprises an upmost top metal layer. Further, the bottom electrode of the CMOS is the upmost top metal layer of the top-metal-layer structure and the upmost top metal layer is a titanium metal layer.
摘要翻译：提供像素阵列结构。像素阵列结构包括多个像素单元和多个电介质壁。每个电介质壁设置在两个相邻像素单元之间，其中每个像素单元包括至少一个有机发光二极管和互补金属氧化物半导体（CMOS）。有机发光二极管包括在透明电极和底部电极之间的透明电极，底部电极和发光材料。 CMOS设置在基板中。衬底包括位于其上的顶部金属层结构，并且顶部金属层结构包括最上面的顶部金属层。此外，CMOS的底部电极是顶部金属层结构的最上层金属层，最上层金属层是钛金属层。

2. 发明授权

US06281063B1 Method for manufacturing trench isolation 失效
标题翻译：沟槽隔离方法
公开(公告)号：US06281063B1
公开(公告)日：2001-08-28
申请号：US09690519
申请日：2000-10-17
申请人： Yi-Min Jen , Kuan-Te Pai
发明人： Yi-Min Jen , Kuan-Te Pai
IPC分类号： H01L218238
CPC分类号： H01L21/76202 , H01L21/76235
摘要： A method for manufacturing a trench isolation in a semiconductor device is disclosed, wherein a silicon nitride layer used as an anti-diffusion layer mask that defines an isolation region on a silicon substrate and a thermal oxidation process that is performed on active regions are previously used. A silicon substrate having a first pad oxide layer and a first silicon nitride layer formed thereon is first provided. Then the first pad oxide layer and the first silicon nitride layer are patterned to form an anti-diffusion layer mask and to expose an active region of the silicon substrate. Next the silicon substrate is oxidized to form a first silicon dioxide layer, wherein lateral oxidation on the active region of the silicon substrate underneath the first pad oxide layer and the first silicon nitride layer provides an edge of the first silicon dioxide layer in the shape of a bird's beak. Moreover, the first silicon nitride layer, the first pad oxide layer and the first silicon dioxide layer are removed to expose the silicon substrate. Furthermore, a second pad oxide layer is formed on the substrate and a second silicon nitride layer is deposited thereon. Finally, an isolation trench of the invention can be formed by using a conventional method.
摘要翻译：公开了一种在半导体器件中制造沟槽隔离的方法，其中预先使用用作限定硅衬底上的隔离区域的抗扩散层掩模的氮化硅层和在有源区上执行的热氧化工艺。首先提供具有形成在其上的第一衬垫氧化物层和第一氮化硅层的硅衬底。然后对第一衬垫氧化物层和第一氮化硅层进行构图以形成抗扩散层掩模并暴露硅衬底的有源区。接下来，硅衬底被氧化以形成第一二氧化硅层，其中在第一衬垫氧化物层和第一氮化硅层下面的硅衬底的有源区上的侧向氧化提供第一二氧化硅层的边缘，一只鸟的喙。此外，去除第一氮化硅层，第一衬垫氧化物层和第一二氧化硅层以暴露硅衬底。此外，在衬底上形成第二衬垫氧化物层，并在其上沉积第二氮化硅层。最后，可以通过使用常规方法形成本发明的隔离沟槽。

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