会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Integrated circuit device, electronic device and method therefor
    • 集成电路器件,电子器件及其方法
    • US08669816B2
    • 2014-03-11
    • US13273231
    • 2011-10-14
    • Yen-Horng ChenAugusto MarquesCaiyi Wang
    • Yen-Horng ChenAugusto MarquesCaiyi Wang
    • H03L7/00
    • H03L7/099H03L1/00H03L1/02H03L2207/06H03L2207/50
    • An integrated circuit device includes at least one controllable oscillator including a first control port and at least one further control port, at least one frequency control module including an output arranged to provide a frequency control signal. The at least one controllable oscillator further includes at least one compensation module including an output arranged to provide at least one compensation signal. The at least one compensation module includes an integrator component arranged to receive at an input thereof a signal that is representative of a difference between the indication of the frequency control signal and a reference signal, and to output an integrated difference signal. The at least one compensation module is arranged to generate the at least one compensation signal based at least partly on the integrated difference signal output by the integrator component.
    • 集成电路装置包括至少一个包括第一控制端口和至少一个另外的控制端口的可控振荡器,至少一个频率控制模块,其包括布置成提供频率控制信号的输出。 所述至少一个可控振荡器还包括至少一个补偿模块,该补偿模块包括布置成提供至少一个补偿信号的输出。 所述至少一个补偿模块包括积分器部件,其被布置为在其输入处接收表示所述频率控制信号的指示与参考信号之间的差异的信号,并输出积分差分信号。 至少一个补偿模块被布置成至少部分地基于由积分器组件输出的积分差分信号来产生至少一个补偿信号。
    • 2. 发明申请
    • INTEGRATED CIRCUIT DEVICE, ELECTRONIC DEVICE AND METHOD THEREFOR
    • 集成电路设备,电子设备及其方法
    • US20120074993A1
    • 2012-03-29
    • US13273231
    • 2011-10-14
    • Yen-Horng ChenAugusto MarquesCaiyi Wang
    • Yen-Horng ChenAugusto MarquesCaiyi Wang
    • H03L7/08
    • H03L7/099H03L1/00H03L1/02H03L2207/06H03L2207/50
    • An integrated circuit device includes at least one controllable oscillator including a first control port and at least one further control port, at least one frequency control module including an output arranged to provide a frequency control signal. The at least one controllable oscillator further includes at least one compensation module including an output arranged to provide at least one compensation signal. The at least one compensation module includes an integrator component arranged to receive at an input thereof a signal that is representative of a difference between the indication of the frequency control signal and a reference signal, and to output an integrated difference signal. The at least one compensation module is arranged to generate the at least one compensation signal based at least partly on the integrated difference signal output by the integrator component.
    • 集成电路装置包括至少一个包括第一控制端口和至少一个另外的控制端口的可控振荡器,至少一个频率控制模块,其包括布置成提供频率控制信号的输出。 所述至少一个可控振荡器还包括至少一个补偿模块,该补偿模块包括布置成提供至少一个补偿信号的输出。 所述至少一个补偿模块包括积分器部件,其被布置为在其输入处接收表示所述频率控制信号的指示与参考信号之间的差异的信号,并输出积分差分信号。 至少一个补偿模块被布置成至少部分地基于由积分器组件输出的积分差分信号来产生至少一个补偿信号。
    • 4. 发明授权
    • Tunable inductor
    • 可调电感
    • US08963674B2
    • 2015-02-24
    • US13182448
    • 2011-07-14
    • Wen-Chang LeeYen-Horng ChenAugusto Marques
    • Wen-Chang LeeYen-Horng ChenAugusto Marques
    • H01F21/12H03H7/01H01F27/36
    • H01F21/12H01F27/36H01F2021/125H03H7/0153
    • A tunable inductor includes a main wiring and at least one tuning module. The main wiring is arranged to encircle an inductor area of the tunable inductor. In addition, the tuning module is arranged to couple associated nodes of the main wiring. For example, each tuning module of the at least one tuning module includes a first switch positioned within the inductor area, and further includes at least one auxiliary wiring. When the first switch is turned on, the tuning module couples two nodes of the main wiring, where the at least one auxiliary wiring is arranged to couple the two nodes when the first switch is turned on. In particular, a patterned ground plane is arranged to decrease the energy loss of the tunable inductor, and more particularly, to prevent the tunable inductor from suffering energy loss. The patterned ground plane includes some conductive sections forming a W-like shape.
    • 可调电感器包括主布线和至少一个调谐模块。 主布线被布置成环绕可调电感器的电感器区域。 此外,调谐模块被布置成耦合主配线的相关节点。 例如,至少一个调谐模块的每个调谐模块包括位于电感器区域内的第一开关,并且还包括至少一个辅助布线。 当第一开关接通时,调谐模块耦合主配线的两个节点,其中至少一个辅助布线布置成当第一开关被接通时耦合两个节点。 特别地,布置图案化的接地平面以降低可调谐电感器的能量损失,更具体地,为了防止可调电感器遭受能量损失。 图案化的接地平面包括形成W形形状的一些导电部分。
    • 5. 发明授权
    • Digitally controlled oscillator
    • 数字控制振荡器
    • US08519801B2
    • 2013-08-27
    • US13210280
    • 2011-08-15
    • Yen-Horng ChenWen-Chang LeeAugusto MarquesXiaochuan Guo
    • Yen-Horng ChenWen-Chang LeeAugusto MarquesXiaochuan Guo
    • H03B5/12
    • H03B5/1228H03B5/1215H03B5/1265H03J2200/10
    • A digitally controlled oscillator is provided. The digitally controlled oscillator includes a pair of transistors cross-coupled to each other, a switched capacitor array coupled to the pair of transistors and a plurality of frequency tracking units coupled to the pair of transistors. The pair of transistors provides an output signal. The switched capacitor array tunes a frequency of the output signal. The frequency tracking units tune the frequency of the output signal to a target frequency. At least one of the frequency tracking units is capable of selectively providing a first capacitance and a second capacitance. A tuning resolution of the frequency tracking unit is determined by a difference between the first and second capacitances.
    • 提供数字控制振荡器。 数字控制振荡器包括彼此交叉耦合的一对晶体管,耦合到该对晶体管的开关电容器阵列和耦合到该对晶体管的多个频率跟踪单元。 该对晶体管提供输出信号。 开关电容阵列调节输出信号的频率。 频率跟踪单元将输出信号的频率调谐到目标频率。 频率跟踪单元中的至少一个能够选择性地提供第一电容和第二电容。 频率跟踪单元的调谐分辨率由第一和第二电容之间的差确定。
    • 6. 发明申请
    • TUNABLE INDUCTOR
    • 电感电感
    • US20120154073A1
    • 2012-06-21
    • US13182448
    • 2011-07-14
    • Wen-Chang LeeYen-Horng ChenAugusto Marques
    • Wen-Chang LeeYen-Horng ChenAugusto Marques
    • H03H7/01
    • H01F21/12H01F27/36H01F2021/125H03H7/0153
    • A tunable inductor includes a main wiring and at least one tuning module. The main wiring is arranged to encircle an inductor area of the tunable inductor. In addition, the tuning module is arranged to couple associated nodes of the main wiring. For example, each tuning module of the at least one tuning module includes a first switch positioned within the inductor area, and further includes at least one auxiliary wiring. When the first switch is turned on, the tuning module couples two nodes of the main wiring, where the at least one auxiliary wiring is arranged to couple the two nodes when the first switch is turned on. In particular, a patterned ground plane is arranged to decrease the energy loss of the tunable inductor, and more particularly, to prevent the tunable inductor from suffering energy loss. The patterned ground plane includes some conductive sections forming a W-like shape.
    • 可调电感器包括主布线和至少一个调谐模块。 主布线被布置成环绕可调电感器的电感器区域。 此外,调谐模块被布置成耦合主配线的相关节点。 例如,至少一个调谐模块的每个调谐模块包括位于电感器区域内的第一开关,并且还包括至少一个辅助布线。 当第一开关接通时,调谐模块耦合主配线的两个节点,其中至少一个辅助布线布置成当第一开关被接通时耦合两个节点。 特别地,布置图案化的接地平面以降低可调谐电感器的能量损失,更具体地,为了防止可调电感器遭受能量损失。 图案化的接地平面包括形成W形形状的一些导电部分。
    • 7. 发明授权
    • Time-to-digital converter
    • 时间到数字转换器
    • US08531322B2
    • 2013-09-10
    • US13450263
    • 2012-04-18
    • Changhua CaoXiaochuan GuoYen-Horng ChenCaiyi Wang
    • Changhua CaoXiaochuan GuoYen-Horng ChenCaiyi Wang
    • H03M1/48
    • G04F10/005
    • Embodiments of a time-to-digital converter are provided, comprising a delay stage matrix and a measurement circuit. The delay stage matrix comprises a first and a second delay lines coupled thereto, and is arranged to propagate a transition signal from a starting delay stage in the first and a second delay lines, wherein each of the first and second delay lines comprises a same number of delay stages coupled in series, each delay stage in one of the first and second delay lines is coupled to a corresponding delay stage in the other delay line and operative to generate a delayed signal. The measurement circuit is arranged to determine a time of the transition signal propagating along the delay stages by sampling the delayed signals using a measurement signal to generate and hold a digital representation of the time.
    • 提供了一种时间 - 数字转换器的实施例,包括延迟级矩阵和测量电路。 延迟级矩阵包括与其耦合的第一和第二延迟线,并且被布置成在第一和第二延迟线中从起始延迟级传播转换信号,其中第一和第二延迟线中的每一个包括相同的数字 的延迟级串联耦合,第一和第二延迟线之一中的每个延迟级耦合到另一个延迟线中的对应的延迟级并且可操作以产生延迟信号。 测量电路被设置为通过使用测量信号对延迟信号进行采样来确定沿延迟级传播的转换信号的时间,以生成并保持时间的数字表示。