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1. 发明授权

US06787451B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06787451B2
公开(公告)日：2004-09-07
申请号：US10216792
申请日：2002-08-13
申请人： Yasuhiro Shimamoto , Katsunori Obata , Kazuyoshi Torii , Masahiko Hiratani
发明人： Yasuhiro Shimamoto , Katsunori Obata , Kazuyoshi Torii , Masahiko Hiratani
IPC分类号： H01L2972
CPC分类号： H01L29/4983 , H01L21/0214 , H01L21/02164 , H01L21/02178 , H01L21/02266 , H01L21/02323 , H01L21/02329 , H01L21/02337 , H01L21/28061 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L21/3141 , H01L21/3143 , H01L21/31612 , H01L21/3162 , H01L21/31641 , H01L21/31645 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/66545
摘要： In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to {fraction (1/100)} or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.
摘要翻译：在具有SiO 2当量厚度为2nm以上的栅极绝缘膜的FET的制造方法中，能够将漏电流抑制到{部分（与现有的SiO 2膜相比为1/100以下）的SiO 2膜为0.5nm 以上的Si基板（多晶硅栅极）和高介电绝缘膜之间的边界处形成，并且使SiO 2膜的形成温度高于后续工序中的源极 - 漏极活化热处理温度，因此可以防止由静电电荷的产生产生的偏移阈值电压或由迁移率降低引起的漏极电流的降低，从而降低较小尺寸的场效应晶体管的电力消耗和增加电流。

2. 发明授权

US07119407B2 Semiconductor device and manufacturing method thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07119407B2
公开(公告)日：2006-10-10
申请号：US10900430
申请日：2004-07-28
申请人： Yasuhiro Shimamoto , Katsunori Obata , Kazuyoshi Torii , Masahiko Hiratani
发明人： Yasuhiro Shimamoto , Katsunori Obata , Kazuyoshi Torii , Masahiko Hiratani
IPC分类号： H01L29/72
CPC分类号： H01L29/4983 , H01L21/0214 , H01L21/02164 , H01L21/02178 , H01L21/02266 , H01L21/02323 , H01L21/02329 , H01L21/02337 , H01L21/28061 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L21/3141 , H01L21/3143 , H01L21/31612 , H01L21/3162 , H01L21/31641 , H01L21/31645 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/66545
摘要： In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to 1/100 or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.
摘要翻译：在具有SiO 2等效厚度为2nm以上的栅极绝缘膜的FET的制造方法中，与现有的SiO 2相比，能够将漏电流抑制到1/100以下，在Si衬底（多晶硅栅极）和高介电绝缘膜之间的边界处形成0.5nm或更大的SiO 2 SiO 2膜，并且形成 SiO 2膜比后续步骤中的源极 - 漏极活化热处理温度高。因此，可以防止由静电电荷的产生产生的偏移阈值电压或由迁移率降低导致的漏极电流的降低，从而降低较小尺寸的场效应晶体管的电力消耗和增加电流。

3. 发明申请

US20070001244A1 Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20070001244A1
公开(公告)日：2007-01-04
申请号：US11516629
申请日：2006-09-07
申请人： Yasuhiro Shimamoto , Katsunori Obata , Kazuyoshi Torii , Masahiko Hiratani
发明人： Yasuhiro Shimamoto , Katsunori Obata , Kazuyoshi Torii , Masahiko Hiratani
IPC分类号： H01L29/94
CPC分类号： H01L29/4983 , H01L21/0214 , H01L21/02164 , H01L21/02178 , H01L21/02266 , H01L21/02323 , H01L21/02329 , H01L21/02337 , H01L21/28061 , H01L21/28185 , H01L21/28194 , H01L21/28202 , H01L21/28211 , H01L21/3141 , H01L21/3143 , H01L21/31612 , H01L21/3162 , H01L21/31641 , H01L21/31645 , H01L28/56 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/665 , H01L29/66545
摘要： In a method for manufacturing an FET having a gate insulation film with an SiO2 equivalent thickness of 2 nm or more and capable of suppressing the leak current to 1/100 or less compared with existent SiO2 films, an SiO2 film of 0.5 nm or more is formed at a boundary between an Si substrate (polycrystalline silicon gate) and a high dielectric insulation film, and the temperature for forming the SiO2 film is made higher than the source-drain activating heat treatment temperature in the subsequent steps. As such, a shifting threshold voltage by the generation of static charges or lowering of a drain current caused by degradation of mobility can be prevented so as to reduce electric power consumption and increase current in a field effect transistor of a smaller size.
摘要翻译：在具有SiO 2等效厚度为2nm以上的栅极绝缘膜的FET的制造方法中，与现有的SiO 2相比，能够将漏电流抑制到1/100以下，在Si衬底（多晶硅栅极）和高介电绝缘膜之间的边界处形成0.5nm或更大的SiO 2 SiO 2膜，并且形成 SiO 2膜比后续步骤中的源极 - 漏极活化热处理温度高。因此，可以防止由静电电荷的产生产生的偏移阈值电压或由迁移率降低导致的漏极电流的降低，从而降低较小尺寸的场效应晶体管的电力消耗和增加电流。

4. 发明授权

US6144052A Semiconductor device and its manufacture 有权
标题翻译：半导体器件及其制造
公开(公告)号：US6144052A
公开(公告)日：2000-11-07
申请号：US142011
申请日：1998-08-31
申请人： Keiko Kushida , Masahiko Hiratani , Kazuyoshi Torii , Shinichiro Takatani , Hiroshi Miki , Yuuichi Matsui , Yoshihisa Fujisaki
发明人： Keiko Kushida , Masahiko Hiratani , Kazuyoshi Torii , Shinichiro Takatani , Hiroshi Miki , Yuuichi Matsui , Yoshihisa Fujisaki
IPC分类号： H01L21/02 , H01L21/8242 , H01L27/108 , H01L29/72
CPC分类号： H01L27/10852 , H01L28/55 , H01L28/60 , H01L27/10814 , H01L27/10888
摘要： An oriented polycrystal silicon film or an amorphous silicon film 52 is disposed on the whole area beneath a conductive diffusion barrier 61 under a lower electrode of a ferroelectric capacitor. As a result, the conductive diffusion barrier, the lower electrode and the capacitor ferroelectric film become oriented films; therefore, it is possible to reduce the signal variation in capacitors even in minute semiconductor devices, and obtain a highly reliable semiconductor device.
摘要翻译： PCT No.PCT / JP96 / 00579 Sec。 371日期1998年8月31日 102（e）1998年8月31日PCT 1996年3月8日PCT公布。公开号WO97 / 33316 PCT 日期1997年9月12日在铁电电容器的下电极下方的导电性扩散阻挡层61的下方的整个区域上设置取向多晶硅膜或非晶硅膜52。结果，导电扩散阻挡层，下电极和电容器铁电体膜成为取向膜; 因此，即使在微小的半导体器件中也可以减小电容器的信号变化，并获得高可靠性的半导体器件。

5. 发明授权

US06462368B2 Ferroelectric capacitor with a self-aligned diffusion barrier 失效
标题翻译：具有自对准扩散阻挡层的铁电电容器
公开(公告)号：US06462368B2
公开(公告)日：2002-10-08
申请号：US10059256
申请日：2002-01-31
申请人： Kazuyoshi Torii , Yasuhiro Shimamoto , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki
发明人： Kazuyoshi Torii , Yasuhiro Shimamoto , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki
IPC分类号： H01L2976
CPC分类号： H01L27/10855 , H01L21/76885 , H01L27/10894 , H01L28/91
摘要： A diffusion preventive layer extending between the bottom surface of a lower electrode and an interconnection connecting the lower electrode to one of the diffusion layer of a switching transistor is self-aligned. As a result, side trench is produced since a hole pattern is formed by using a dummy film, and even if a contact plug of a memory section is misaligned with the diffusion preventive layer, the contact plug is out of direct contact with a dielectric film having a high permittivity. Hence, a highly reliable device can be obtained.
摘要翻译：在下电极的底表面和将下电极连接到开关晶体管的扩散层之一的互连之间延伸的扩散防止层是自对准的。结果，由于通过使用虚拟膜形成孔图案，所以制造侧沟槽，并且即使存储部分的接触插塞与扩散防止层不对准，接触插塞也不与电介质膜直接接触具有很高的介电常数。因此，可以获得高度可靠的装置。

6. 发明授权

US06380574B1 Ferroelectric capacitor with a self-aligned diffusion barrier 失效
标题翻译：具有自对准扩散阻挡层的铁电电容器
公开(公告)号：US06380574B1
公开(公告)日：2002-04-30
申请号：US09674392
申请日：2000-10-31
申请人： Kazuyoshi Torii , Yasuhiro Shimamoto , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki
发明人： Kazuyoshi Torii , Yasuhiro Shimamoto , Hiroshi Miki , Keiko Kushida , Yoshihisa Fujisaki
IPC分类号： H01L2976
CPC分类号： H01L21/7687 , H01L27/10814 , H01L27/10817 , H01L27/10852 , H01L27/10855 , H01L27/10894 , H01L28/75
摘要： A diffusion preventive layer extending between the bottom surface of a lower electrode and an interconnection connecting the lower electrode to one of the diffusion layers of a switching transistor is self-aligned. As a result, no side trench is produced since a hole pattern is formed by using a dummy film, and even if a contact plug of a memory section is misaligned with the diffusion preventive layer, the contact plug is out of direct contact with a dielectric film having a high permittivity. Hence, a highly reliable device can be obtained.
摘要翻译：在下电极的底表面和将下电极连接到开关晶体管的一个扩散层的布线之间延伸的扩散防止层是自对准的。结果，由于通过使用虚拟膜形成孔图案，所以不产生侧沟槽，并且即使存储部分的接触插塞与扩散防止层不对准，接触插塞不与电介质直接接触具有高介电常数的薄膜。因此，可以获得高度可靠的装置。

7. 发明授权

US08052495B2 Method for producing spark plug by projection welding and spark plug thereof 有权
标题翻译：通过突起焊接和火花塞生产火花塞的方法
公开(公告)号：US08052495B2
公开(公告)日：2011-11-08
申请号：US12057242
申请日：2008-03-27
申请人： Tomoaki Kato , Kazuyoshi Torii , Mamoru Musasa
发明人： Tomoaki Kato , Kazuyoshi Torii , Mamoru Musasa
IPC分类号： H01T21/02
CPC分类号： H01T13/32 , H01T21/02
摘要： A spark plug (100) including a center electrode (130) and a ground electrode (140), which is formed by joining a ground electrode chip (143) to a ground electrode base material (141) via an intermediate member (142). A method for producing the spark plug (100) includes providing a projecting portion (142p) on the intermediate member (142), and projection-welding the intermediate member (142) to the ground electrode base material (141) by means of the projecting portion (142p), to thereby join the intermediate member 142 to the ground electrode base material (141). Further, the intermediate member (142) of the spark plug (100) includes a cylindrical columnar portion (142e) which is joined to the ground electrode chip (143), and a flange portion (142d) which is joined to the ground electrode base material (141) and which flange portion (142d) has a diameter greater than that of the cylindrical columnar portion (142e).
摘要翻译：一种火花塞（100），包括通过中间构件（142）将接地电极芯片（143）接合到接地电极基材（141）而形成的中心电极（130）和接地电极（140）。一种火花塞（100）的制造方法，其特征在于，在所述中间部件（142）上设置突出部（142p），通过所述突出部（142）将所述中间部件（142）投射到所述接地电极母材（142p），从而将中间构件142接合到接地电极基材（141）。此外，火花塞（100）的中间部件（142）包括与接地电极芯片（143）接合的圆筒状的柱状部（142e）和与接地电极基体接合的凸缘部（142d）材料（141），并且所述凸缘部分（142d）的直径大于圆柱形柱状部分（142e）的直径。

8. 发明授权

US08044562B2 Spark plug 有权
标题翻译：火花塞
公开(公告)号：US08044562B2
公开(公告)日：2011-10-25
申请号：US12741764
申请日：2008-11-12
申请人： Mamoru Musasa , Naomichi Miyashita , Kazuyoshi Torii
发明人： Mamoru Musasa , Naomichi Miyashita , Kazuyoshi Torii
IPC分类号： H01T13/20
CPC分类号： H01T13/39
摘要： There is provided a spark section (80) of needle-like shape protruding from an inner surface (33) of a ground electrode (30) to define a spark gap between the spark section and an electrode tip on a center electrode. The spark section (80) has a noble metal member (81) and an intermediate member (86) joined to each other. The materials of the noble metal member (81) and the intermediate member (86) are selected in such a manner that the thermal conductivity of the intermediate member (86) is lower than that of the noble metal member (81). This limits heat radiation through the heat radiation passage from the noble metal member (81) through the intermediate member (86) to the ground electrode (30) so as to maintain the noble metal member (81) at a higher temperature than conventional types and reduce a quenching effect of the noble metal member (81) on a flame core generated in the spark gap for improvement in ignition performance.
摘要翻译：设置从接地电极（30）的内表面（33）突出的针状的火花部（80），以在火花部和中心电极上的电极尖之间限定火花隙。火花部（80）具有彼此接合的贵金属部件（81）和中间部件（86）。选择贵金属构件（81）和中间构件（86）的材料，使得中间构件（86）的导热率低于贵金属构件（81）的导热率。这就限制了通过从贵金属构件（81）穿过中间构件（86）到接地电极（30）的散热通道的热辐射，以便将贵金属构件（81）保持在比常规类型更高的温度降低贵金属构件（81）对火花隙中产生的火焰核心的淬火效果，以提高点火性能。

9. 发明申请

US20080238282A1 METHOD FOR PRODUCING SPARK PLUG AND SPARK PLUG 有权
标题翻译：生产火花塞和火花塞的方法
公开(公告)号：US20080238282A1
公开(公告)日：2008-10-02
申请号：US12057242
申请日：2008-03-27
申请人： Tomoaki Kato , Kazuyoshi Torii , Mamoru Musasa
发明人： Tomoaki Kato , Kazuyoshi Torii , Mamoru Musasa
IPC分类号： H01T13/20
CPC分类号： H01T13/32 , H01T21/02
摘要： A spark plug (100) including a center electrode (130) and a ground electrode (140), which is formed by joining a ground electrode chip (143) to a ground electrode base material (141) via an intermediate member (142). A method for producing the spark plug (100) includes providing a projecting portion (142p) on the intermediate member (142), and projection-welding the intermediate member (142) to the ground electrode base material (141) by means of the projecting portion (142p), to thereby join the intermediate member 142 to the ground electrode base material (141). Further, the intermediate member (142) of the spark plug (100) includes a cylindrical columnar portion (142e) which is joined to the ground electrode chip (143), and a flange portion (142d) which is joined to the ground electrode base material (141) and which flange portion (142d) has a diameter greater than that of the cylindrical columnar portion (142e).
摘要翻译：一种火花塞（100），包括通过中间构件（142）将接地电极芯片（143）接合到接地电极基材（141）而形成的中心电极（130）和接地电极（140）。一种火花塞（100）的制造方法，其特征在于，在所述中间部件（142）上设置突出部（142p），通过所述中间部件（142）将所述中间部件（142）投射到所述接地电极母材突起部分（142p），从而将中间构件142接合到接地电极基材（141）。此外，火花塞（100）的中间构件（142）包括接合到接地电极芯片（143）的圆柱形柱状部分（142e）和接合到地面的凸缘部分（142d）电极基体材料（141），并且所述凸缘部分（142d）的直径大于圆柱形部分（142e）的直径。

10. 发明申请

US20060276097A1 Spark plug manufacturing method 有权
标题翻译：火花塞制造方法
公开(公告)号：US20060276097A1
公开(公告)日：2006-12-07
申请号：US10565902
申请日：2004-11-18
申请人： Akira Suzuki , Tomoaki Kato , Kazuyoshi Torii , Akikazu Taido
发明人： Akira Suzuki , Tomoaki Kato , Kazuyoshi Torii , Akikazu Taido
IPC分类号： H01T13/20
CPC分类号： H01T21/02 , H01T13/20 , H01T13/39
摘要： There is provided a method for producing a spark plug in which welding strength between a noble metal tip and an electrode joined by laser welding can be restrained from becoming weak. A noble metal tip (90) to be joined to a center electrode (2) or ground electrode of a spark plug to form a spark discharge gap is resistance-welded to each electrode containing no noble metal and then laser-welded. In the noble metal tip (90) exposed under a severe environment involving spark discharge, a molten portion (80) formed in such a manner that a portion of the noble metal tip (90) and a portion of the electrode are melted by laser welding and a non-molten portion (95) on the noble metal tip (90) side are apt to be peeled from each other in a boundary surface (83) between the molten portion (80) and the non-molten portion (95). The noble metal content in the molten portion (80) however becomes higher because a flange portion is formed in a bottom portion by pressing force applied on the noble metal tip (90) at the time of resistance welding and then irradiated with a laser beam. Accordingly, peeling can be prevented from occurring in the boundary surface (83).
摘要翻译：提供一种用于制造火花塞的方法，其中可以抑制贵金属电极头和通过激光焊接接合的电极之间的焊接强度变弱。要连接到火花塞的中心电极（2）或接地电极以形成火花放电间隙的贵金属端头（90）被电阻焊接到不含贵金属的每个电极上，然后被激光焊接。在涉及火花放电的恶劣环境下露出的贵金属电极头（90）中，以使得贵金属电极头（90）的一部分和电极的一部分通过激光焊接而熔化的方式形成的熔融部（80）并且在熔融部分（80）和非熔融部分（95）之间的边界表面（83）中，在贵金属端头（90）侧上的非熔融部分（95）易于彼此剥离。然而，熔融部分（80）中的贵金属含量变高，因为通过在电阻焊接时施加在贵金属电极头（90）上的压力而在底部形成凸缘部分，然后用激光束照射。因此，能够防止在边界面（83）发生剥离。

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