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1. 发明授权

US5288948A Structure of a semiconductor chip having a conductive layer 失效
标题翻译：具有导电层的半导体芯片的结构
公开(公告)号：US5288948A
公开(公告)日：1994-02-22
申请号：US778881
申请日：1991-12-26
申请人： Yasuhiro Fukuda , Tetsuhiko Sugahara , Norio Hirashita , Mitsuhiro Matsuo , Minoru Saito , Masayuki Kobayakawa , Fumitaka Yokoyama
发明人： Yasuhiro Fukuda , Tetsuhiko Sugahara , Norio Hirashita , Mitsuhiro Matsuo , Minoru Saito , Masayuki Kobayakawa , Fumitaka Yokoyama
IPC分类号： H01L23/528 , H05K1/00
CPC分类号： H01L23/5286 , H01L2924/0002
摘要： In order to prevent the occurrence of corrosion due to the sliding of a relatively wide aluminum conductive layer (12) such as a power source conductive layer or a ground conductive layer, formed on a semiconductor substrate (11), breakage of a lower conductive layer due to the sliding of an upper aluminum conductive layer (12) in case of a multilayer interconnection, and the creation of voids in the lower aluminum conductive layer due to the moisture beneath the relatively wide metal conductive layer in case of a multi layer interconnection etc., the conductive layer structure is constructed so that the conductive layer (12) relatively great in width is divided into several conductive layer portions and so that the width of each of the divided conductive layer portions is in a range of 10 .mu.m to 40 .mu.m.
摘要翻译： PCT No.PCT / JP90 / 00424 Sec。 371 1991年12月26日第 102（e）日期1991年12月26日PCT 1990年3月29日PCT PCT。出版物WO91 / 0061600 日期为1991年1月10日。为了防止由形成在半导体基板（11）上的诸如电源导体层或接地导电层的相对宽的铝导电层（12）滑动引起的腐蚀，在多层互连的情况下由于上部铝导电层（12）的滑动导致的下部导电层的破损，以及由于相对较宽的金属导电层下面的水分导致的下部铝导电层中的空隙的产生多层互连的情况等，导电层结构被构造为使得宽度相对较大的导电层（12）被分成几个导电层部分，并且使得每个分离的导电层部分的宽度为范围10（我）m到40（我）m。

2. 发明申请

US20120137856A1 PITCH SHIFT DEVICE AND PROCESS 有权
标题翻译： PITCH SHIFT设备和过程
公开(公告)号：US20120137856A1
公开(公告)日：2012-06-07
申请号：US13301635
申请日：2011-11-21
申请人： Yasuhiro Fukuda , Shoichi Ikeda
发明人： Yasuhiro Fukuda , Shoichi Ikeda
IPC分类号： G10H7/00
CPC分类号： G10H1/20 , G10H3/125 , G10H2210/261 , G10H2250/035
摘要： A pitch shift device provides pitch-shifted sounds based on performance sounds generated by an electronic string musical instrument. The pitch shift device has a device that detects vibrato. When vibrato is detected, an interpolation device of a pitch shift control device performs a control of interpolating for a pitch shift change in the musical sound signal accompanying a change in pitch shift information stored in a pitch information storage device and read out by a pitch shift readout device from a group of pitch shift information. Therefore, unnatural pitch changes in pitch-shifted sound can be suppressed.
摘要翻译：音调移位装置基于由电子乐器产生的演奏声音提供音调偏移的声音。音高移位装置具有检测颤音的装置。当检测到颤音时，音调移位控制装置的内插装置对音乐信号中随音调信息存储装置中存储的音调偏移信息的变化进行音调偏移改变进行内插控制，并通过音调偏移读出读出装置从一组音调移位信息。因此，可以抑制音调移动声音的非自然音高变化。

3. 发明申请

US20100134938A1 SEMICONDUCTOR DEVICE WITH ESD PROTECTION FUNCTION AND ESD PROTECTION CIRCUIT 失效
标题翻译：具有ESD保护功能和ESD保护电路的半导体器件
公开(公告)号：US20100134938A1
公开(公告)日：2010-06-03
申请号：US12688080
申请日：2010-01-15
申请人： Yasuhiro Fukuda
发明人： Yasuhiro Fukuda
IPC分类号： H02H9/04
CPC分类号： H01L27/0255 , H01L21/84 , H01L27/0266 , H01L27/1203
摘要： A semiconductor device with an ESD protection function has an SOI substrate, first to fourth diffusion layers, and a gate. The SOI substrate has a semiconductor layer on an insulation layer. The first diffusion layer is of a first conductivity type and is formed on the semiconductor layer. The second diffusion layer is of the first conductivity type and is formed on the semiconductor layer. The third diffusion layer is of a second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first and second diffusion layers. The fourth diffusion layer is of the second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first diffusion layer and electrically connected to the second diffusion layer. The gate is formed over the third diffusion layer.
摘要翻译：具有ESD保护功能的半导体器件具有SOI衬底，第一至第四扩散层和栅极。 SOI衬底在绝缘层上具有半导体层。第一扩散层是第一导电类型并形成在半导体层上。第二扩散层是第一导电类型，并形成在半导体层上。第三扩散层是第二导电类型，并且形成在半导体层上以便与第一和第二扩散层相邻。第四扩散层是第二导电类型，并且形成在半导体层上以与第一扩散层相邻并且电连接到第二扩散层。栅极形成在第三扩散层上。

4. 发明申请

US20090058845A1 Display device 审中-公开
标题翻译：显示设备
公开(公告)号：US20090058845A1
公开(公告)日：2009-03-05
申请号：US11663302
申请日：2005-10-20
申请人： Yasuhiro Fukuda , Mitsuhiro Kamoto , Hiroyuki Fujimoto , Yoshiyuki Hashimoto , Taku Yokawa , Yoshikazu Ueta , Takumi Yoshimoto , Tomoki Saito , Takashi Kato
发明人： Yasuhiro Fukuda , Mitsuhiro Kamoto , Hiroyuki Fujimoto , Yoshiyuki Hashimoto , Taku Yokawa , Yoshikazu Ueta , Takumi Yoshimoto , Tomoki Saito , Takashi Kato
IPC分类号： G09G3/22
CPC分类号： B60K35/00 , B60K2370/736 , B60K2370/739 , G02F1/1323 , G02F1/133 , G09G3/003 , G09G5/00 , G09G2320/068
摘要： The invention provides a display device wherein provisions are made to be able to properly adjust the image viewing direction, viewing angle, or viewing range on the display device. The display device includes a display section capable of displaying independent images intended for a plurality of different viewing directions on the same screen, an information acquiring section for acquiring orientation information concerning the orientation of the images, and an image direction varying section for varying the orientation of the images based on the orientation information acquired by the information acquiring section.
摘要翻译：本发明提供了一种显示装置，其中使得能够适当地调整显示装置上的图像观看方向，视角或观看范围。显示装置包括能够在同一屏幕上显示旨在用于多个不同观看方向的独立图像的显示部分，用于获取关于图像的取向的方位信息的信息获取部分，以及用于改变取向的图像方向改变部分基于由信息获取部获取的取向信息。

5. 发明授权

US06919870B2 Driving circuit 有权
标题翻译：驱动电路
公开(公告)号：US06919870B2
公开(公告)日：2005-07-19
申请号：US09887594
申请日：2001-06-22
申请人： Yasuhiro Fukuda
发明人： Yasuhiro Fukuda
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , G11C19/00 , H03F1/02 , H03F3/34 , H03F3/72
CPC分类号： G11C19/00 , G09G3/3614 , G09G3/3688 , G09G2310/027 , G09G2310/0291 , G09G2310/0294 , G09G2310/0297 , G09G2320/02 , G09G2330/021
摘要： The objective of this invention is to compensate or avoid the influence of offset in an easy and efficient manner, to correctly match the voltage of the output signal with the voltage of the input signal, that is, the target value, and to significantly reduce the current consumption. When voltage follower 32L supplies bias voltage VBn to each of constant current source circuits 58L, 60L, it acts as a source-type voltage follower. However, when the bias voltage applied to each of constant current source circuits 58L, 60L is changed from VBn to Vss of the power supply voltage level, each of constant current source circuits 58L, 60L is turned off, and no current flows through them. When the constant current source circuit 58 is turned off in differential input part 44L, the potential at the output terminal (node) NL rises almost to the level of the power supply voltage Vdd. In this way, the driving transistor 62L is also turned off in output part 46L.
摘要翻译：本发明的目的是以容易和有效的方式补偿或避免偏移的影响，以将输出信号的电压与输入信号的电压，即目标值正确地匹配，并且显着地减少目前的消费。当电压跟随器32L向每个恒流源电路58L，60L提供偏置电压VBn时，其作为源极型电压跟随器。然而，当施加到恒定电流源电路58L，60L中的每一个的偏置电压从电源电压电平的VBn变为Vss时，恒流源电路58L，60L中的每一个都断开，并且没有电流流过他们。当差动输入部分44L中的恒流源电路58断开时，输出端（节点）NL处的电位几乎上升到电源电压Vdd的电平。以这种方式，驱动晶体管62L也在输出部分46L中截止。

6. 发明授权

US4823088A Method of and apparatus for testing semiconductor device for electrostatic discharge damage 失效
标题翻译：用于测试用于静电放电损坏的半导体器件的方法和装置
公开(公告)号：US4823088A
公开(公告)日：1989-04-18
申请号：US42424
申请日：1987-04-24
申请人： Yasuhiro Fukuda
发明人： Yasuhiro Fukuda
IPC分类号： G01R31/26 , G01R31/12 , G01R31/30 , G01R31/3161 , G01N27/60
CPC分类号： G01R31/3161 , G01R31/129
摘要： A method of testing the susceptibility of a semiconductor device having a dielectric package to withstand electrostatic charges charged on the dielectric package, comprising the steps of: connecting a switch in between input/output terminals of the semiconductor device and a reference potential source, applying a prescribed potential to the surface of the dielectric package to charge the surface with electric charges while the switch is in an open state, applying a prescribed potential to a terminal of the semiconductor device via a resistor, and discharging the charges to the reference potential source by closing the switch.

7. 发明授权

US07840017B2 Audio message transfer sheet and manufacturing method thereof, and power supply circuit 失效
标题翻译：音频消息传送片及其制造方法以及电源电路
公开(公告)号：US07840017B2
公开(公告)日：2010-11-23
申请号：US10569740
申请日：2004-08-30
申请人： Yukihiko Isetani , Takaaki Okada , Hideo Shimizu , Yoshiaki Ide , Yasuhiro Fukuda , Takeshi Yamakami , Fumihiro Hanazawa , Akira Yamazaki
发明人： Yukihiko Isetani , Takaaki Okada , Hideo Shimizu , Yoshiaki Ide , Yasuhiro Fukuda , Takeshi Yamakami , Fumihiro Hanazawa , Akira Yamazaki
IPC分类号： H04R25/00 , H04R1/02 , H04B5/00 , H01L41/053 , H01L41/083
CPC分类号： H01M2/10 , B42D15/022 , H01M6/40
摘要： Sheet-like audio information recording/reproducing means capable of recording/reproducing audio information is sandwiched between two support sheets from front and back only in part of the area thereof and these two support sheets are further sandwiched between two surface sheets and the support sheets and surface sheets are bonded together.
摘要翻译：能够记录/再现音频信息的片状音频信息记录/再现装置被夹在两个支撑片之间，仅在其一部分区域中的前后部分夹持，并且这两个支撑片进一步夹在两个表面片和支撑片之间，表面片材结合在一起。

8. 发明授权

US07816761B2 Semiconductor device having fuse and protection circuit 有权
标题翻译：具有保险丝和保护电路的半导体器件
公开(公告)号：US07816761B2
公开(公告)日：2010-10-19
申请号：US11082922
申请日：2005-03-18
申请人： Noboru Egawa , Yasuhiro Fukuda
发明人： Noboru Egawa , Yasuhiro Fukuda
IPC分类号： H01L23/62
CPC分类号： H01L23/5258 , H01L27/0251 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having a semiconductor substrate, an insulating layer, a fuse, a diffusion layer and a resistor. The semiconductor substrate has a first conductivity type. The insulating layer is selectively formed on the surface of the semiconductor substrate. The fuse is formed on the insulating layer. The diffusion layer has a second conductivity type. The diffusion layer is formed on the surface of the semiconductor substrate and electrically connected to the fuse. The first resistor is electrically connected to the fuse.
摘要翻译：具有半导体衬底，绝缘层，熔丝，扩散层和电阻器的半导体器件。半导体衬底具有第一导电类型。绝缘层选择性地形成在半导体衬底的表面上。保险丝形成在绝缘层上。扩散层具有第二导电类型。扩散层形成在半导体衬底的表面上并与熔丝电连接。第一个电阻器与保险丝电连接。

9. 发明授权

US07498615B2 Electro-static discharge protection circuit and semiconductor device having the same 有权
标题翻译：静电放电保护电路和具有相同的半导体器件
公开(公告)号：US07498615B2
公开(公告)日：2009-03-03
申请号：US11276403
申请日：2006-02-28
申请人： Toshikazu Kuroda , Hirokazu Hayashi , Yasuhiro Fukuda
发明人： Toshikazu Kuroda , Hirokazu Hayashi , Yasuhiro Fukuda
IPC分类号： H01L29/74
CPC分类号： H01L27/0262
摘要： An electro-static discharge protection circuit includes a thyristor mode ensuring circuit and a thyristor rectifier circuit. The thyristor mode ensuring circuit includes a capacitive element connected between a higher potential line and a lower potential line, and ensures a constant and sufficient capacity independently of the number of input/output signal bits, even when the number of input/output signal bits is a theoretical minimum, i.e. 1, so that a surge current induced by electro-static discharge (ESD) applied to an output pad is injected into the first capacitive element to charge it. Thus, by means of the current caused by the surge current, the thyristor rectifier circuit is triggered into a thyristor mode, which allows the surge current to flow to the lower potential line through the thyristor rectifier circuit, protecting circuitry against the surge current.
摘要翻译：一种静电放电保护电路包括晶闸管模式保护电路和晶闸管整流电路。晶闸管模式确保电路包括连接在较高电位线和下电位线之间的电容元件，并且即使当输入/输出信号位的数量为理论最小值，即1，使得由施加到输出焊盘的静电放电（ESD）引起的浪涌电流被注入到第一电容元件中以对其充电。因此，通过由浪涌电流引起的电流，晶闸管整流电路被触发成晶闸管模式，这允许浪涌电流通过晶闸管整流电路流向下电位线，保护电路免受浪涌电流的影响。

10. 发明申请

US20060114628A1 SEMICONDUCTOR DEVICE WITH ESD PROTECTION FUNCTION AND ESD PROTECTION CIRCUIT 有权
标题翻译：具有ESD保护功能和ESD保护电路的半导体器件
公开(公告)号：US20060114628A1
公开(公告)日：2006-06-01
申请号：US11164205
申请日：2005-11-14
申请人： Yasuhiro Fukuda
发明人： Yasuhiro Fukuda
IPC分类号： H02H9/00
CPC分类号： H01L27/0255 , H01L21/84 , H01L27/0266 , H01L27/1203
摘要： A semiconductor device with an ESD protection function has an SOI substrate, first to fourth diffusion layers, and a gate. The SOI substrate has a semiconductor layer on an insulation layer. The first diffusion layer is of a first conductivity type and is formed on the semiconductor layer. The second diffusion layer is of the first conductivity type and is formed on the semiconductor layer. The third diffusion layer is of a second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first and second diffusion layers. The fourth diffusion layer is of the second conductivity type and is formed on the semiconductor layer so as to be adjacent to the first diffusion layer and electrically connected to the second diffusion layer. The gate is formed over the third diffusion layer.
摘要翻译：具有ESD保护功能的半导体器件具有SOI衬底，第一至第四扩散层和栅极。 SOI衬底在绝缘层上具有半导体层。第一扩散层是第一导电类型并形成在半导体层上。第二扩散层是第一导电类型，并形成在半导体层上。第三扩散层是第二导电类型，并且形成在半导体层上以便与第一和第二扩散层相邻。第四扩散层是第二导电类型，并且形成在半导体层上以与第一扩散层相邻并且电连接到第二扩散层。栅极形成在第三扩散层上。

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