专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20050089734A1 Fuel cell apparatus and electronic appliances mounting the same 审中-公开
标题翻译：燃料电池装置和安装其的电子设备
公开(公告)号：US20050089734A1
公开(公告)日：2005-04-28
申请号：US10920436
申请日：2004-08-18
申请人： Yasuaki Norimatsu , Akihiko Kanouda , Noboru Akiyama , Mutsumi Kikuchi
发明人： Yasuaki Norimatsu , Akihiko Kanouda , Noboru Akiyama , Mutsumi Kikuchi
IPC分类号： H01M8/00 , H01M8/04 , H01M8/10
CPC分类号： H01M8/04313 , H01M8/04186 , H01M8/04753 , H01M8/1009
摘要： In order to provide a fuel cell apparatus with an effective energy consumption by selecting a suitable fuel cartridge mounted on the apparatus, the present invention provides a fuel cell apparatus comprising at least two fuel storage sections for storing fuel for power generation, wherein at least one of the storage sections is selected and used, while the fuel cell is in service.
摘要翻译：为了通过选择安装在设备上的合适的燃料盒来提供具有有效能量消耗的燃料电池装置，本发明提供了一种燃料电池装置，其包括至少两个用于储存用于发电的燃料的燃料储存部分，其中至少一个在燃料电池正在使用中选择和使用存储部分。

2. 发明授权

US07268611B2 Semiconductor device and memory card using same 有权
标题翻译：半导体器件和存储卡使用相同
公开(公告)号：US07268611B2
公开(公告)日：2007-09-11
申请号：US10524087
申请日：2003-08-08
申请人： Mutsumi Kikuchi , Noboru Akiyama , Hiroyuki Shoji , Fumio Murabayashi , Akihiko Kanouda , Takashi Sase , Koji Tateno
发明人： Mutsumi Kikuchi , Noboru Akiyama , Hiroyuki Shoji , Fumio Murabayashi , Akihiko Kanouda , Takashi Sase , Koji Tateno
IPC分类号： G05F1/10
CPC分类号： G11C5/147 , H01L27/0688 , H01L27/08 , H02M3/156 , H02M2001/007
摘要： A semiconductor device capable of achieving downsizing without reducing the power supply efficiency and capable of reducing switching noises and a memory card using the same are disclosed. The device comprises a plurality of stages of voltage booster circuits for potentially raising a power supply voltage up to a final output voltage, a voltage control unit for controlling an output voltage at a nearby location of the final stage, and one or more internal elements to which the final output voltage is supplied. A primary voltage booster circuit at the first stage includes an inductance element, a switching element, a diode and a driver circuit. At a metal core part of the inductance element, a metal wiring line is used, which was formed by use of a fabrication process of semiconductor integrated circuits, while employing for its core part an inter-wiring layer dielectric film that was formed using the fabrication process. In addition, the switching element and the diode are arranged so that portions thereof are disposed beneath the inductance element.
摘要翻译：公开了能够实现小型化而不降低电源效率并且能够降低开关噪声的半导体器件和使用其的存储卡。该装置包括用于潜在地提高最终输出电压的电源电压的多级升压电路，用于控制最后级的附近位置处的输出电压的电压控制单元和一个或多个内部元件其提供最终输出电压。第一级的初级升压电路包括电感元件，开关元件，二极管和驱动器电路。在电感元件的金属芯部分，使用通过使用半导体集成电路的制造工艺形成的金属布线，同时使用其核心部分使用该制造形成的布线层电介质膜处理。此外，开关元件和二极管被布置成使得其部分设置在电感元件下方。

3. 发明申请

US20050237039A1 Semiconductior device and memory card using same 有权
标题翻译：半导体器件和存储卡使用相同
公开(公告)号：US20050237039A1
公开(公告)日：2005-10-27
申请号：US10524087
申请日：2003-08-08
申请人： Mutsumi Kikuchi , Noboru Akiyama , Hiroyuki Shoji , Fumio Murabayashi , Akihiko Kanouda , Takashi Sase , Koji Tateno
发明人： Mutsumi Kikuchi , Noboru Akiyama , Hiroyuki Shoji , Fumio Murabayashi , Akihiko Kanouda , Takashi Sase , Koji Tateno
IPC分类号： G05F1/40 , G11C5/14 , H01L27/06 , H01L27/08 , H02M3/156
CPC分类号： G11C5/147 , H01L27/0688 , H01L27/08 , H02M3/156 , H02M2001/007
摘要： A semiconductor device capable of achieving downsizing without reducing the power supply efficiency and capable of reducing switching noises and a memory card using the same are disclosed. The device comprises a plurality of stages of voltage booster circuits for potentially raising a power supply voltage up to a final output voltage, a voltage control unit for controlling an output voltage at a nearby location of the final stage, and one or more internal elements to which the final output voltage is supplied. A primary voltage booster circuit at the first stage includes an inductance element, a switching element, a diode and a driver circuit. At a metal core part of the inductance element, a metal wiring line is used, which was formed by use of a fabrication process of semiconductor integrated circuits, while employing for its core part an inter-wiring layer dielectric film that was formed using the fabrication process. In addition, the switching element and the diode are arranged so that portions thereof are disposed beneath the inductance element.
摘要翻译：公开了能够实现小型化而不降低电源效率并且能够降低开关噪声的半导体器件和使用其的存储卡。该装置包括用于潜在地提高最终输出电压的电源电压的多级升压电路，用于控制最后级的附近位置处的输出电压的电压控制单元和一个或多个内部元件其提供最终输出电压。第一级的初级升压电路包括电感元件，开关元件，二极管和驱动器电路。在电感元件的金属芯部分，使用通过使用半导体集成电路的制造工艺形成的金属布线，同时使用其核心部分使用该制造形成的布线层电介质膜处理。此外，开关元件和二极管被布置成使得其部分设置在电感元件下方。

4. 发明授权

US08664716B2 Semiconductor device, method of manufacturing the same and power-supply device using the same 失效
标题翻译：半导体装置及其制造方法以及使用其的电源装置
公开(公告)号：US08664716B2
公开(公告)日：2014-03-04
申请号：US12818485
申请日：2010-06-18
申请人： Takayuki Hashimoto , Takashi Hirao , Noboru Akiyama
发明人： Takayuki Hashimoto , Takashi Hirao , Noboru Akiyama
IPC分类号： H01L27/06
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/405 , H01L29/407 , H01L29/41741 , H01L29/41766 , H01L29/41775 , H01L29/4933 , H01L29/66727 , H01L29/7803 , H02M3/1588 , Y02B70/1466
摘要： In a lateral-type power MOSFET, high breakdown voltage is achieved with suppressing to increase a cell pitch, and a feedback capacity and an ON resistance are decreased. An n− type silicon region having a high resistance to be a region of maintaining a breakdown voltage is vertically provided with respect to a main surface of an n+ type silicon substrate, and the n− type silicon region having the high resistance is connected to the n+ type silicon substrate. Also, a conductive substance is filled through an insulating substance inside a trench formed to reach the n+ type silicon substrate from the main surface of the n+ type silicon substrate so as to contact with the n− type silicon region having the high resistance, and the conductive substance is electrically connected to a source electrode.
摘要翻译：在横向型功率MOSFET中，通过抑制增加电池间距而实现高的击穿电压，并且降低反馈容量和导通电阻。相对于n +型硅衬底的主表面垂直地设置具有高电阻的n型硅区域作为保持击穿电压的区域，并且具有高电阻的n型硅区域连接到 n +型硅衬底。此外，导电物质通过绝缘物质填充在形成为从n +型硅衬底的主表面到达n +型硅衬底的沟槽内，以便与具有高电阻的n型硅区接触，并且导电物质电连接到源电极。

5. 发明授权

US08638577B2 Semiconductor device for DC-DC converter including high side and low side semiconductor switches 有权
标题翻译：包括高侧和低侧半导体开关的DC-DC转换器的半导体装置
公开(公告)号：US08638577B2
公开(公告)日：2014-01-28
申请号：US13230947
申请日：2011-09-13
申请人： Masaki Shiraishi , Takayuki Hashimoto , Noboru Akiyama
发明人： Masaki Shiraishi , Takayuki Hashimoto , Noboru Akiyama
IPC分类号： H02M1/38 , H02M3/155
CPC分类号： H02M1/08 , H01L24/48 , H01L24/49 , H01L2224/48137 , H01L2224/48247 , H01L2224/49175 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01033 , H01L2924/01082 , H01L2924/12032 , H01L2924/12036 , H01L2924/13091 , H01L2924/14 , H01L2924/30107 , H03K17/0822 , H03K17/165 , H03K17/166 , H03K17/6871 , H01L2924/00 , H01L2224/45099
摘要： In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.
摘要翻译：在非隔离型DC / DC转换器中，从通过高侧MOSFET的主电路以外的部分施加驱动低侧MOSFET的栅极的低侧预驱动器的基准电位，低侧MOSFET，使得低侧MOSFET的源极与预驱动器之间的寄生电感增加，而不增加主电路中的寄生电感的和，并且低侧MOSFET的栅极的负电位驱动并且可以防止在不添加任何构件和改变驱动系统的情况下自启闭现象。

6. 发明授权

US07770403B2 Indoor and outdoor unit communication via signal from a power line 失效
标题翻译：通过来自电力线的信号进行室内和室外单元通信
公开(公告)号：US07770403B2
公开(公告)日：2010-08-10
申请号：US12368681
申请日：2009-02-10
申请人： Yasuyuki Kojima , Noboru Akiyama , Takeshi Onaka , Tatsumi Yamauchi , Koichi Taniguchi , Koichi Tokushige , Noriyuki Bunkou , Keiji Sato
发明人： Yasuyuki Kojima , Noboru Akiyama , Takeshi Onaka , Tatsumi Yamauchi , Koichi Taniguchi , Koichi Tokushige , Noriyuki Bunkou , Keiji Sato
IPC分类号： F25B49/00 , G05D23/00 , G01M1/38
CPC分类号： F24F1/0003 , F24F11/30 , F24F11/54
摘要： An air conditioning system is arranged to use a power line for communication. The air conditioning system includes one or more indoor units, one or more outdoor units, and a system controller for controlling the indoor units or outdoor units and executes communications between the indoor units and the outdoor units as overlapping a signal on the power line for supplying electric power. The outdoor units are connected with the system controller through a leased communication line. The indoor unit provides a power line communication device being connected with the power line. The outdoor unit provides a leased communication device being connected with the leased communication line. A bridge is also provided for connecting the leased communication line and the power line. The control information is exchanged mutually between the indoor units, the outdoor units and the system controller through the power line.
摘要翻译：一个空调系统被设置为使用电力线进行通信。空调系统包括一个或多个室内单元，一个或多个室外单元，以及用于控制室内单元或室外单元的系统控制器，并且执行室内单元和室外单元之间的通信，以与用于供应的电力线路上的信号重叠电力。室外机通过租用通信线与系统控制器连接。室内机提供与电力线连接的电力线通信装置。户外单元提供与租用通信线路连接的租用通信设备。还提供了用于连接租用通信线路和电力线路的桥梁。控制信息通过电力线在室内机，室外机和系统控制器之间相互交换。

7. 发明申请

US20100001790A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20100001790A1
公开(公告)日：2010-01-07
申请号：US12483668
申请日：2009-06-12
申请人： Takayuki HASHIMOTO , Takashi Hirao , Noboru Akiyama
发明人： Takayuki HASHIMOTO , Takashi Hirao , Noboru Akiyama
IPC分类号： H01L25/00
CPC分类号： H01L27/0629 , H01L2924/0002 , H02M7/003 , H01L2924/00
摘要： In a semiconductor device, a high-side driver is arranged in a region closer to a periphery of a semiconductor substrate than a high-side switch, and a low-side driver is arranged in a region closer to the periphery of the semiconductor substrate than the low-side switch. By this means, a path from a positive terminal of an input capacitor to a negative terminal of the input capacitor via the high-side switch and the low-side switch is short, a path from a positive terminal of a drive capacitor to a negative terminal of the drive capacitor via the low-side driver is short, and a path from a positive terminal of a boot strap capacitor to a negative terminal of the boot strap capacitor via the high-side driver is short, and therefore, the parasitic inductance can be reduced, and the conversion efficiency can be improved.
摘要翻译：在半导体装置中，高侧驱动器配置在比高侧开关更靠近半导体基板的周围的区域，低边驱动器配置在比半导体基板的周边更靠近的区域，低端开关。通过这种方式，经由高侧开关和低侧开关从输入电容器的正极端子到输入电容器的负极端子的路径很短，从驱动电容器的正极端子到负极的路径通过低侧驱动器的驱动电容器的端子短，通过高侧驱动器从引导电容器的正极端子到引导电容器的负极端子的路径短，因此，寄生电感可以降低转换效率。

8. 发明申请

US20090140327A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090140327A1
公开(公告)日：2009-06-04
申请号：US12326392
申请日：2008-12-02
申请人： Takashi Hirao , Takayuki Hashimoto , Noboru Akiyama
发明人： Takashi Hirao , Takayuki Hashimoto , Noboru Akiyama
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7802 , H01L29/0696 , H01L29/0878 , H01L29/1095 , H01L29/407 , H01L29/41741 , H01L29/42368 , H01L29/66727 , H01L29/66734 , H01L29/7813
摘要： The vertical trench MOSFET comprises: an N type epitaxial region formed on an upper surface of an N+ type substrate having a drain electrode on a lower surface thereof; a gate trench extending from a front surface into the N type epitaxial region; a gate electrode positioned in the gate trench so as to interpose an insulator; a channel region formed on the N type epitaxial region; a source region formed on the channel region; a source electrode formed on the source region; a source trench extending from the front surface into the N type epitaxial region; and a trench-buried source electrode positioned in the source trench so as to interpose an insulator, wherein the source electrode contacts with the trench-buried source electrode.
摘要翻译：垂直沟槽MOSFET包括：形成在其下表面上具有漏电极的N +型衬底的上表面上的N型外延区域; 栅极沟槽，其从前表面延伸到N型外延区域; 位于所述栅极沟槽中以便插入绝缘体的栅电极; 形成在N型外延区上的沟道区; 形成在沟道区上的源极区; 形成在源极区上的源电极; 源极沟槽，其从前表面延伸到N型外延区域; 以及位于所述源极沟槽中以便插入绝缘体的沟槽埋入式源电极，其中所述源电极与所述沟槽埋入式源极接触。

9. 发明授权

US07002535B2 Display apparatus 失效
公开(公告)号：US07002535B2
公开(公告)日：2006-02-21
申请号：US10866302
申请日：2004-06-14
申请人： Makoto Onozawa , Yuji Sano , Michitaka Ohsawa , Takashi Sasaki , Noboru Akiyama , Fumitaka Asami , Kazuo Yoshiikawa , Hitoshi Hirakawa , Tomokatsu Kishi , Toyoshi Kawada
发明人： Makoto Onozawa , Yuji Sano , Michitaka Ohsawa , Takashi Sasaki , Noboru Akiyama , Fumitaka Asami , Kazuo Yoshiikawa , Hitoshi Hirakawa , Tomokatsu Kishi , Toyoshi Kawada
IPC分类号： G09G3/28
CPC分类号： G09G3/2965 , G09G3/2927 , G09G3/293 , G09G3/294 , G09G3/296
摘要： A display apparatus includes a display panel including address electrodes and sustain electrodes crossing the address electrodes, with pixels being sandwiched between the address electrodes and the sustain electrodes. A sustain-electrode drive circuit selectively generates both sustain pulses and scan pulses and supplies them to the sustain electrodes. An address-electrode drive circuit generates address pulses based on a video signal and supplies the address pulses to the address electrodes. A control-signal generation circuit generates a control signal for controlling the sustain-electrode drive circuit to generate a selected one of the sustain pulses and the scan pulses and supplies the control signal to the sustain-electrode drive circuit. In order to display an image on the display panel, the sustain-electrode drive circuit both specifies addresses of pixels to be turned on and turns on the pixels at the specified addresses.

10. 发明申请

US20050112932A1 Semiconductor device including primary and secondary side circuits on first and second substrates with capacitive insulation 有权
标题翻译：半导体器件包括具有电容绝缘的第一和第二衬底上的初级和次级侧电路
公开(公告)号：US20050112932A1
公开(公告)日：2005-05-26
申请号：US11024680
申请日：2004-12-30
申请人： Noboru Akiyama , Minehiro Nemoto , Seigou Yukutake , Yasuyuki Kojima , Kazuyuki Kamegaki
发明人： Noboru Akiyama , Minehiro Nemoto , Seigou Yukutake , Yasuyuki Kojima , Kazuyuki Kamegaki
IPC分类号： H01L25/18 , H01L23/31 , H01L23/48 , H01L23/495 , H01L25/04 , H01L25/16 , H01R4/24
CPC分类号： H01L23/3107 , H01L23/3121 , H01L23/48 , H01L23/49575 , H01L24/06 , H01L24/48 , H01L24/49 , H01L25/162 , H01L2224/0401 , H01L2224/05554 , H01L2224/05599 , H01L2224/0603 , H01L2224/16 , H01L2224/16225 , H01L2224/16245 , H01L2224/16265 , H01L2224/32245 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/484 , H01L2224/49175 , H01L2224/73207 , H01L2224/73265 , H01L2224/85399 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01074 , H01L2924/014 , H01L2924/10161 , H01L2924/12036 , H01L2924/14 , H01L2924/181 , H01L2924/19041 , H01L2924/19104 , H01L2924/3011 , H01L2924/30111 , H01L2224/45099 , H01L2924/00 , H01L2924/00012
摘要： A primary side circuit and a secondary side circuit are provided on first and second semiconductor substrates, respectively. A first capacitive insulator on the first substrate electrically insulates and isolates between the primary and secondary side circuits while permitting signal transmission between these circuits. A second capacitive insulator on the second semiconductor substrate electrically isolates the primary and secondary side circuit while permitting signal transmission therebetween. First and second frames are provided for input and output of signals to and from the primary and secondary side circuits. External electrodes of the first and second capacitive insulators are connected together by a third lead frame via a conductive adhesive body including more than one solder ball. The first and second substrates and the lead frames are sealed by a dielectric resin.
摘要翻译：初级侧电路和次级侧电路分别设置在第一和第二半导体衬底上。第一基板上的第一电容绝缘体在允许这些电路之间的信号传输的同时在一次侧电路和次侧电路之间电绝缘和隔离。第二半导体衬底上的第二电容绝缘体电隔离初级和次级侧电路，同时允许它们之间的信号传输。第一和第二帧被提供用于输入和输出到主电路和次级侧电路的信号。第一和第二电容性绝缘体的外部电极通过包括多于一个焊球的导电粘合体由第三引线框架连接在一起。第一和第二基板和引线框由绝缘树脂密封。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式