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1. 发明授权

US5905604A Cassette transfer mechanism for use in cassette library system 失效
标题翻译：盒式磁带库系统中使用的盒式传输机制
公开(公告)号：US5905604A
公开(公告)日：1999-05-18
申请号：US907930
申请日：1997-08-11
申请人： Yasuaki Kano , Yoshitsugu Taki , Toshiya Kurokawa , Taketoshi Yamagishi , Kyoichi Isomura , Shin Kimura
发明人： Yasuaki Kano , Yoshitsugu Taki , Toshiya Kurokawa , Taketoshi Yamagishi , Kyoichi Isomura , Shin Kimura
IPC分类号： G11B15/68
CPC分类号： G11B15/6835
摘要： A cassette transfer mechanism for transferring a cassette recording medium to and from a cassette accommodating portion for accommodating cassette recording mediums, the cassette transfer mechanism having a unit which stores information in a memory included in the cassette and/or reads information from the same and which has a connector structured to be brought into contact with a memory terminal provided for the cassette recording medium when information is stored in the memory and/or read from the same. The above-mentioned structure enables information to be stored in the memory included in the cassette and/or read from the same without a necessity of loading the cassette recording medium into a drive unit whenever information is stored/read.
摘要翻译：一种用于将盒式磁带记录介质传送到用于容纳盒式记录介质的盒容纳部分的盒式磁带传送机构，盒式磁带传送机构具有将信息存储在包含在盒中的存储器中的单元和/或从其中读取信息，具有连接器，其被构造成当信息被存储在存储器中和/或从其读取时与设置在盒式磁带记录介质上的存储器端子接触。上述结构使信息能够存储在包含在盒中的存储器和/或从其中读取，而不需要每当存储/读取信息时将盒式磁带记录介质加载到驱动单元中。

2. 发明授权

US07664373B2 Program, data processing method, and system of same 失效
标题翻译：程序，数据处理方法和系统
公开(公告)号：US07664373B2
公开(公告)日：2010-02-16
申请号：US10900891
申请日：2004-07-27
申请人： Shin Kimura
发明人： Shin Kimura
IPC分类号： H04N5/76
CPC分类号： H04N21/4341 , H04N21/2368 , H04N21/4307 , H04N21/84
摘要： A program capable of individually decoding video data and audio data from data storing, mixed together, the video data, the audio data, and attribute data interleaved, wherein an SYS parse routine parses data MXF_D to extract system data SYS; a PIC parse routine parses the data MXF_D to extract video data PIC and decodes the related extracted video data PIC based on system data SYS extracted by the SYS parse routine 61, and an SOU parse routine parses the data MXF_D to extract audio data SOU and decodes the related extracted audio data SOU based on the system data SYS extracted by the SYS parse routine.
摘要翻译：一种程序，其能够从数据存储，混合在一起，视频数据，音频数据和交织的属性数据中分别解码视频数据和音频数据，其中SYS解析程序解析数据MXF_D以提取系统数据SYS; PIC解析程序解析数据MXF_D以提取视频数据PIC，并且基于由SYS解析程序61提取的系统数据SYS解码相关提取的视频数据PIC，并且SOU解析程序解析数据MXF_D以提取音频数据SOU并解码基于通过SYS解析例程提取的系统数据SYS的相关提取的音频数据SOU。

3. 发明申请

US20050232589A1 Information processing apparatus, information processing method, and program and recording medium used therewith 有权
标题翻译：信息处理装置，信息处理方法以及与其一起使用的程序和记录介质
公开(公告)号：US20050232589A1
公开(公告)日：2005-10-20
申请号：US11105650
申请日：2005-04-13
申请人： Shin Kimura , Kazuhisa Tsuchiya , Nobuhiro Sakai , Kazuhiko Watanabe
发明人： Shin Kimura , Kazuhisa Tsuchiya , Nobuhiro Sakai , Kazuhiko Watanabe
IPC分类号： G06F13/10 , G06F3/06 , G06F12/00 , G11B20/10 , G11B27/00 , G11B27/034 , G11B27/11 , G11B27/32 , H04N5/765 , H04N5/783 , H04N5/85
CPC分类号： G06F3/0643 , G06F3/0613 , G06F3/0677 , G11B27/11 , G11B27/329 , H04N5/765 , H04N5/85
摘要： An information processing apparatus is connected to a recording or playback apparatus having a file system. The information processing apparatus includes a receiver for receiving a command provided by an operating system in response to a file operating request from an application, and a converter for converting the command provided by the operating system into a request which is to be converted into a command based on a communication protocol capable of handling the file system in communication with said recording or playback apparatus.
摘要翻译：信息处理装置连接到具有文件系统的记录或重放装置。信息处理装置包括：接收器，用于响应于来自应用的文件操作请求而接收由操作系统提供的命令;以及转换器，用于将由操作系统提供的命令转换为要转换为命令的请求基于能够处理与所述记录或重放装置通信的文件系统的通信协议。

4. 发明申请

US20050076028A1 Program, data processing method, and system of same 失效
标题翻译：程序，数据处理方法和系统
公开(公告)号：US20050076028A1
公开(公告)日：2005-04-07
申请号：US10901804
申请日：2004-07-29
申请人： Shin Kimura
发明人： Shin Kimura
IPC分类号： G06F7/00 , G06F17/00 , G06F17/30 , H04N7/24
CPC分类号： H04N21/435 , H04N21/235 , H04N21/84 , H04N21/85406 , Y10S707/99937
摘要： An MXF parser thread 43 parses data MXF_D, being, mixed together, a plurality of video data PIC, a plurality of audio data SOU, and system data SYS. Then, it generates video file attribute data VFPD concerning the video based on the parsed system data and metadata META and generates video file data VF including the video file attribute data VFPD and the parsed plurality of video data PIC (VIDEO). Further, the audio file data AF is generated too in the same way.
摘要翻译： MXF解析器线程43解析混合在一起的数据MXF_D，多个视频数据PIC，多个音频数据SOU和系统数据SYS。然后，基于解析的系统数据和元数据META生成与视频相关的视频文件属性数据VFPD，并生成包括视频文件属性数据VFPD和解析的多个视频数据PIC（VIDEO）的视频文件数据VF。此外，也以相同的方式生成音频文件数据AF。

5. 发明授权

US06304472B1 Electric power converting system with integrator providing output indicative of current 有权
标题翻译：具有积分器的电力转换系统提供指示电流的输出
公开(公告)号：US06304472B1
公开(公告)日：2001-10-16
申请号：US09570034
申请日：2000-05-12
申请人： Masahiro Nagasu , Shin Kimura , Mutsuhiro Mori , Kiyoshi Nakata , Mutsuhiro Terunuma
发明人： Masahiro Nagasu , Shin Kimura , Mutsuhiro Mori , Kiyoshi Nakata , Mutsuhiro Terunuma
IPC分类号： H02M324
CPC分类号： H02M7/53871 , H01L2224/48091 , H01L2224/48227 , H01L2224/49111 , H02M7/003 , H02M2001/0009 , H01L2924/00014
摘要： In order to detect a current with high accuracy in an electric power converting system, an inductor is connected to a main terminal of a switching element in series, and a voltage generated in both ends of the inductor during switching period is integrated using an integrating circuit to detect the current.
摘要翻译：为了在电力转换系统中高精度地检测电流，将电感器串联连接到开关元件的主端子，并且在开关周期期间在电感器的两端产生的电压使用积分电路检测电流。

6. 发明授权

US06271709B1 Gate drive circuit of voltage drive switching element 有权
标题翻译：电压驱动开关元件的栅极驱动电路
公开(公告)号：US06271709B1
公开(公告)日：2001-08-07
申请号：US09453204
申请日：1999-12-03
申请人： Shin Kimura , Masahiro Nagasu , Satoru Inarida , Hideki Miyazaki , Katsunori Suzuki
发明人： Shin Kimura , Masahiro Nagasu , Satoru Inarida , Hideki Miyazaki , Katsunori Suzuki
IPC分类号： H03K1716
CPC分类号： H03K17/168 , H03K17/163
摘要： A gate drive circuit of a voltage drive switching element, which is characterized by control of di/dt and dv/dt when an IGBT is switched by controlling increases in the switching time and loss of the IGBT, includes a drive means for amplifying a signal for controlling the switching operation of a voltage drive switching device including the IGBT, a means for detecting the gate voltage of the IGBT, a voltage decrease (increase) means for slowly decreasing (increasing) the output voltage when the drive means is turned on (off) in the course of time, and a voltage increase (decrease) means for slowly increasing (decreasing) the output voltage. By switching from the voltage decrease (increase) means to the voltage increase (decrease) means according to the detected value of the gate voltage of the IGBT, di/dt and dv/dt are controlled when the IGBT is turned on (off).
摘要翻译：电压驱动开关元件的栅极驱动电路，其特征在于，通过控制IGBT的切换时间和损耗的切换来切换IGBT时的di / dt和dv / dt的控制，包括用于放大信号的驱动装置用于控制包括IGBT的电压驱动开关装置的切换操作，用于检测IGBT的栅极电压的装置，用于当驱动装置接通时缓慢降低（增加）输出电压的电压降低（增加）装置（关闭），并且电压增加（减小）意味着缓慢增加（降低）输出电压。通过从IGBT的栅极电压的检测值切换到电压降低（增加）装置到电压增加（减小）的手段，当IGBT导通（关闭）时，di / dt和dv / dt被控制。

7. 发明授权

US06204717B1 Semiconductor circuit and semiconductor device for use in equipment such as a power converting apparatus 失效
标题翻译：用于诸如电力转换装置的设备的半导体电路和半导体器件
公开(公告)号：US06204717B1
公开(公告)日：2001-03-20
申请号：US08651875
申请日：1996-05-21
申请人： Masahiro Nagasu , Hideo Kobayashi , Hideki Miyazaki , Shin Kimura , Junichi Sakano , Mutsuhiro Mori
发明人： Masahiro Nagasu , Hideo Kobayashi , Hideki Miyazaki , Shin Kimura , Junichi Sakano , Mutsuhiro Mori
IPC分类号： H03K508
CPC分类号： H01L29/866 , H01L29/0692 , H01L29/0834 , H01L29/7393 , H01L29/7395 , H03K17/08148 , H03K17/0828
摘要： A semiconductor circuit or a semiconductor device has the current-voltage characteristic that, in a blocking-state of the semiconductor circuit or the semiconductor device, a current gently flows for values of a voltage equal to or greater than a first voltage value but equal to or smaller than a second voltage, whereas a current abruptly flows for values of a voltage greater than the second voltage value. Due to the current-voltage characteristic, energy accumulated in an inductance provided within the circuit is consumed by a differential resistance of the semiconductor circuit or a semiconductor, thereby prevent the occurrence of the electromagnetic noise and the excessively large voltage.
摘要翻译：半导体电路或半导体器件具有电流 - 电压特性，在半导体电路或半导体器件的阻挡状态下，电流缓慢地流过等于或大于第一电压值但等于或等于或小于第二电压，而电流突然流过大于第二电压值的电压值。由于电流 - 电压特性，电路中提供的电感中积累的能量被半导体电路或半导体的差分电阻消耗，从而防止电磁噪声的发生和过大的电压。

8. 发明授权

US07647455B2 Information processing apparatus and method, program, and program recording medium 失效
标题翻译：信息处理装置和方法，程序和程序记录介质
公开(公告)号：US07647455B2
公开(公告)日：2010-01-12
申请号：US11105242
申请日：2005-04-13
申请人： Shin Kimura
发明人： Shin Kimura
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F12/0888
摘要： An information processing apparatus for processing an access request to access a recording medium from an application includes the following elements. A setting unit sets a priority unique to the access request from the application or permission information indicating whether or not processing on the access request from the application is permitted. A queue controller stores the access request provided with the priority or the permission information in a queue. An access request processor processes the access request stored in the queue according to the priority or the permission information.
摘要翻译：一种用于处理从应用程序访问记录介质的访问请求的信息处理设备包括以下元件。设置单元设置来自应用的访问请求唯一的优先级或许可信息，该许可信息指示是否允许对来自应用的访问请求进行处理。队列控制器将优先级或权限信息提供的访问请求存储在队列中。访问请求处理器根据优先级或权限信息处理存储在队列中的访问请求。

9. 发明授权

US5731970A Power conversion device and semiconductor module suitable for use in the device 失效
标题翻译：电源转换装置和适用于该装置的半导体模块
公开(公告)号：US5731970A
公开(公告)日：1998-03-24
申请号：US473937
申请日：1995-06-07
申请人： Mutsuhiro Mori , Ryuichi Saito , Shin Kimura , Syuuji Saitoo , Kiyoshi Nakata , Akira Horie , Yoshihiko Koike , Shigeki Sekine
发明人： Mutsuhiro Mori , Ryuichi Saito , Shin Kimura , Syuuji Saitoo , Kiyoshi Nakata , Akira Horie , Yoshihiko Koike , Shigeki Sekine
IPC分类号： H01L23/04 , H01L23/24 , H01L25/07 , H02M7/00 , H02M7/48 , H02M7/487 , H03K17/0814 , H02M7/5387
CPC分类号： H02M7/487 , H01L23/04 , H01L23/24 , H01L24/49 , H01L25/072 , H02M7/003 , H03K17/08148 , H01L2224/45124 , H01L2224/48091 , H01L2224/48227 , H01L2224/49111 , H01L2224/49113 , H01L2224/73265 , H01L24/45 , H01L24/48 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01055 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/12032 , H01L2924/12036 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/19041 , H01L2924/30107 , H01L2924/351 , Y10S257/925
摘要： An inverter device includes plural modules, each module being formed by a series circuit having a parallel circuit of a first switching device and a first diode, and a parallel circuit of a second switching device and a second diode, allowing a reduced size, high reliability, high frequency switching and low noise. Each module forms one arm portion of the inverter. Lifetimes of the diodes and the switching devices are set in a manner to equalize losses in the inverter. Preferably, insulated gate bipolar transistors (IGBTs) formed by diffusion are used as the switching devices since the lifetimes of these devices can easily be adjusted to optimize design of the inverter.
摘要翻译：逆变器装置包括多个模块，每个模块由具有第一开关装置和第一二极管的并联电路的串联电路以及第二开关装置和第二二极管的并联电路形成，允许尺寸减小，可靠性高，高频开关和低噪声。每个模块形成逆变器的一个臂部分。二极管和开关器件的寿命设定为使逆变器的损耗相等。优选地，由扩散形成的绝缘栅双极晶体管（IGBT）用作开关器件，因为这些器件的寿命可以容易地被调整以优化逆变器的设计。

10. 发明授权

US5210479A Drive circuit for an insulated gate transistor having overcurrent detecting and adjusting circuits 失效
标题翻译：具有过流检测和调节电路的绝缘栅晶体管的驱动电路
公开(公告)号：US5210479A
公开(公告)日：1993-05-11
申请号：US390378
申请日：1989-08-07
申请人： Shin Kimura , Norikazu Tokunaga , Nobuyoshi Mutoh , Satoshi Ibori , Shuuji Musha , Yasuo Matsuda , Yutaka Suzuki
发明人： Shin Kimura , Norikazu Tokunaga , Nobuyoshi Mutoh , Satoshi Ibori , Shuuji Musha , Yasuo Matsuda , Yutaka Suzuki
IPC分类号： H01L27/02 , H02P27/08 , H03K17/082 , H03K17/567
CPC分类号： H02P27/08 , H01L27/0248 , H03K17/0828 , H03K17/567
摘要： An ON holding circuit is provided which outputs a signal which identifies an ON state of an insulated gate transistor to a gate voltage input circuit, and inhibits the gate voltage input circuit from being responsive to an input signal which identifies an OFF state of the insulated gate transistor when an overcurrent adjusting circuit operates continuously.

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