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1. 发明申请

US20130088624A1 HIGH DYNAMIC RANGE SUB-SAMPLING ARCHITECTURE 有权
标题翻译：高动态范围子采样架构
公开(公告)号：US20130088624A1
公开(公告)日：2013-04-11
申请号：US13365766
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu , Xiaodong Luo , Donghui Wu
发明人： Yaowu Mo , Chen Xu , Min Qu , Xiaodong Luo , Donghui Wu
IPC分类号： H04N5/335
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： A method of implementing high dynamic range bin algorithm in an image sensor including a pixel array with a first super row having a first integration time and a second super row having a second integration time is described. The method starts by reading out image data from the first super row into a counter. Image data from the first super row is multiplied by a factor to obtain multiplied data. The factor is a ratio between the first and the second integration times. The multiplied data is then compared with a predetermined data. The image data from the second super row is readout into the counter. If the multiplied data is larger than the predetermined data, the multiplied data from the first super row is stored in the counter. If not, the image data from the second super row is stored. Other embodiments are also described.
摘要翻译：描述了在包括具有第一积分时间的第一超级行的像素阵列和具有第二积分时间的第二超级行的图像传感器中实现高动态范围bin算法的方法。该方法从将第一超级行的图像数据读出到计数器开始。来自第一超级行的图像数据乘以因子以获得相乘的数据。因子是第一和第二积分时间之间的比率。然后将相乘的数据与预定数据进行比较。来自第二超级行的图像数据被读出到计数器中。如果相乘数据大于预定数据，则来自第一超级行的相乘数据被存储在计数器中。如果没有，则存储来自第二超级行的图像数据。还描述了其它实施例。

2. 发明授权

US08599284B2 High dynamic range sub-sampling architecture 有权
标题翻译：高动态范围子采样架构
公开(公告)号：US08599284B2
公开(公告)日：2013-12-03
申请号：US13365766
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu , Xiaodong Luo , Donghui Wu
发明人： Yaowu Mo , Chen Xu , Min Qu , Xiaodong Luo , Donghui Wu
IPC分类号： H04N5/235 , H04N5/225 , H04N5/335
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： A method of implementing high dynamic range bin algorithm in an image sensor including a pixel array with a first super row having a first integration time and a second super row having a second integration time is described. The method starts by reading out image data from the first super row into a counter. Image data from the first super row is multiplied by a factor to obtain multiplied data. The factor is a ratio between the first and the second integration times. The multiplied data is then compared with a predetermined data. The image data from the second super row is readout into the counter. If the multiplied data is larger than the predetermined data, the multiplied data from the first super row is stored in the counter. If not, the image data from the second super row is stored. Other embodiments are also described.
摘要翻译：描述了在包括具有第一积分时间的第一超级行的像素阵列和具有第二积分时间的第二超级行的图像传感器中实现高动态范围bin算法的方法。该方法从将第一超级行的图像数据读出到计数器开始。来自第一超级行的图像数据乘以因子以获得相乘的数据。因子是第一和第二积分时间之间的比率。然后将相乘的数据与预定数据进行比较。来自第二超级行的图像数据被读出到计数器中。如果相乘数据大于预定数据，则来自第一超级行的相乘数据被存储在计数器中。如果没有，则存储来自第二超级行的图像数据。还描述了其它实施例。

3. 发明申请

US20130089175A1 ARITHMETIC COUNTER CIRCUIT, CONFIGURATION AND APPLICATION FOR HIGH PERFORMANCE CMOS IMAGE SENSORS 有权
标题翻译：算术计数器电路，高性能CMOS图像传感器的配置和应用
公开(公告)号：US20130089175A1
公开(公告)日：2013-04-11
申请号：US13365790
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu , Tiejun Dai , Rui Wang , Xiaodong Luo
发明人： Yaowu Mo , Chen Xu , Min Qu , Tiejun Dai , Rui Wang , Xiaodong Luo
IPC分类号： H03K29/00
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of multiplexers. Each of the plurality of flip-flops is coupled to be in one of a toggle state, a keep state, a reset state or a set state based on inputs received from the plurality of multiplexers. Other embodiments are described.
摘要翻译：用于高性能CMOS图像传感器的算术计数器电路包括多个计数器级的多个触发器，并且多个计数器级的多个多路复用器耦合到多个触发器。多个多路复用器中的每一个被耦合以接收包括切换信号，保持信号，移位使能信号或模式信号中的至少一个的控制信号。控制信号选择多个多路复用器中的每一个的输出。多个触发器中的每一个基于从多个多路复用器接收的输入被耦合成处于切换状态，保持状态，复位状态或设置状态之一。描述其他实施例。

4. 发明授权

US08576979B2 Arithmetic counter circuit, configuration and application for high performance CMOS image sensors 有权
标题翻译：算术计数器电路，高性能CMOS图像传感器的配置和应用
公开(公告)号：US08576979B2
公开(公告)日：2013-11-05
申请号：US13365790
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu , Tiejun Dai , Rui Wang , Xiaodong Luo
发明人： Yaowu Mo , Chen Xu , Min Qu , Tiejun Dai , Rui Wang , Xiaodong Luo
IPC分类号： H03K23/64 , H03K21/02 , H03K21/00 , H03K23/00
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： An arithmetic counter circuit for high performance CMOS image sensors includes a plurality of flip-flops of a plurality of counter stages and a plurality of multiplexers of the plurality of counter stages being coupled to the plurality of flip-flops. Each of the plurality of multiplexers coupled to receive control signals including at least one of a toggle signal, a keep signal, a shift enable signal, or a mode signal. The control signals select the output of each of the plurality of multiplexers. Each of the plurality of flip-flops is coupled to be in one of a toggle state, a keep state, a reset state or a set state based on inputs received from the plurality of multiplexers. Other embodiments are described.
摘要翻译：用于高性能CMOS图像传感器的算术计数器电路包括多个计数器级的多个触发器，并且多个计数器级的多个多路复用器耦合到多个触发器。多个多路复用器中的每一个被耦合以接收包括切换信号，保持信号，移位使能信号或模式信号中的至少一个的控制信号。控制信号选择多个多路复用器中的每一个的输出。多个触发器中的每一个基于从多个多路复用器接收的输入被耦合成处于切换状态，保持状态，复位状态或设置状态之一。描述其他实施例。

5. 发明授权

US08809759B2 Multiple-row concurrent readout scheme for high-speed CMOS image sensor with backside illumination 有权
标题翻译：具有背面照明的高速CMOS图像传感器的多行并发读取方案
公开(公告)号：US08809759B2
公开(公告)日：2014-08-19
申请号：US13365746
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu
发明人： Yaowu Mo , Chen Xu , Min Qu
IPC分类号： H04N3/14 , H04N5/353 , H04N5/3745 , H04N5/378 , H04N5/355 , H04N5/347
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： A system, method and apparatus implementing a multiple-row concurrent readout scheme for high-speed CMOS image sensor with backside illumination are described herein. In one embodiment, the method of operating an image sensor starts acquiring image data within a color pixel array and the image data from a first set of multiple rows in the color pixel array is then concurrently readout. Concurrently reading out the image data from the first set of multiple rows includes concurrently selecting a first portion of the image data from the first set by first readout circuitry and a second portion of the image data from the first set by second readout circuitry. The first and second portions of the image data from the first set are different and the first and second readout circuitries are also different. Other embodiments are also described.
摘要翻译：这里描述了实现具有背面照明的高速CMOS图像传感器的多行并行读出方案的系统，方法和装置。在一个实施例中，操作图像传感器的方法开始获取彩色像素阵列内的图像数据，然后同时读出来自彩色像素阵列中的第一组多行的图像数据。同时从第一组多行读出图像数据包括由第一读出电路同时从第一组中选择图像数据的第一部分，以及通过第二读出电路从第一组中选择图像数据的第二部分。来自第一组的图像数据的第一和第二部分是不同的，并且第一和第二读出电路也不同。还描述了其它实施例。

6. 发明申请

US20130087683A1 MULTIPLE-ROW CONCURRENT READOUT SCHEME FOR HIGH-SPEED CMOS IMAGE SENSOR WITH BACKSIDE ILLUMINATION 有权
标题翻译：具有背光照明功能的高速CMOS图像传感器的多路并流读出方案
公开(公告)号：US20130087683A1
公开(公告)日：2013-04-11
申请号：US13365746
申请日：2012-02-03
申请人： Yaowu Mo , Chen Xu , Min Qu
发明人： Yaowu Mo , Chen Xu , Min Qu
IPC分类号： H01L27/148 , H01L27/146
CPC分类号： H04N5/347 , H04N5/3532 , H04N5/355 , H04N5/3745 , H04N5/378
摘要： A system, method and apparatus implementing a multiple-row concurrent readout scheme for high-speed CMOS image sensor with backside illumination are described herein. In one embodiment, the method of operating an image sensor starts acquiring image data within a color pixel array and the image data from a first set of multiple rows in the color pixel array is then concurrently readout. Concurrently reading out the image data from the first set of multiple rows includes concurrently selecting a first portion of the image data from the first set by first readout circuitry and a second portion of the image data from the first set by second readout circuitry. The first and second portions of the image data from the first set are different and the first and second readout circuitries are also different. Other embodiments are also described.
摘要翻译：这里描述了实现具有背面照明的高速CMOS图像传感器的多行并行读出方案的系统，方法和装置。在一个实施例中，操作图像传感器的方法开始获取彩色像素阵列内的图像数据，然后同时读出来自彩色像素阵列中的第一组多行的图像数据。同时从第一组多行读出图像数据包括由第一读出电路同时从第一组中选择图像数据的第一部分，以及通过第二读出电路从第一组中选择图像数据的第二部分。来自第一组的图像数据的第一和第二部分是不同的，并且第一和第二读出电路也不同。还描述了其它实施例。

7. 发明授权

US08405747B2 Analog row black level calibration for CMOS image sensor 有权
标题翻译： CMOS图像传感器的模拟行黑电平校准
公开(公告)号：US08405747B2
公开(公告)日：2013-03-26
申请号：US13029905
申请日：2011-02-17
申请人： Yaowu Mo , Chen Xu
发明人： Yaowu Mo , Chen Xu
IPC分类号： H04N9/64 , G03F3/08
CPC分类号： H04N5/361 , H04N5/3658 , H04N5/378
摘要： A CMOS image sensor includes an image pixel array, a dark pixel array, data bit liens, reference bit lines, a driver, comparators, and analog-to-digital converter (“ADC”) circuits. The image pixel array generates analog image signals in response to incident light. The dark pixel array generates analog black reference signals for analog black level calibration of the analog image signals. In one embodiment, the data bit lines each coupled to a different column of image pixels of the image pixel array and the reference bit lines each coupled to a different column of black reference pixels within the dark pixel array. The driver is coupled to the reference bit lines to drive an analog black reference signal. The comparators each couple to one of the data bit lines and each coupled to an output of the driver and offset the analog image signals with the analog black reference signals in an analog domain. The ADC circuits each coupled to an output of a comparator.
摘要翻译： CMOS图像传感器包括图像像素阵列，暗像素阵列，数据位留置，参考位线，驱动器，比较器和模数转换器（ADC）电路。图像像素阵列响应于入射光产生模拟图像信号。暗像素阵列产生用于模拟图像信号的模拟黑电平校准的模拟黑参考信号。在一个实施例中，每个耦合到图像像素阵列的不同列的图像像素的数据位线和每个耦合到暗像素阵列内的不同列的黑色参考像素的参考位线。驱动器耦合到参考位线以驱动模拟黑色参考信号。比较器每个耦合到数据位线中的一个，并且每个耦合到驱动器的输出，并且以模拟域中的模拟黑色参考信号偏移模拟图像信号。 ADC电路各自耦合到比较器的输出端。

8. 发明授权

US08390712B2 Image sensing pixels with feedback loops for imaging systems 有权
标题翻译：具有用于成像系统的反馈回路的图像感测像素
公开(公告)号：US08390712B2
公开(公告)日：2013-03-05
申请号：US12963525
申请日：2010-12-08
申请人： Chen Xu , Yaowu Mo
发明人： Chen Xu , Yaowu Mo
IPC分类号： H04N3/14 , H01L27/00
CPC分类号： H04N5/3745 , H01L27/14609
摘要： An imaging system may include an image sensor array formed from imaging pixels with feedback loops. Each imaging pixel may include an amplifier transistor that is controlled by a voltage on a floating diffusion node and may include a feedback transistor connected between the floating diffusion node and column readout circuitry. The amplifier transistor, together with a current source in the image sensor array, may form a common-source amplifier that inversely amplifies the voltage on the floating diffusion node and provides control signals to the feedback transistor. The common-source amplifier and the feedback transistor may create a feedback loop during image readout operations and during image reset operations that clamps the voltage on the floating diffusion node.
摘要翻译：成像系统可以包括由具有反馈回路的成像像素形成的图像传感器阵列。每个成像像素可以包括由浮动扩散节点上的电压控制的放大器晶体管，并且可以包括连接在浮动扩散节点和列读出电路之间的反馈晶体管。放大器晶体管与图像传感器阵列中的电流源一起可以形成公共源放大器，其反向放大浮动扩散节点上的电压并向反馈晶体管提供控制信号。共源放大器和反馈晶体管可以在图像读出操作期间和在将浮动扩散节点上的电压钳位的图像复位操作期间产生反馈回路。

9. 发明申请

US20120212657A1 ANALOG ROW BLACK LEVEL CALIBRATION FOR CMOS IMAGE SENSOR 有权
标题翻译： CMOS图像传感器的模拟黑色水平校准
公开(公告)号：US20120212657A1
公开(公告)日：2012-08-23
申请号：US13029905
申请日：2011-02-17
申请人： Yaowu Mo , Chen Xu
发明人： Yaowu Mo , Chen Xu
IPC分类号： H04N5/335
CPC分类号： H04N5/361 , H04N5/3658 , H04N5/378
摘要： A CMOS image sensor includes an image pixel array, a dark pixel array, data bit liens, reference bit lines, a driver, comparators, and analog-to-digital converter (“ADC”) circuits. The image pixel array generates analog image signals in response to incident light. The dark pixel array generates analog black reference signals for analog black level calibration of the analog image signals. In one embodiment, the data bit lines each coupled to a different column of image pixels of the image pixel array and the reference bit lines each coupled to a different column of black reference pixels within the dark pixel array. The driver is coupled to the reference bit lines to drive an analog black reference signal. The comparators each couple to one of the data bit lines and each coupled to an output of the driver and offset the analog image signals with the analog black reference signals in an analog domain. The ADC circuits each coupled to an output of a comparator.
摘要翻译： CMOS图像传感器包括图像像素阵列，暗像素阵列，数据位留置，参考位线，驱动器，比较器和模数转换器（“ADC”）电路。图像像素阵列响应于入射光产生模拟图像信号。暗像素阵列产生用于模拟图像信号的模拟黑电平校准的模拟黑参考信号。在一个实施例中，每个耦合到图像像素阵列的不同列的图像像素的数据位线和每个耦合到暗像素阵列内的不同列的黑色参考像素的参考位线。驱动器耦合到参考位线以驱动模拟黑色参考信号。比较器每个耦合到数据位线中的一个，并且每个耦合到驱动器的输出，并且以模拟域中的模拟黑色参考信号偏移模拟图像信号。 ADC电路各自耦合到比较器的输出端。

10. 发明授权

US08077227B2 Method and apparatus providing analog row noise correction and hot pixel filtering 有权
标题翻译：提供模拟行噪声校正和热像素滤波的方法和装置
公开(公告)号：US08077227B2
公开(公告)日：2011-12-13
申请号：US12114354
申请日：2008-05-02
申请人： Yaowu Mo , Chen Xu
发明人： Yaowu Mo , Chen Xu
IPC分类号： H04N9/64 , H04N5/217
CPC分类号： H04N5/37457 , H04N5/3559 , H04N5/361 , H04N5/367
摘要： An imaging device and method for operating the device. The imaging device comprises a pixel array that comprises a plurality of imaging pixels and dark reference pixels arranged in columns and rows. The dark reference pixels produce a noise signal that is subtracted from a pixel signal produced by the imaging pixels to correct row noise. In addition, the imaging device may comprise a hot pixel filtering circuit that blocks the output from hot pixels.
摘要翻译：一种用于操作该装置的成像装置和方法。成像装置包括像素阵列，其包括以列和行排列的多个成像像素和暗参考像素。暗参考像素产生从由成像像素产生的像素信号中减去的噪声信号，以校正行噪声。此外，成像装置可以包括阻止热像素的输出的热像素滤波电路。

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