会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 3. 发明授权
    • Fabricating method of thin film transistor array substrate
    • 薄膜晶体管阵列基板的制造方法
    • US07968367B2
    • 2011-06-28
    • US12854914
    • 2010-08-12
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • H01L21/00H01L21/84H01L21/8238
    • H01L27/124G02F1/136213G02F1/136227G02F2201/40H01L27/1255
    • A fabricating method of a TFT array substrate includes following steps: providing a substrate having a pixel region and a bonding pad region surrounding the pixel region; forming a patterned polysilicon layer within the pixel region on the substrate; forming a first patterned insulating layer to cover the patterned polysilicon layer; forming a first patterned transparent conductive layer on the first patterned insulating layer; forming a first metal layer on the first patterned transparent conductive layer; forming a second patterned insulating layer to cover the first metal layer; forming a second patterned transparent conductive layer on the second patterned insulating layer; forming a second metal layer on the second patterned transparent conductive layer; forming a third patterned insulating layer to cover the second metal layer; and forming a third patterned transparent conductive layer on the third patterned insulating layer.
    • TFT阵列基板的制造方法包括以下步骤:提供具有像素区域的基板和围绕像素区域的焊盘区域; 在所述衬底上的像素区域内形成图案化多晶硅层; 形成第一图案化绝缘层以覆盖图案化的多晶硅层; 在所述第一图案化绝缘层上形成第一图案化的透明导电层; 在第一图案化的透明导电层上形成第一金属层; 形成第二图案化绝缘层以覆盖所述第一金属层; 在所述第二图案化绝缘层上形成第二图案化透明导电层; 在所述第二图案化的透明导电层上形成第二金属层; 形成第三图案化绝缘层以覆盖所述第二金属层; 以及在所述第三图案化绝缘层上形成第三图案化透明导电层。
    • 4. 发明授权
    • Thin film transistor array substrate
    • 薄膜晶体管阵列基板
    • US07812352B2
    • 2010-10-12
    • US12396492
    • 2009-03-03
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • H01L29/04H01L31/036H01L31/20H01L31/062H01L27/01
    • H01L27/124G02F1/136213G02F1/136227G02F2201/40H01L27/1255
    • A TFT array substrate is disclosed. In the pixel structure of the TFT array substrate, patterned transparent conductive layers are disposed under a first metal layer (M1) and a second metal layer (M2) and most areas of the M1 and M2 are substituted by the patterned transparent conductive layers. So, the pixel structure has high aperture ratio and large storage capacitance. Besides, a scan bonding pad on the TFT array substrate includes a first patterned transparent conductive layer (T1), the M1 and a third patterned transparent conductive layer (T3). The M1 is disposed on the T1, and the T3 is electrically connected to the T1 via a contact hole in the M1. So, the contact resistance of the scan bonding pad is small. The data bonding pad on the TFT array substrate has similar design. Moreover, fabricating methods of TFT array substrates are also provided.
    • 公开了TFT阵列基板。 在TFT阵列基板的像素结构中,图案化的透明导电层设置在第一金属层(M1)和第二金属层(M2)的下方,M1和M2的大部分区域被图案化的透明导电层所取代。 因此,像素结构具有高开口率和大的存储电容。 此外,TFT阵列基板上的扫描焊盘包括第一图案化透明导电层(T1),M1和第三图案化透明导电层(T3)。 M1设置在T1上,T3通过M1中的接触孔与T1电连接。 因此,扫描焊盘的接触电阻很小。 TFT阵列基板上的数据接合焊盘具有相似的设计。 此外,还提供了TFT阵列基板的制造方法。
    • 5. 发明授权
    • Pixel structure
    • 像素结构
    • US08208113B2
    • 2012-06-26
    • US12690324
    • 2010-01-20
    • Chih-Chieh WangYao-Hong ChienXin-Xin LinLi-Shan ChenXuan-Yu Liu
    • Chih-Chieh WangYao-Hong ChienXin-Xin LinLi-Shan ChenXuan-Yu Liu
    • G02F1/1343
    • G02F1/1395G02F1/134336
    • A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.
    • 提供了包括衬底,扫描线,数据线,公共线,有源器件,像素电极,钝化层和过渡辅助电极的像素结构。 基板上的扫描线和数据线彼此相交以限定像素区域。 基板上的公共线与扫描线平行。 设置在像素区域内的有源器件电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻,并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。
    • 6. 发明申请
    • FABRICATING METHOD OF THIN FILM TRANSISTOR ARRAY SUBSTRATE
    • 薄膜晶体管阵列基板的制作方法
    • US20100304525A1
    • 2010-12-02
    • US12854914
    • 2010-08-12
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • H01L21/8234
    • H01L27/124G02F1/136213G02F1/136227G02F2201/40H01L27/1255
    • A fabricating method of a TFT array substrate includes following steps: providing a substrate having a pixel region and a bonding pad region surrounding the pixel region; forming a patterned polysilicon layer within the pixel region on the substrate; forming a first patterned insulating layer to cover the patterned polysilicon layer; forming a first patterned transparent conductive layer on the first patterned insulating layer; forming a first metal layer on the first patterned transparent conductive layer; forming a second patterned insulating layer to cover the first metal layer; forming a second patterned transparent conductive layer on the second patterned insulating layer; forming a second metal layer on the second patterned transparent conductive layer; forming a third patterned insulating layer to cover the second metal layer; and forming a third patterned transparent conductive layer on the third patterned insulating layer.
    • TFT阵列基板的制造方法包括以下步骤:提供具有像素区域的基板和围绕像素区域的焊盘区域; 在所述衬底上的像素区域内形成图案化多晶硅层; 形成第一图案化绝缘层以覆盖图案化的多晶硅层; 在所述第一图案化绝缘层上形成第一图案化的透明导电层; 在第一图案化的透明导电层上形成第一金属层; 形成第二图案化绝缘层以覆盖所述第一金属层; 在所述第二图案化绝缘层上形成第二图案化透明导电层; 在所述第二图案化的透明导电层上形成第二金属层; 形成第三图案化绝缘层以覆盖所述第二金属层; 以及在所述第三图案化绝缘层上形成第三图案化透明导电层。
    • 7. 发明授权
    • Pixel structure and liquid crystal display panel using the same
    • 像素结构和液晶显示面板使用相同
    • US07684000B2
    • 2010-03-23
    • US11608379
    • 2006-12-08
    • Chih-Chieh WangYao-Hong ChienXin-Xin LinLi-Shan ChenXuan-Yu Liu
    • Chih-Chieh WangYao-Hong ChienXin-Xin LinLi-Shan ChenXuan-Yu Liu
    • G02F1/1343
    • G02F1/1395G02F1/134336
    • A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.
    • 提供了包括衬底,扫描线,数据线,公共线,有源器件,像素电极,钝化层和过渡辅助电极的像素结构。 基板上的扫描线和数据线彼此相交以限定像素区域。 基板上的公共线与扫描线平行。 设置在像素区域内的有源器件电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻,并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。
    • 8. 发明申请
    • THIN FILM TRANSISTOR ARRAY SUBSTRATE AND FABRICATING METHOD THEREOF
    • 薄膜晶体管阵列基板及其制造方法
    • US20100001286A1
    • 2010-01-07
    • US12396492
    • 2009-03-03
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • Yao-Hong ChienChih-Chieh WangXuan-Yu LiuLi-Shan Chen
    • H01L31/036H01L21/70
    • H01L27/124G02F1/136213G02F1/136227G02F2201/40H01L27/1255
    • A TFT array substrate is disclosed. In the pixel structure of the TFT array substrate, patterned transparent conductive layers are disposed under a first metal layer (M1) and a second metal layer (M2) and most areas of the M1 and M2 are substituted by the patterned transparent conductive layers. So, the pixel structure has high aperture ratio and large storage capacitance. Besides, a scan bonding pad on the TFT array substrate includes a first patterned transparent conductive layer (T1), the M1 and a third patterned transparent conductive layer (T3). The M1 is disposed on the T1, and the T3 is electrically connected to the T1 via a contact hole in the M1. So, the contact resistance of the scan bonding pad is small. The data bonding pad on the TFT array substrate has similar design. Moreover, fabricating methods of TFT array substrates are also provided.
    • 公开了TFT阵列基板。 在TFT阵列基板的像素结构中,图案化的透明导电层设置在第一金属层(M1)和第二金属层(M2)的下方,M1和M2的大部分区域被图案化的透明导电层所取代。 因此,像素结构具有高开口率和大的存储电容。 此外,TFT阵列基板上的扫描焊盘包括第一图案化透明导电层(T1),M1和第三图案化透明导电层(T3)。 M1设置在T1上,T3通过M1中的接触孔与T1电连接。 因此,扫描焊盘的接触电阻很小。 TFT阵列基板上的数据接合焊盘具有相似的设计。 此外,还提供了TFT阵列基板的制造方法。
    • 9. 发明申请
    • PIXEL STRUCTURE AND LIQUID CRYSTAL DISPLAY PANEL USING THE SAME
    • 像素结构和液晶显示面板使用相同
    • US20080084529A1
    • 2008-04-10
    • US11608379
    • 2006-12-08
    • Chih-Chieh WangYao-Hong ChienXin-Xin LinLi-Shan ChenXuan-Yu Liu
    • Chih-Chieh WangYao-Hong ChienXin-Xin LinLi-Shan ChenXuan-Yu Liu
    • G02F1/1343
    • G02F1/1395G02F1/134336
    • A pixel structure including a substrate, a scan line, a data line, a common line, an active device, a pixel electrode, a passivation layer and a transition auxiliary electrode is provided. The scan line and the data line on the substrate intersect with each other to define a pixel region. The common line on the substrate is parallel to the scan line. The active device disposed within the pixel region is electrically connected to the scan line and the data line. The pixel electrode disposed within the pixel region is electrically connected to the active device. The passivation layer is between the data line and the pixel electrode. The transition auxiliary electrode is adjacent to the periphery of the pixel electrode and electrically connected to the common line through a contact hole of the passivation layer. The transition auxiliary electrode and the pixel electrode are made of the same film.
    • 提供了包括衬底,扫描线,数据线,公共线,有源器件,像素电极,钝化层和过渡辅助电极的像素结构。 基板上的扫描线和数据线彼此相交以限定像素区域。 基板上的公共线与扫描线平行。 设置在像素区域内的有源器件电连接到扫描线和数据线。 设置在像素区域内的像素电极与有源器件电连接。 钝化层位于数据线和像素电极之间。 过渡辅助电极与像素电极的周边相邻,并通过钝化层的接触孔与公共线电连接。 过渡辅助电极和像素电极由相同的膜制成。