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    • 2. 发明申请
    • POWER SWITCH CONTROL BETWEEN USB AND WIRELESS POWER SYSTEM
    • USB和无线电源系统之间的电源开关控制
    • US20160094226A1
    • 2016-03-31
    • US14565395
    • 2014-12-09
    • Yang WangJie JinJianzhou Wu
    • Yang WangJie JinJianzhou Wu
    • H03K19/0175H03K5/125
    • H03K19/017509H02J7/0036H02J9/061H02J50/10H02J2007/0062H03K5/125
    • An electrical system can selectively power a load via a USB connection or via another power source, such as a wireless power transfer path. An integrated switch controller determines whether to power the load via the USB connection or the other power sources and controls two external transistors via a single I/O pin connection to implement that determination. The switch controller determines the greater of two voltages: a voltage associated with the USB connection and a voltage associated with the other power source. The switch controller also determines whether there is a valid USB connection. The switch controller circuitry that controls the two external transistors is powered at the greater voltage to ensure that the external transistors are appropriately and securely turned on or off.
    • 电气系统可以经由USB连接或经由诸如无线电力传输路径的另一电源来选择性地为负载供电。 集成开关控制器确定是否通过USB连接或其他电源为负载供电,并通过单个I / O引脚连接来控制两个外部晶体管,以实现该确定。 开关控制器确定两个电压中较大的一个:与USB连接相关的电压和与另一个电源相关联的电压。 开关控制器还确定是否存在有效的USB连接。 控制两个外部晶体管的开关控制器电路以更大的电压供电,以确保外部晶体管被适当和可靠地导通或关断。
    • 4. 发明申请
    • BAND GAP REFERENCE VOLTAGE GENERATOR
    • 带隙参考电压发生器
    • US20140070777A1
    • 2014-03-13
    • US13714415
    • 2012-12-14
    • Jianzhou WuYang Wang
    • Jianzhou WuYang Wang
    • G05F1/10
    • G05F1/10G05F3/30Y10T29/41
    • A band gap reference voltage generator has first and second current conduction paths between a first node and a second node. The first current conduction path has first resistive elements in series with a first forward-biased PN junction element. A tap is connected selectively to the first resistive elements through switches that are controllable to select a voltage divider ratio at the tap. The second current conduction path includes a second resistive element in series with a second PN junction element of greater current density than the first PN junction. A voltage error amplifier has inputs connected to the tap and the second PN junction element, and an output for providing a thermally compensated output voltage VREF. A feedback path applies the output voltage VREF through a third resistive element to the first node.
    • 带隙基准电压发生器在第一节点和第二节点之间具有第一和第二电流传导路径。 第一电流传导路径具有与第一正向偏置PN结元件串联的第一电阻元件。 抽头通过可控制以在抽头上选择分压比的开关选择性地连接到第一电阻元件。 第二电流传导路径包括与第一PN结相比具有比第一PN结更大的电流密度的第二PN结元件串联的第二电阻元件。 电压误差放大器具有连接到抽头和第二PN结元件的输入,以及用于提供热补偿输出电压VREF的输出。 反馈路径将输出电压VREF通过第三电阻元件施加到第一节点。
    • 6. 发明申请
    • RAIL TO RAIL DIFFERENTIAL BUFFER INPUT STAGE
    • RAIL到RAIL差分缓冲器输入级
    • US20140139267A1
    • 2014-05-22
    • US13716194
    • 2012-12-16
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • H03K3/00
    • H03F3/45183H03F2200/513
    • A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.
    • 轨到轨差分缓冲器输入级包括以电压跟随器配置连接到电源轨的n型和p型输入差分晶体管对。 参考电压发生器包括相对于共模输入电压产生动态参考电压的参考差分晶体管对。 虚拟的n型和p型晶体管对具有与输入差分对并联连接的电流传导路径,并且由动态参考电压控制,以在共模时将供电轨电流转移离开并停用相关输入差分对中的一个 输入电压比动态参考电压进一步远离阈值。 当共模输入电压比阈值更接近于动态参考电压VB时,这两个虚拟对导通并且两个输入差分对被激活,使得缓冲器输入级的整个跨导保持恒定。
    • 7. 发明授权
    • Band gap reference voltage generator
    • 带隙参考电压发生器
    • US08922190B2
    • 2014-12-30
    • US13714415
    • 2012-12-14
    • Jianzhou WuYang Wang
    • Jianzhou WuYang Wang
    • G05F3/30G05F1/10G05F3/26
    • G05F1/10G05F3/30Y10T29/41
    • A band gap reference voltage generator has first and second current conduction paths between a first node and a second node. The first current conduction path has first resistive elements in series with a first forward-biased PN junction element. A tap is connected selectively to the first resistive elements through switches that are controllable to select a voltage divider ratio at the tap. The second current conduction path includes a second resistive element in series with a second PN junction element of greater current density than the first PN junction. A voltage error amplifier has inputs connected to the tap and the second PN junction element, and an output for providing a thermally compensated output voltage VREF. A feedback path applies the output voltage VREF through a third resistive element to the first node.
    • 带隙基准电压发生器在第一节点和第二节点之间具有第一和第二电流传导路径。 第一电流传导路径具有与第一正向偏置PN结元件串联的第一电阻元件。 抽头通过可控制以在抽头上选择分压比的开关选择性地连接到第一电阻元件。 第二电流传导路径包括与第一PN结相比具有比第一PN结更大的电流密度的第二PN结元件串联的第二电阻元件。 电压误差放大器具有连接到抽头和第二PN结元件的输入,以及用于提供热补偿输出电压VREF的输出。 反馈路径将输出电压VREF通过第三电阻元件施加到第一节点。
    • 8. 发明授权
    • Rail to rail differential buffer input stage
    • 轨到轨差动缓冲器输入级
    • US08773174B2
    • 2014-07-08
    • US13716194
    • 2012-12-16
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • H03B1/00H03K3/00
    • H03F3/45183H03F2200/513
    • A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.
    • 轨到轨差分缓冲器输入级包括以电压跟随器配置连接到电源轨的n型和p型输入差分晶体管对。 参考电压发生器包括相对于共模输入电压产生动态参考电压的参考差分晶体管对。 虚拟的n型和p型晶体管对具有与输入差分对并联连接的电流传导路径,并且由动态参考电压控制,以在共模时将供电轨电流转移离开并停用相关输入差分对中的一个 输入电压比动态参考电压进一步远离阈值。 当共模输入电压比阈值更接近于动态参考电压VB时,这两个虚拟对导通并且两个输入差分对被激活,使得缓冲器输入级的整个跨导保持恒定。
    • 10. 发明申请
    • Gas generating composition
    • 气体组成
    • US20050127324A1
    • 2005-06-16
    • US10968892
    • 2004-10-21
    • Jianzhou Wu
    • Jianzhou Wu
    • C06B23/04C06D5/06C01B21/00
    • C06B23/04C06D5/06
    • A gas generating composition, in which a combustion temperature is low and the generation amounts of carbon monoxide, ammonia, and nitrogen oxide after combustion is suppressed, comprises the following components (a) to (c) and, based on necessity, further comprises the components selected from the following components (d) to (f): (a) an organic compound as fuel, (b) an oxygen-containing oxidizing agent, (c) magnesium hydroxide or a mixture of magnesium hydroxide and aluminum hydroxide, (d) a binder, (e) an additive selected from metal oxides and metal carbonates, and (f) silicon dioxide having a specific surface area of 100 to 500 m2/g.
    • 燃烧温度低,燃烧后的一氧化碳,氨,氮氧化物的产生量被抑制的气体发生剂组合物包含以下成分(a)〜(c),根据需要,还可以含有 选自以下组分(d)至(f)的组分:(a)作为燃​​料的有机化合物,(b)含氧氧化剂,(c)氢氧化镁或氢氧化镁和氢氧化铝的混合物,(d )粘合剂,(e)选自金属氧化物和金属碳酸盐的添加剂,和(f)比表面积为100-500m 2 / g的二氧化硅。