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    • 1. 发明申请
    • RAIL TO RAIL DIFFERENTIAL BUFFER INPUT STAGE
    • RAIL到RAIL差分缓冲器输入级
    • US20140139267A1
    • 2014-05-22
    • US13716194
    • 2012-12-16
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • H03K3/00
    • H03F3/45183H03F2200/513
    • A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.
    • 轨到轨差分缓冲器输入级包括以电压跟随器配置连接到电源轨的n型和p型输入差分晶体管对。 参考电压发生器包括相对于共模输入电压产生动态参考电压的参考差分晶体管对。 虚拟的n型和p型晶体管对具有与输入差分对并联连接的电流传导路径,并且由动态参考电压控制,以在共模时将供电轨电流转移离开并停用相关输入差分对中的一个 输入电压比动态参考电压进一步远离阈值。 当共模输入电压比阈值更接近于动态参考电压VB时,这两个虚拟对导通并且两个输入差分对被激活,使得缓冲器输入级的整个跨导保持恒定。
    • 2. 发明授权
    • Rail to rail differential buffer input stage
    • 轨到轨差动缓冲器输入级
    • US08773174B2
    • 2014-07-08
    • US13716194
    • 2012-12-16
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • Yang WangJianzhou WuXiuqiang XuYizhong Zhang
    • H03B1/00H03K3/00
    • H03F3/45183H03F2200/513
    • A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.
    • 轨到轨差分缓冲器输入级包括以电压跟随器配置连接到电源轨的n型和p型输入差分晶体管对。 参考电压发生器包括相对于共模输入电压产生动态参考电压的参考差分晶体管对。 虚拟的n型和p型晶体管对具有与输入差分对并联连接的电流传导路径,并且由动态参考电压控制,以在共模时将供电轨电流转移离开并停用相关输入差分对中的一个 输入电压比动态参考电压进一步远离阈值。 当共模输入电压比阈值更接近于动态参考电压VB时,这两个虚拟对导通并且两个输入差分对被激活,使得缓冲器输入级的整个跨导保持恒定。