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1. 发明授权

US07016225B2 Four-bit non-volatile memory transistor and array 失效
标题翻译：四位非易失性存储晶体管和阵列
公开(公告)号：US07016225B2
公开(公告)日：2006-03-21
申请号：US10305403
申请日：2002-11-26
申请人： Yakov Roizin , Micha Gutman , Shimon Greenberg , Alfred Yankelevich
发明人： Yakov Roizin , Micha Gutman , Shimon Greenberg , Alfred Yankelevich
IPC分类号： G11C16/04
CPC分类号： G11C16/0475 , H01L27/115 , H01L29/7923
摘要： A non-volatile memory cell capable of storing more than two bits of information. The NVM cell includes a semiconductor region having a first conductivity type, and a plurality of field isolation regions located in the semiconductor region. Four or more source/drain regions are located in the semiconductor region adjacent to the field isolation regions, the source/drain regions having a second conductivity type, opposite the first conductivity type. The field isolation regions and the source drain regions laterally surround a channel region in the semiconductor region. A gate structure, including a floating gate structure and a control gate structure, extends over the channel region, portions of the field isolation regions and portions of the source/drain regions. The floating gate structure includes a plurality of charge trapping regions, wherein each of the charge trapping regions is located adjacent to a corresponding one of the source/drain regions.
摘要翻译：能够存储多于两位信息的非易失性存储单元。 NVM单元包括具有第一导电类型的半导体区域和位于半导体区域中的多个场隔离区域。四个或更多个源极/漏极区域位于与场隔离区域相邻的半导体区域中，源极/漏极区域具有与第一导电类型相反的第二导电类型。场隔离区域和源漏区域横向地围绕半导体区域中的沟道区域。包括浮置栅极结构和控制栅极结构的栅极结构在沟道区域，场隔离区的部分和源极/漏极区的部分之间延伸。浮置栅极结构包括多个电荷俘获区域，其中每个电荷俘获区域位于与源极/漏极区域中相应的一个相邻的位置。

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