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1. 发明申请

US20120145448A1 PRINTED CIRCUIT BOARD WITH COMPOUND VIA 失效
标题翻译：印刷电路板与化合物通过
公开(公告)号：US20120145448A1
公开(公告)日：2012-06-14
申请号：US13031617
申请日：2011-02-22
申请人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , PO-CHUAN HSIEH , SHOU-KUO HSU , SHIN-TING YEN , DAN-CHEN WU , JIA-CHI CHEN
发明人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , PO-CHUAN HSIEH , SHOU-KUO HSU , SHIN-TING YEN , DAN-CHEN WU , JIA-CHI CHEN
IPC分类号： H05K1/11
CPC分类号： H05K1/0251 , H05K1/0225 , H05K1/0295 , H05K1/0298 , H05K1/113
摘要： A printed circuit board (PCB) with compound via includes a substrate and a pair of through holes passing through the substrate. The substrate includes a signal layer which is the top layer of the substrate, a first reference layer adjacent to the signal layer, and a second reference layer not adjacent to the signal layer. A first and a second pair of pads are mounted on the signal layer. Each of the through holes extends through the first pair of pads such that the through hole and the first pair of pads jointly form a compound via. A first reserved opening is formed on the first reference layer and corresponds to the first and the second pair of pads and the compound via. A second reserved opening is formed on the second reference layer and surrounds the through hole thereon.
摘要翻译：具有复合通孔的印刷电路板（PCB）包括基板和穿过基板的一对通孔。衬底包括作为衬底的顶层的信号层，与信号层相邻的第一参考层和不与信号层相邻的第二参考层。第一和第二对焊盘安装在信号层上。每个通孔延伸穿过第一对垫，使得通孔和第一对垫共同形成复合通孔。第一保留开口形成在第一参考层上，并且对应于第一和第二对焊盘和复合通孔。第二保留开口形成在第二参考层上并围绕其上的通孔。

2. 发明申请

US20120125679A1 PRINTED CIRCUIT BOARD HAVING DIFFERENTIAL VIAS 审中-公开
标题翻译：印刷电路板有差异的VIAS
公开(公告)号：US20120125679A1
公开(公告)日：2012-05-24
申请号：US13032653
申请日：2011-02-23
申请人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , PO-CHUAN HSIEH , SHOU-KUO HSU , SHIN-TING YEN
发明人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , PO-CHUAN HSIEH , SHOU-KUO HSU , SHIN-TING YEN
IPC分类号： H05K1/11
CPC分类号： H05K1/0251 , H05K1/0245 , H05K1/116
摘要： A printed circuit board includes an insulating board, a pair of differential vias, and a number of wiring layers. A pair of via holes extends through opposite surfaces of the insulating board. The differential vias correspond to the pair of via holes. Each differential via includes a metal plated barrel and two via capture pads. The plated barrel is plated on the inner surface of the respective via hole, and terminates at each of the two opposite surfaces of the insulating board. The via capture pads are formed on the opposite surfaces of the insulating board around the openings of the via hole, and are electrically connected to the plated barrel. The wiring layers are arranged in the insulating board, and each define a clearance hole surrounding all of the via capture pads.
摘要翻译：印刷电路板包括绝缘板，一对差动通孔和多个布线层。一对通孔延伸穿过绝缘板的相对表面。差分过孔对应于一对通孔。每个差分通孔包括一个金属电镀桶和两个通孔捕获垫。电镀桶被镀在相应通孔的内表面上，并且终止于绝缘板的两个相对表面的每一个。通孔捕获垫形成在绝缘板的围绕通孔的开口的相对表面上，并且电连接到电镀桶。布线层布置在绝缘板中，并且每个限定围绕所有通孔捕获垫的间隙孔。

3. 发明申请

US20110271025A1 COMPUTER MOTHERBOARD 失效
标题翻译：电脑主板
公开(公告)号：US20110271025A1
公开(公告)日：2011-11-03
申请号：US12824850
申请日：2010-06-28
申请人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , SHOU-KUO HSU , SHEN-CHUN LI , HSIEN-CHUAN LIANG , SHIN-TING YEN
发明人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , SHOU-KUO HSU , SHEN-CHUN LI , HSIEN-CHUAN LIANG , SHIN-TING YEN
IPC分类号： G06F13/00
CPC分类号： H05K1/113 , G06F1/185 , H05K1/0251 , H05K2201/09409 , H05K2201/09727 , H05K2201/10159
摘要： A computer motherboard includes a printed circuit board which includes a central processing unit (CPU) socket and a group of memory slots. The group of memory slots includes an in-line type memory slot and a surface mounted device (SMD) type memory slot. The in-line type memory slot includes a number of plated through holes. The SMD type memory slot is set between the in-line type memory slot and the CPU socket. The through holes of the in-line type memory slot are connected to the CPU socket through traces, pads of the SMD type memory slot are connected to corresponding through holes of the in-line type memory slot having the same pin definition.
摘要翻译：计算机主板包括印刷电路板，其包括中央处理单元（CPU）插座和一组存储器插槽。该组存储器插槽包括一个在线型存储器插槽和一个表面安装器件（SMD）型存储器插槽。在线型存储槽包括多个电镀通孔。 SMD型内存插槽设置在串行型内存插槽和CPU插槽之间。在线式存储插槽的通孔通过走线连接到CPU插座，SMD型存储插槽的焊盘连接到具有相同引脚定义的在线型存储器插槽的相应通孔。

4. 发明申请

US20120147579A1 PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板
公开(公告)号：US20120147579A1
公开(公告)日：2012-06-14
申请号：US12978527
申请日：2010-12-24
申请人： CHENG-HSIEN LEE , YUNG-CHIEH CHEN , SHOU-KUO HSU , SHIN-TING YEN
发明人： CHENG-HSIEN LEE , YUNG-CHIEH CHEN , SHOU-KUO HSU , SHIN-TING YEN
IPC分类号： H05K7/00
CPC分类号： H05K1/0295 , H05K1/0239 , H05K1/0245 , H05K1/113 , H05K2201/10015
摘要： A printed circuit board includes a high-speed differential signal control chip, first to eighth coupling capacitor pads, first to fourth connector pads, a first transmission line, a second transmission line, a third transmission line, a fourth transmission line, first to eighth transmission lines, two ninth transmission lines, first and second vias, and first to fourth sharing pads. The printed circuit board is operable to selectively support multiple connectors.
摘要翻译：印刷电路板包括高速差分信号控制芯片，第一至第八耦合电容器焊盘，第一至第四连接器焊盘，第一传输线，第二传输线，第三传输线，第四传输线，第一至第八传输线，两个第九传输线，第一和第二通孔以及第一至第四共享焊盘。印刷电路板可操作以选择性地支撑多个连接器。

5. 发明申请

US20110114379A1 PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板
公开(公告)号：US20110114379A1
公开(公告)日：2011-05-19
申请号：US12633653
申请日：2009-12-08
申请人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , SHOU-KUO HSU , SHEN-CHUN LI , HSIEN-CHUAN LIANG , SHIN-TING YEN
发明人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , SHOU-KUO HSU , SHEN-CHUN LI , HSIEN-CHUAN LIANG , SHIN-TING YEN
IPC分类号： H01R12/00
CPC分类号： H05K1/0295 , H05K1/0239 , H05K1/0245 , H05K1/029 , H05K3/222 , H05K2201/09481 , H05K2201/09636 , H05K2201/10015 , H05K2201/10189 , H05K2201/10636 , Y02P70/611
摘要： A printed circuit board can support different connectors by selectively setting connection components on the printed circuit board without changing wiring of transmission lines or making new vias in the printed circuit board.
摘要翻译：印刷电路板可以通过选择性地设置印刷电路板上的连接部件来支持不同的连接器，而不改变传输线的接线或在印刷电路板中形成新的通孔。

6. 发明申请

US20110168437A1 PRINTED CIRCUIT BOARD 失效
标题翻译：印刷电路板
公开(公告)号：US20110168437A1
公开(公告)日：2011-07-14
申请号：US12693418
申请日：2010-01-25
申请人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , SHOU-KUO HSU
发明人： YUNG-CHIEH CHEN , CHENG-HSIEN LEE , SHOU-KUO HSU
IPC分类号： H05K1/16 , H05K1/11
CPC分类号： H05K1/0245 , H05K1/0231 , H05K2201/09236
摘要： A printed circuit board (PCB) includes a positive differential signal line including first and second segments, a negative differential signal line including third and fourth segments, first and second connecting elements soldered on opposite surfaces of the PCB. The first segment and the fourth segment are located in a first straight line which has a first permittivity. The third segment and the second segment are located in a second straight line which has a second permittivity different from the first permittivity. The first connecting element is connected between the first segment and the second segment. The second connecting element is connected between the third segment and the fourth segment.
摘要翻译：印刷电路板（PCB）包括包括第一和第二段的正差分信号线，包括第三和第四段的负差分信号线，焊接在PCB的相对表面上的第一和第二连接元件。第一段和第四段位于具有第一介电常数的第一直线中。第三段和第二段位于具有与第一介电常数不同的第二介电常数的第二直线上。第一连接元件连接在第一段和第二段之间。第二连接元件连接在第三段和第四段之间。

7. 发明申请

US20130222082A1 EQUALIZER FOR MULTI-LEVEL EQUALIZATION 审中-公开
标题翻译：均衡化的多级均衡
公开(公告)号：US20130222082A1
公开(公告)日：2013-08-29
申请号：US13564768
申请日：2012-08-02
申请人： PO-CHUAN HSIEH , YING-TSO LAI , CHENG-HSIEN LEE
发明人： PO-CHUAN HSIEH , YING-TSO LAI , CHENG-HSIEN LEE
IPC分类号： H04B3/14
CPC分类号： H04B3/14
摘要： An equalizer includes a first delay module, a second delay module, a first amplitude module, a second amplitude module, and a combining unit. The first delay module receives a first signal and delays the first received signal for a preset period, and the first amplitude module transfers the first delayed signal to transmit a first weighted signal with a first peak amplitude. Similarly, the second delay module receives the first delayed signal and delays the second received signal for the preset period, and the second amplitude module transfers the second delayed signal to transmit a second weighted signal with a second peak amplitude. The combining unit combines an input signal and the first and the second weighted signals together to generate an equalized signal.
摘要翻译：均衡器包括第一延迟模块，第二延迟模块，第一振幅模块，第二振幅模块和组合单元。第一延迟模块接收第一信号并将第一接收信号延迟预设周期，并且第一幅度模块传送第一延迟信号以发送具有第一峰值幅度的第一加权信号。类似地，第二延迟模块接收第一延迟信号并将第二接收信号延迟预设周期，并且第二幅度模块传送第二延迟信号以发送具有第二峰值振幅的第二加权信号。组合单元将输入信号和第一和第二加权信号组合在一起以产生均衡的信号。

8. 发明申请

US20120300058A1 CONTROL COMPUTER AND METHOD FOR REGULATING MECHANICAL ARM USING THE SAME 审中-公开
标题翻译：控制计算机及其使用方法来调节机械臂
公开(公告)号：US20120300058A1
公开(公告)日：2012-11-29
申请号：US13409119
申请日：2012-03-01
申请人： SHEN-CHUN LI , CHUN-NENG LIAO , CHENG-HSIEN LEE , SHOU-KUO HSU
发明人： SHEN-CHUN LI , CHUN-NENG LIAO , CHENG-HSIEN LEE , SHOU-KUO HSU
IPC分类号： H04N7/18
CPC分类号： G01N21/956 , G01N2021/9518
摘要： In a method for regulating a mechanical arm using a control computer. The method obtains a first position and a second position of a center of an image plane of an image capturing device on the mechanical arm by controlling movements of the mechanical arm, and calculates a movement vector from the first position to the second position. The method further calculates a regulating angle according to the movement vector and an axial vector of the mechanical arm, and moves the mechanical arm according to the regulating angle such that the axial vector is perpendicular to a measurement plane determined by the first object and the second object.
摘要翻译：在使用控制计算机调节机械臂的方法中。该方法通过控制机械臂的移动来获得机械臂上的图像拍摄装置的图像中心的第一位置和第二位置，并计算从第一位置到第二位置的运动矢量。该方法还根据机械臂的运动矢量和轴向向量计算调节角度，并且根据调节角度使机械臂移动，使得轴向矢量垂直于由第一物体和第二物体确定的测量平面目的。

9. 发明申请

US20120017191A1 COMPUTING DEVICE AND METHOD FOR CHECKING DISTANCES BETWEEN TRANSMISSION LINES AND ANTI-PADS ARRANGED ON PRINTED CIRCUIT BOARD 失效
标题翻译：用于检查传输线之间的距离的计算装置和方法以及在印刷电路板上安装的防平板
公开(公告)号：US20120017191A1
公开(公告)日：2012-01-19
申请号：US13085432
申请日：2011-04-12
申请人： HAN-LONG CHEN , SHI-PIAO LUO , CHENG-HSIEN LEE , CHIA-NAN PAI , SHOU-KUO HSU
发明人： HAN-LONG CHEN , SHI-PIAO LUO , CHENG-HSIEN LEE , CHIA-NAN PAI , SHOU-KUO HSU
IPC分类号： G06F17/50
CPC分类号： G06F17/5081
摘要： A computing device and a method involves selection of one or more transmission lines from a printed circuit board (PCB) layout file, reading a transmission line from the one or more selected transmission lines, and determining neighboring anti-pads of the read transmission line in the PCB layout file. The computing device and method further determine an actual distance between the read transmission line and a neighboring anti-pad. If the actual distance is less than a preset standard distance, the computing device and method determine that the read transmission line and the neighboring anti-pad do not satisfy design requirements, and highlight the read transmission line and the neighboring anti-pad, to prompt a user to amend design of the read transmission line and the neighboring anti-pad.
摘要翻译：计算装置和方法包括从印刷电路板（PCB）布局文件中选择一条或多条传输线，从一条或多条所选传输线读取传输线，以及确定读传输线的相邻抗焊盘 PCB布局文件。计算设备和方法进一步确定读取传输线与相邻反焊盘之间的实际距离。如果实际距离小于预设的标准距离，则计算设备和方法确定读取传输线路和相邻的反焊盘不满足设计要求，并突出显示读取传输线路和相邻的反焊盘，以提示用户修改读取传输线的设计和相邻的反焊盘。

10. 发明申请

US20130013962A1 COMPUTING DEVICE AND METHOD FOR ANALYZING INTEGRALITY OF SERIAL ATTACHED SCSI SIGNALS 审中-公开
标题翻译：用于分析串行连接SCSI信号的整合的计算设备和方法
公开(公告)号：US20130013962A1
公开(公告)日：2013-01-10
申请号：US13479271
申请日：2012-05-24
申请人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , SHOU-KUO HSU , JUI-HSIUNG HO , CHENG-HSIEN LEE , CHUN-NENG LIAO
发明人： HSIEN-CHUAN LIANG , SHEN-CHUN LI , SHOU-KUO HSU , JUI-HSIUNG HO , CHENG-HSIEN LEE , CHUN-NENG LIAO
IPC分类号： G06F11/28
CPC分类号： G06F11/221
摘要： In a method for analyzing integrality of serial attached SCSI (SAS) signals using a computing device, the computing device connects to a signal measuring device and an electronic device. A group of test parameters, an intensity grade of a SAS signal, and a total number are set for evaluating integrality of the SAS signal. The intensity grade of the SAS signal is adjusted through an SAS interface of the electronic device. The signal measuring device measures test parameters of the SAS signal, and a test number is recorded when the test parameters of the SAS are measured. The method analyzes the integrality of the SAS signal to find an optimal SAS signal when the test number equals the total number, and determines an intensity grade of the optimal SAS signal as a driving parameter of the SAS interface.
摘要翻译：在使用计算设备分析串行连接SCSI（SAS）信号的完整性的方法中，计算设备连接到信号测量设备和电子设备。设置一组测试参数，SAS信号的强度等级和总数，以评估SAS信号的完整性。 SAS信号的强度等级通过电子设备的SAS接口进行调整。信号测量装置测量SAS信号的测试参数，并且在测量SAS的测试参数时记录测试号。该方法分析SAS信号的完整性，当测试数等于总数时，找到最佳SAS信号，并确定最佳SAS信号的强度等级作为SAS接口的驱动参数。

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