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1. 发明申请

US20130222082A1 EQUALIZER FOR MULTI-LEVEL EQUALIZATION 审中-公开
标题翻译：均衡化的多级均衡
公开(公告)号：US20130222082A1
公开(公告)日：2013-08-29
申请号：US13564768
申请日：2012-08-02
申请人： PO-CHUAN HSIEH , YING-TSO LAI , CHENG-HSIEN LEE
发明人： PO-CHUAN HSIEH , YING-TSO LAI , CHENG-HSIEN LEE
IPC分类号： H04B3/14
CPC分类号： H04B3/14
摘要： An equalizer includes a first delay module, a second delay module, a first amplitude module, a second amplitude module, and a combining unit. The first delay module receives a first signal and delays the first received signal for a preset period, and the first amplitude module transfers the first delayed signal to transmit a first weighted signal with a first peak amplitude. Similarly, the second delay module receives the first delayed signal and delays the second received signal for the preset period, and the second amplitude module transfers the second delayed signal to transmit a second weighted signal with a second peak amplitude. The combining unit combines an input signal and the first and the second weighted signals together to generate an equalized signal.
摘要翻译：均衡器包括第一延迟模块，第二延迟模块，第一振幅模块，第二振幅模块和组合单元。第一延迟模块接收第一信号并将第一接收信号延迟预设周期，并且第一幅度模块传送第一延迟信号以发送具有第一峰值幅度的第一加权信号。类似地，第二延迟模块接收第一延迟信号并将第二接收信号延迟预设周期，并且第二幅度模块传送第二延迟信号以发送具有第二峰值振幅的第二加权信号。组合单元将输入信号和第一和第二加权信号组合在一起以产生均衡的信号。

2. 发明申请

US20130006561A1 COMPUTING DEVICE, STORAGE MEDIUM, AND METHOD FOR ANALYZING SIGNAL GROUP DELAY OF PRINTED CIRCUIT BOARD 审中-公开
标题翻译：计算机设备，存储介质和分析印刷电路板信号组延迟的方法
公开(公告)号：US20130006561A1
公开(公告)日：2013-01-03
申请号：US13451433
申请日：2012-04-19
申请人： PO-CHUAN HSIEH , CHUN-JEN CHEN , YING-TSO LAI , EN-SHUO CHANG
发明人： PO-CHUAN HSIEH , CHUN-JEN CHEN , YING-TSO LAI , EN-SHUO CHANG
IPC分类号： G06F19/00
CPC分类号： G06F17/5036 , G06F17/5068 , G06F2217/62 , G06F2217/82
摘要： In a method for analyzing a signal group delay of a printed circuit board (PCB) using a computing device, the computing device connects to a signal measuring device that measures S-parameters from a pair of data signal line and clock signal line of the PCB. The method analyzes a differential loss coefficient of the data signal line and the clock signal line based on the S-parameters, and calculates a first signal delay of the data signal line and a second signal delay of the clock signal line according to the differential loss coefficient. The method further analyzes a signal group delay of the PCB according to the first signal delay and the second signal delay, and displays the signal group delay on a display device if the signal group delay does not satisfy a PCB design specification.
摘要翻译：在使用计算设备分析印刷电路板（PCB）的信号组延迟的方法中，计算设备连接到从PCB的一对数据信号线和时钟信号线测量S参数的信号测量装置。该方法基于S参数分析数据信号线和时钟信号线的差分损耗系数，并根据差分损耗计算数据信号线的第一信号延迟和时钟信号线的第二信号延迟系数。该方法还根据第一信号延迟和第二信号延迟分析PCB的信号组延迟，并且如果信号组延迟不满足PCB设计规范，则在显示装置上显示信号组延迟。

3. 发明申请

US20130093530A1 MARCHAND BALUN CIRCUIT 失效
标题翻译： MARCHAND巴伦电路
公开(公告)号：US20130093530A1
公开(公告)日：2013-04-18
申请号：US13326226
申请日：2011-12-14
申请人： EN-SHUO CHANG , PO-CHUAN HSIEH , YING-TSO LAI
发明人： EN-SHUO CHANG , PO-CHUAN HSIEH , YING-TSO LAI
IPC分类号： H01P5/10
CPC分类号： H01P5/10
摘要： A Marchand balun circuit includes a Marchand balun, an unbalanced matching circuit, and a balanced matching circuit. The Marchand balun includes an unbalanced terminal, and two balanced terminals. The unbalanced matching circuit includes a first and the second impedances which are connected between the unbalanced terminal and ground in series, and a first resistor which is connected between ground and a connection node of the first and the second impedances. The balanced matching circuit includes a third and a fourth impedances which are connected between one balanced terminal and ground in series, a fifth and a sixth impedance which are connected between the other balanced terminal and ground in series, a second resistor which is connected between ground and a connection node of the third and the fourth impedances, and a third resistor which is connected between ground and a connection node of the fifth and the sixth impedances.
摘要翻译： Marchand平衡 - 不平衡变换器电路包括Marchand平衡 - 不平衡转换器，不平衡匹配电路和平衡匹配电路。 Marchand平衡 - 不平衡变压器包括不平衡端子和两个平衡端子。不平衡匹配电路包括串联连接在不平衡端子和地之间的第一和第二阻抗，以及连接在地和第一和第二阻抗的连接节点之间的第一电阻器。平衡匹配电路包括连接在一个平衡端子和串联的地之间的第三和第四阻抗，连接在另一个平衡端子和地串联之间的第五和第六阻抗，连接在地之间的第二电阻器以及第三和第四阻抗的连接节点，以及连接在地与第五和第六阻抗的连接节点之间的第三电阻器。

4. 发明申请

US20120066660A1 METHOD OF MANAGING PROCESS FACTORS THAT INFLUENCE ELECTRICAL PROPERTIES OF PRINTED CIRCUIT BOARDS 有权
标题翻译：影响印刷电路板电气性能的过程因素管理方法
公开(公告)号：US20120066660A1
公开(公告)日：2012-03-15
申请号：US13092966
申请日：2011-04-24
申请人： HSIAO-YUN SU , YING-TSO LAI , CHENG-HSIEN LEE
发明人： HSIAO-YUN SU , YING-TSO LAI , CHENG-HSIEN LEE
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G06F2217/10
摘要： In a method of managing process factors that influence electrical properties of printed circuit boards (PCBs), n process factors are arranged in an order according to different influence to one kind of electrical property of the PCBs. The different influence is determined by first experiments designed using the Taguchi method. M process factors that have important influence to the electrical property are obtained from the n process factors according to the order to design second experiments. A computing formula for the electrical property is fitted using the m process factors according to simulated results of the second experiments, and a variation range of each of the m process factors is computed according to the computing formula.
摘要翻译：在管理影响印刷电路板（PCB）的电性能的工艺因素的方法中，根据对PCB的一种电性能的不同影响，n个工艺因素按顺序排列。不同的影响由使用田口方法设计的第一个实验确定。对电性能有重要影响的M个工艺因素根据设计第二个实验的顺序从n个工艺因素中获得。根据第二次实验的模拟结果，使用m个工艺因子拟合电性能的计算公式，并根据计算公式计算每个m个工艺因子的变化范围。

5. 发明申请

US20120026902A1 COMPUTING DEVICE AND CROSSTALK INFORMATION DETECTION METHOD 失效
标题翻译：计算设备和CROSSTALK信息检测方法
公开(公告)号：US20120026902A1
公开(公告)日：2012-02-02
申请号：US12961906
申请日：2010-12-07
申请人： YING-TSO LAI , SHI-PIAO LUO , CHENG-HSIEN LEE
发明人： YING-TSO LAI , SHI-PIAO LUO , CHENG-HSIEN LEE
IPC分类号： H04L12/26
CPC分类号： G06F17/5081 , G06F2217/82
摘要： A computing device and a method reads a circuit board layout file from a storage device, and selects a first signal transmission line from circuit board layout file as a target line. The computing device and method computes a distance between the target line and the aggressor line corresponding to each unit sample length. If the distance is more than or equal to a height of a sample region, the computing device and method defines the height of the sample region as a crosstalk space between the target line and the aggressor line corresponding to a unit sample length. Otherwise, if the distance is less than the height of the sample region, the computing device and method defines the distance as the crosstalk space between the target line and the aggressor line corresponding to the unit sample length.
摘要翻译：计算装置和方法从存储装置读取电路板布局文件，并从电路板布局文件中选择第一信号传输线作为目标线。计算装置和方法计算目标线与对应于每个单位样本长度的侵略线之间的距离。如果距离大于或等于样本区域的高度，则计算设备和方法将样本区域的高度定义为目标线与对应于单位样本长度的侵略线之间的串扰空间。否则，如果距离小于样本区域的高度，则计算装置和方法将该距离定义为对应于单位样本长度的目标线与侵略线之间的串扰空间。

6. 发明申请

US20120110540A1 METHOD OF OPTIMIZING PARAMETERS OF ELECTRONIC COMPONENTS ON PRINTED CIRCUIT BOARDS 失效
标题翻译：电子元器件在印刷电路板上优化参数的方法
公开(公告)号：US20120110540A1
公开(公告)日：2012-05-03
申请号：US13094807
申请日：2011-04-26
申请人： HSIAO-YUN SU , YING-TSO LAI , CHENG-HSIEN LEE
发明人： HSIAO-YUN SU , YING-TSO LAI , CHENG-HSIEN LEE
IPC分类号： G06F17/50
CPC分类号： G06F17/505 , G06F17/5036 , G06F17/5068 , G06F2217/08
摘要： In a method of optimizing parameters of electronic components on printed circuit boards (PCBs), a first experiment table for m variables of one type of parameter of P electronic components on a PCB is designed using n values of each variable and the RSM. P EHs of each first experiment are obtained by simulating, and P EH empirical formulas are computed according to the P EHs. A second experiment table for the m variables is designed using n′ values of each variable and the full factorial design, and P EHs of each second experiment are computed using the P EH empirical formulas. Experiments, all the P EHs of which are greater than 1, are filtered from the second experiment tables, and an average EH of each filtered experiment is computed to pick an experiment the average EH of which is the greatest. The values of the m variables in the picked experiment are considered as optimized.
摘要翻译：在印刷电路板（PCB）上优化电子部件参数的方法中，使用每个变量和RSM的n个值设计PCB上P电子部件的一种类型参数的m个变量的第一个实验表。通过模拟获得每个第一个实验的P EH，并且根据P EH计算P EH经验公式。使用每个变量的n'值和全因子设计设计m个变量的第二个实验表，并且使用P EH经验公式计算每个第二个实验的P EH。从第二个实验表中筛选出所有P EH大于1的实验，并计算每个滤波实验的平均EH，以选择其平均EH最大的实验。所选实验中的m个变量的值被认为是优化的。

7. 发明申请

US20110038427A1 DIFFERENTIAL SIGNAL TRANSMISSION DEVICE 失效
标题翻译：差分信号传输装置
公开(公告)号：US20110038427A1
公开(公告)日：2011-02-17
申请号：US12560445
申请日：2009-09-16
申请人： SHOU-KUO HSU , CHENG-HSIEN LEE , YING-TSO LAI , HSIAO-YUN SU , JIA-CHI CHEN
发明人： SHOU-KUO HSU , CHENG-HSIEN LEE , YING-TSO LAI , HSIAO-YUN SU , JIA-CHI CHEN
IPC分类号： H04L27/00
CPC分类号： H04L25/0272
摘要： A differential signal transmission device transmits N differential signal pairs from a differential signal generator to a number of receiving terminals. The N differential signal pairs include N positive signals and N negative signals. The N positive signals are clustered at a first positive clustering point. The first positive clustering point is connected to a second positive clustering point via a first matching resistor. The second positive clustering point is grounded via a first grounding resistor, and outputs a number of positive signals to the number of receiving terminals respectively. The N negative signals are clustered at a first negative clustering point. The first negative clustering point is connected to a second negative clustering point via a second matching resistor. The second negative signal clustering point is grounded via a second grounding resistor, and outputs a number of negative signals to the number of receiving terminals respectively.
摘要翻译：差分信号传输装置将差分信号发生器的N个差分信号对发送到多个接收终端。 N个差分信号对包括N个正信号和N个负信号。 N个正信号聚集在第一个正聚类点。第一正聚集点通过第一匹配电阻连接到第二正聚集点。第二个正聚集点通过第一接地电阻接地，并分别输出多个正信号到接收端的数量。 N个负信号聚集在第一个负聚类点。第一负聚集点通过第二匹配电阻器连接到第二负聚集点。第二负信号聚簇点通过第二接地电阻接地，并分别输出多个负信号至接收端数。

8. 发明申请

US20120097436A1 PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板
公开(公告)号：US20120097436A1
公开(公告)日：2012-04-26
申请号：US12973604
申请日：2010-12-20
申请人： YING-TSO LAI , YU-CHANG PAI
发明人： YING-TSO LAI , YU-CHANG PAI
IPC分类号： H05K1/09
CPC分类号： H05K1/116 , H05K3/3447
摘要： A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole extends through the printed circuit board. A thermal engraving is defined in the surface of the layer, surrounding the through hole and without being covered by the layer of copper. The thermal engraving includes a first opening and a second opening. The first opening of the thermal engraving faces an output terminal of the power supply, and is non-contiguous with the second opening.
摘要翻译：印刷电路板包括一层。铜层被覆盖在该层的表面上。通孔延伸穿过印刷电路板。在该表面中限定了热雕刻，围绕通孔并且不被铜层覆盖。热雕刻包括第一开口和第二开口。热雕刻的第一开口面向电源的输出端，并且与第二开口不连续。

9. 发明申请

US20120018199A1 PRINTED CIRCUIT BOARD 有权
标题翻译：印刷电路板
公开(公告)号：US20120018199A1
公开(公告)日：2012-01-26
申请号：US12870999
申请日：2010-08-30
申请人： YING-TSO LAI , YU-CHANG PAI
发明人： YING-TSO LAI , YU-CHANG PAI
IPC分类号： H05K1/09
CPC分类号： H05K3/3447 , H05K1/0271 , H05K2201/093 , H05K2201/0969
摘要： A printed circuit board includes a layer. A layer of copper is covered on a surface of the layer. A through hole passes through the printed circuit board. An approximately C-shaped thermal engraving is defined in the surface of the layers, surrounding the through hole and without being covered by the layer of copper. An opening of the thermal engraving faces an output terminal of the power supply.
摘要翻译：印刷电路板包括一层。铜层被覆盖在该层的表面上。通孔穿过印刷电路板。在层的表面中限定大致C形的热雕刻，围绕通孔并且不被铜层覆盖。热雕刻的开口面向电源的输出端子。

10. 发明申请

US20110253424A1 FLEXIBLE PRINTED CIRCUIT BOARD 失效
标题翻译：柔性印刷电路板
公开(公告)号：US20110253424A1
公开(公告)日：2011-10-20
申请号：US12780960
申请日：2010-05-17
申请人： YING-TSO LAI , HSIAO-YUN SU
发明人： YING-TSO LAI , HSIAO-YUN SU
IPC分类号： H05K1/00
CPC分类号： H05K1/0253 , H05K1/0219 , H05K1/0227 , H05K1/028 , H05K2201/09236 , H05K2201/0969
摘要： A FPCB includes a signal layer, a ground layer, and a dielectric layer lying between the signal layer and the ground layer. At least one high speed signal transmission line is formed on the signal layer. The ground layer has a copper-removed area corresponding to the transmission line. Two ground lines are symmetrically disposed at two opposite sides of the signal transmission line and substantially parallel to the signal transmission line, each ground line and the signal transmission line is spaced at a first predetermined distance. Each ground line and the signal transmission line are spaced at a first predetermined distance.
摘要翻译： FPCB包括位于信号层和接地层之间的信号层，接地层和电介质层。在信号层上形成至少一条高速信号传输线。接地层具有对应于传输线的铜去除区域。两个接地线对称地设置在信号传输线的两个相对侧并且基本上平行于信号传输线，每个接地线和信号传输线以第一预定距离间隔开。每个接地线和信号传输线以第一预定距离隔开。

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