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    • 1. 发明授权
    • System and method for EEPROM architecture
    • EEPROM架构的系统和方法
    • US08470669B2
    • 2013-06-25
    • US12959229
    • 2010-12-02
    • Yipeng JanZhen YangShenghe Huang
    • Yipeng JanZhen YangShenghe Huang
    • H01L21/00
    • H01L21/28273H01L21/26586H01L27/11521H01L27/11524H01L29/42324H01L29/66825H01L29/7881
    • A method for manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) device includes providing a substrate and forming a gate oxide over the substrate. Also, the method includes providing a mask overlying the gate oxide layer, the mask defining a tunnel opening. The method additionally includes performing selective etching over the mask to form a tunnel oxide layer. The method includes forming a floating gate over the tunnel oxide layer and a selective gate over the gate oxide layer. The method includes angle doping a region of the substrate using the floating gate as a mask to obtain a first doped region. The method further includes forming a dielectric layer over the floating gate and a control gate over the dielectric layer. The method additionally includes angle doping a second region of the substrate using the selective gate as a mask to obtain a second doped region, wherein the first and second doped regions partially overlap.
    • 一种用于制造电可擦除可编程只读存储器(EEPROM)器件的方法包括提供衬底并在衬底上形成栅极氧化物。 此外,该方法包括提供覆盖栅极氧化物层的掩模,掩模限定隧道开口。 该方法另外包括在掩模上执行选择性蚀刻以形成隧道氧化物层。 该方法包括在隧道氧化物层上形成浮置栅极,在栅极氧化物层上形成选择栅极。 该方法包括使用浮置栅极作为掩模对衬底的区域进行角度掺杂以获得第一掺杂区域。 所述方法还包括在所述浮动栅极上形成介电层和在所述电介质层上形成控制栅极。 该方法另外包括使用选择栅极作为掩模的角度掺杂衬底的第二区域以获得第二掺杂区域,其中第一和第二掺杂区域部分重叠。
    • 2. 发明申请
    • SYSTEM AND METHOD FOR EEPROM ARCHITECTURE
    • 用于EEPROM架构的系统和方法
    • US20110133264A1
    • 2011-06-09
    • US12959229
    • 2010-12-02
    • YIPENG JANZhen YangShenghe Huang
    • YIPENG JANZhen YangShenghe Huang
    • H01L29/788H01L21/336
    • H01L21/28273H01L21/26586H01L27/11521H01L27/11524H01L29/42324H01L29/66825H01L29/7881
    • A method for manufacturing an Electrically Erasable Programmable Read-Only Memory (EEPROM) device includes providing a substrate and forming a gate oxide over the substrate. Also, the method includes providing a mask overlying the gate oxide layer, the mask defining a tunnel opening. The method additionally includes performing selective etching over the mask to form a tunnel oxide layer. The method includes forming a floating gate over the tunnel oxide layer and a selective gate over the gate oxide layer. The method includes angle doping a region of the substrate using the floating gate as a mask to obtain a first doped region. The method further includes forming a dielectric layer over the floating gate and a control gate over the dielectric layer. The method additionally includes angle doping a second region of the substrate using the selective gate as a mask to obtain a second doped region, wherein the first and second doped regions partially overlap.
    • 一种用于制造电可擦除可编程只读存储器(EEPROM)器件的方法包括提供衬底并在衬底上形成栅极氧化物。 此外,该方法包括提供覆盖栅极氧化物层的掩模,掩模限定隧道开口。 该方法另外包括在掩模上执行选择性蚀刻以形成隧道氧化物层。 该方法包括在隧道氧化物层上形成浮置栅极,在栅极氧化物层上形成选择栅极。 该方法包括使用浮置栅极作为掩模对衬底的区域进行角度掺杂以获得第一掺杂区域。 所述方法还包括在所述浮动栅极上形成介电层和在所述电介质层上形成控制栅极。 该方法另外包括使用选择栅极作为掩模的角度掺杂衬底的第二区域以获得第二掺杂区域,其中第一和第二掺杂区域部分重叠。