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1. 发明申请

US20180115766A1 3D IMAGE RECONSTRUCTION BASED ON LENSLESS COMPRESSIVE IMAGE ACQUISITION 审中-公开
公开(公告)号：US20180115766A1
公开(公告)日：2018-04-26
申请号：US15298580
申请日：2016-10-20
申请人： Xin Yuan , Hong Jiang , Gang Huang , Paul A. Wilford
发明人： Xin Yuan , Hong Jiang , Gang Huang , Paul A. Wilford
IPC分类号： H04N13/02 , G06T7/50 , G06K9/62 , H04N13/00
CPC分类号： H04N13/20 , G06T7/50 , H04N5/2226 , H04N5/2254 , H04N5/2258 , H04N13/128 , H04N13/243 , H04N13/254 , H04N13/271 , H04N2013/0081
摘要： The present disclosure generally discloses a three-dimensional (3D) image reconstruction capability. The 3D image reconstruction capability may be configured to support reconstruction of a 3D image of a scene. The 3D image reconstruction capability may be configured to support reconstruction of a 3D image of a scene based on lensless compressive image acquisition performed using a lensless compressive camera having a single aperture and a set of multiple sensors. The reconstructed 3D image of a scene may include (1) image data indicative of a set of multiple two-dimensional (2D) images reconstructed based on the set of multiple sensors of the lensless compressive camera (which may be represented as images) and (2) depth information indicative of depths at points or areas of an overlapping portion of the multiple images reconstructed based on the set of multiple sensors of the lensless compressive camera (which may be represented as a depth map).

2. 发明授权

US10798364B2 3D image reconstruction based on lensless compressive image acquisition 有权
公开(公告)号：US10798364B2
公开(公告)日：2020-10-06
申请号：US15298580
申请日：2016-10-20
申请人： Xin Yuan , Hong Jiang , Gang Huang , Paul A. Wilford
发明人： Xin Yuan , Hong Jiang , Gang Huang , Paul A. Wilford
IPC分类号： H04N13/20 , G06T7/50 , H04N13/128 , H04N13/254 , H04N5/222 , H04N13/243 , H04N13/271 , H04N5/225 , H04N13/00
摘要： The present disclosure generally discloses a three-dimensional (3D) image reconstruction capability. The 3D image reconstruction capability may be configured to support reconstruction of a 3D image of a scene. The 3D image reconstruction capability may be configured to support reconstruction of a 3D image of a scene based on lensless compressive image acquisition performed using a lensless compressive camera having a single aperture and a set of multiple sensors. The reconstructed 3D image of a scene may include (1) image data indicative of a set of multiple two-dimensional (2D) images reconstructed based on the set of multiple sensors of the lensless compressive camera (which may be represented as images) and (2) depth information indicative of depths at points or areas of an overlapping portion of the multiple images reconstructed based on the set of multiple sensors of the lensless compressive camera (which may be represented as a depth map).

3. 发明申请

US20180035046A1 BLOCK-BASED LENSLESS COMPRESSIVE IMAGE ACQUISITION 审中-公开
公开(公告)号：US20180035046A1
公开(公告)日：2018-02-01
申请号：US15223204
申请日：2016-07-29
申请人： Xin Yuan , Gang Huang , Hong Jiang , Paul A. Wilford
发明人： Xin Yuan , Gang Huang , Hong Jiang , Paul A. Wilford
IPC分类号： H04N5/232 , G02B27/58 , H04N5/225
CPC分类号： H04N5/23238 , G02B27/58 , H04N5/2253 , H04N5/2254 , H04N5/2258 , H04N5/335
摘要： The present disclosure generally discloses block-based lensless compressive image acquisition capabilities. The block-based lensless compressive image acquisition capabilities may include a block-based lensless camera. The block-based lensless camera may include a set of two or more image acquisition block configured to capture respective sets of image data (e.g., detector outputs or compressive measurements produced from detector outputs) for respective image portions of an image to be captured by the block-based lensless camera. The blocks of a block-based lensless camera may each include an aperture including a set of aperture elements, a sensor, and an isolation chamber disposed between the aperture and the sensor for directing light from the aperture to the sensor while preventing comingling of light of the block and light of other blocks.

4. 发明授权

US10154204B2 Video compressive sensing with side information 有权
公开(公告)号：US10154204B2
公开(公告)日：2018-12-11
申请号：US15454972
申请日：2017-03-09
申请人： Xin Yuan , Paul A. Wilford
发明人： Xin Yuan , Paul A. Wilford
IPC分类号： H04N5/247 , H04N5/232 , H04N5/353 , H04N5/225
摘要： A time-dependent aperture is configured to modulate light during an integration time interval. A first detector is configured to capture a first image of a scene during the integration time interval using light received from the time-dependent aperture. A second detector is configured to capture a second image of the scene concurrently with the first detector capturing the first image. A processor is configured to reconstruct a plurality of images of the scene based on the first image and the second image.

5. 发明申请

US20180262693A1 VIDEO COMPRESSIVE SENSING WITH SIDE INFORMATION 审中-公开
公开(公告)号：US20180262693A1
公开(公告)日：2018-09-13
申请号：US15454972
申请日：2017-03-09
申请人： Xin Yuan , Paul A. Wilford
发明人： Xin Yuan , Paul A. Wilford
IPC分类号： H04N5/247 , H04N5/232 , H04N5/353 , H04N5/225
CPC分类号： H04N5/247 , H04N5/2254 , H04N5/2256 , H04N5/23232 , H04N5/23293 , H04N5/353
摘要： A time-dependent aperture is configured to modulate light during an integration time interval. A first detector is configured to capture a first image of a scene during the integration time interval using light received from the time-dependent aperture. A second detector is configured to capture a second image of the scene concurrently with the first detector capturing the first image. A processor is configured to reconstruct a plurality of images of the scene based on the first image and the second image.

6. 发明授权

US08555229B2 Parallel solving of layout optimization 失效
标题翻译：并行求解布局优化
公开(公告)号：US08555229B2
公开(公告)日：2013-10-08
申请号：US13151413
申请日：2011-06-02
申请人： Xiaoping Tang , Michael S. Gray , Xin Yuan
发明人： Xiaoping Tang , Michael S. Gray , Xin Yuan
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5068
摘要： Solutions for optimizing an integrated circuit layout for implementation in an integrated circuit are disclosed. In one embodiment, a computer-implemented method is disclosed including: obtaining a plurality of hierarchical constraints in mathematical form, the plurality of hierarchical constraints defining a first integrated circuit layout; partitioning the plurality of hierarchical constraints into groups according to one or more partitioning rules; determining whether a boundary condition exists between two of the groups, and distributing a slack or a gap between the two of the groups in the case that the boundary condition exists; creating a plurality of integer linear programming problems associated with each of the groups; determining a solution for each of the plurality of integer linear programming problems; and integrating each solution together to form a second integrated circuit layout.
摘要翻译：公开了用于优化用于在集成电路中实现的集成电路布局的解决方案。在一个实施例中，公开了一种计算机实现的方法，包括：以数学形式获得多个分层约束，所述多个层级约束限定第一集成电路布局; 根据一个或多个分区规则将多个分层约束划分成组; 确定在两个组之间是否存在边界条件，并且在存在边界条件的情况下分配两组之间的松弛或间隙; 创建与每个组相关联的多个整数线性规划问题; 确定所述多个整数线性规划问题中的每一个的解; 并将每个解决方案集成在一起以形成第二集成电路布局。

7. 发明授权

US07798861B2 Electrical connector with two-piece configured housing 失效
标题翻译：电气连接器，带两件式配置的外壳
公开(公告)号：US07798861B2
公开(公告)日：2010-09-21
申请号：US12436802
申请日：2009-05-07
申请人： Su-Feng Liu , Chin-Te Lai , Xin Yuan
发明人： Su-Feng Liu , Chin-Te Lai , Xin Yuan
IPC分类号： H01R17/00
CPC分类号： H01R13/506 , H01R9/032
摘要： An electrical connector (100) comprises a first insulative housing (10), a second insulative housing (30) engaging with the first insulative housing (10), and a plurality of contacts. Said second insulative housing (30) has a first platform (321) and a second platform (322) arranged at different levels. Each of the contacts (20) includes a mating portion (21) supported by the first insulative housing and a tail portion (23) supported by the second insulative housing, the tail portions (23) of the contacts are spaced into two rows and located on the first and second platforms; another contact has a tail portion disposed inside the second insulative housing.
摘要翻译：电连接器（100）包括第一绝缘壳体（10），与第一绝缘壳体（10）接合的第二绝缘壳体（30）和多个触点。所述第二绝缘壳体（30）具有布置在不同高度的第一平台（321）和第二平台（322）。每个触头（20）包括由第一绝缘壳体支撑的配合部分（21）和由第二绝缘壳体支撑的尾部（23），触头的尾部（23）间隔成两排并且位于在第一和第二平台上; 另一接触件具有设置在第二绝缘壳体内的尾部。

8. 发明申请

US20070240088A1 VLSI ARTWORK LEGALIZATION FOR HIERARCHICAL DESIGNS WITH MULTIPLE GRID CONSTRAINTS 有权
标题翻译：用于具有多个网格约束的分层设计的VLSI艺术品法规
公开(公告)号：US20070240088A1
公开(公告)日：2007-10-11
申请号：US11279283
申请日：2006-04-11
申请人： Xiaoping Tang , Xin Yuan
发明人： Xiaoping Tang , Xin Yuan
IPC分类号： G06F17/50
CPC分类号： G06F17/509 , G06F17/504 , G06F17/5068 , G06F2217/06
摘要： A system and method are disclosed for legalizing a flat or hierarchical VLSI layout to meet multiple grid constraints and conventional ground rules. Given a set of ground rules with multiple grid constraints and a VLSI layout (either hierarchical or flat) which is layout-versus-schematic (LVS) correct but may not be ground rule correct, the system and method provide a legalized layout which meets the multiple grid constraints while maintaining LVS correctness and fixing the ground rule errors as much as possible with minimum layout perturbation from the input design. The system and method support multiple grid pitch constraints for hierarchical design, and provide for LVS correctness to be maintained while an on-grid solution possibly with some spacing violations.
摘要翻译：公开了一种用于使平坦或分级VLSI布局合法化以满足多个网格约束和常规基本规则的系统和方法。给定一组具有多个网格约束的基本规则和布局与原理图（LVS）的VLSI布局（分层或平面）正确但可能不是基本规则正确的，系统和方法提供了合法化的布局，满足多个网格约束，同时保持LVS的正确性，并尽可能多地修正接地规则错误，并从输入设计中获得最小的布局扰动。该系统和方法支持用于分级设计的多个网格间距约束，并且在可能具有一些间隔违规的并网解决方案时提供要维护的LVS正确性。

9. 发明授权

US08484607B1 Decomposing layout for triple patterning lithography 失效
标题翻译：三重图案平版印刷的分解布局
公开(公告)号：US08484607B1
公开(公告)日：2013-07-09
申请号：US13413288
申请日：2012-03-06
申请人： Xiaoping Tang , Xin Yuan
发明人： Xiaoping Tang , Xin Yuan
IPC分类号： G06F15/04 , G06F17/50
CPC分类号： G03F7/70466 , G06F17/5081
摘要： An approach for decomposing a layout for triple patterning lithography is described. In one embodiment, a triple patterning conflict graph is built from a layout having pattern features specified as shapes. The triple patterning conflict graph represents the shapes in the layout and coloring constraints associated with the shapes. The shapes represented by the triple patterning conflict graph are decomposed into three colors to avoid color conflict, while balancing the color density among the three colors and minimizing a number of stitches used to represent the shapes in the layout. Color conflicts in the decomposition are resolved by selectively segmenting the shapes in the decomposition that are associated with the color conflict.
摘要翻译：描述了用于分解三重图案化光刻的布局的方法。在一个实施例中，从具有指定为形状的图案特征的布局构建三重图案化图案冲突图。三重图案化冲突图表示与形状相关联的布局和着色约束中的形状。由三重图形化冲突图表示的形状被分解为三种颜色以避免颜色冲突，同时平衡三种颜色之间的颜色密度并且最小化用于表示布局中的形状的多个针迹。通过选择性地分割与颜色冲突相关联的分解中的形状来解决分解中的颜色冲突。

10. 发明申请

US20120311517A1 PARALLEL SOLVING OF LAYOUT OPTIMIZATION 失效
标题翻译：并行优化布局优化
公开(公告)号：US20120311517A1
公开(公告)日：2012-12-06
申请号：US13151413
申请日：2011-06-02
申请人： Xiaoping Tang , Michael S. Gray , Xin Yuan
发明人： Xiaoping Tang , Michael S. Gray , Xin Yuan
IPC分类号： G06F17/50
CPC分类号： G06F17/5081 , G06F17/5068
摘要： Solutions for optimizing an integrated circuit layout for implementation in an integrated circuit are disclosed. In one embodiment, a computer-implemented method is disclosed including: obtaining a plurality of hierarchical constraints in mathematical form, the plurality of hierarchical constraints defining a first integrated circuit layout; partitioning the plurality of hierarchical constraints into groups according to one or more partitioning rules; determining whether a boundary condition exists between two of the groups, and distributing a slack or a gap between the two of the groups in the case that the boundary condition exists; creating a plurality of integer linear programming problems associated with each of the groups; determining a solution for each of the plurality of integer linear programming problems; and integrating each solution together to form a second integrated circuit layout.
摘要翻译：公开了用于优化用于在集成电路中实现的集成电路布局的解决方案。在一个实施例中，公开了一种计算机实现的方法，包括：以数学形式获得多个分层约束，所述多个层级约束限定第一集成电路布局; 根据一个或多个分区规则将多个分层约束划分成组; 确定在两个组之间是否存在边界条件，并且在存在边界条件的情况下分配两组之间的松弛或间隙; 创建与每个组相关联的多个整数线性规划问题; 确定所述多个整数线性规划问题中的每一个的解; 并将每个解决方案集成在一起以形成第二集成电路布局。

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