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1. 发明授权

US06522273B1 Circuits systems and methods for power digital-to-analog converter protection 有权
标题翻译：用于电源数模转换器保护的电路系统和方法
公开(公告)号：US06522273B1
公开(公告)日：2003-02-18
申请号：US09825091
申请日：2001-04-02
申请人： Xiaofan Fei , Johann Guy Gaboriau , Jason Powell Rhode , John Laurence Melanson , Eric Walburger
发明人： Xiaofan Fei , Johann Guy Gaboriau , Jason Powell Rhode , John Laurence Melanson , Eric Walburger
IPC分类号： H03M116
CPC分类号： H03M1/0604 , H03M1/822 , H03M3/506 , H03M3/51
摘要： An apparatus and method for power digital-to-analog converter protection are implemented. An attenuation value is set in response to the value of the supply voltage. The attenuation value is provided to a gain control, along with the input signal. A gain, offset by the attenuation value, determines the gain-adjusted output signal of the gain control generated from the input signal.
摘要翻译：实现了功率数模转换器保护的装置和方法。响应于电源电压的值设置衰减值。衰减值与输入信号一起提供给增益控制。通过衰减值偏移的增益确定从输入信号产生的增益控制的增益调整输出信号。

2. 发明授权

US06538590B1 Transient noise reduction circuits, systems and methods in power digital-to-analog converters 有权
标题翻译：功率数模转换器中的瞬态降噪电路，系统和方法
公开(公告)号：US06538590B1
公开(公告)日：2003-03-25
申请号：US09825080
申请日：2001-04-02
申请人： Johann Guy Gaboriau , Eric Walburger , John Laurence Melanson , Xiaofan Fei
发明人： Johann Guy Gaboriau , Eric Walburger , John Laurence Melanson , Xiaofan Fei
IPC分类号： H03M166
CPC分类号： H03F3/2173 , H03F3/2171 , H03F2200/331 , H03M1/0881 , H03M1/822
摘要： A system for suppressing transient noise in switched-mode amplifier systems is disclosed. An amplifier, for amplifying a signal from a digital signal source includes a first complementary metal oxide semiconductor field effect transistor (MOSFET) pair. A common node of the pair is serially coupled to an output node of the amplifier by a resistor. The first MOSFET pair is configured to drive a ramp on the output node of the amplifier.
摘要翻译：公开了一种用于抑制开关式放大器系统中的瞬态噪声的系统。用于放大来自数字信号源的信号的放大器包括第一互补金属氧化物半导体场效应晶体管（MOSFET）对。该对的公共节点通过电阻器串联耦合到放大器的输出节点。第一个MOSFET对被配置为驱动放大器的输出节点上的斜坡。

3. 发明授权

US06462690B1 Circuit systems and methods for multirate digital-to-analog amplifier systems 有权
标题翻译：多速率数模转换放大器系统的电路系统和方法
公开(公告)号：US06462690B1
公开(公告)日：2002-10-08
申请号：US09825445
申请日：2001-04-02
申请人： Johann Guy Gaboriau , Xiaofan Fei , Evan Logan Marchman , Jason Powell Rhode
发明人： Johann Guy Gaboriau , Xiaofan Fei , Evan Logan Marchman , Jason Powell Rhode
IPC分类号： H03M166
CPC分类号： H03M3/502
摘要： A multirate digital-to-analog amplifier system is disclosed. An interpolator is configured to interpolate digital values between samples of a digital signal from a digital signal source, in which the digital signal has a first sample rate. An output signal from the interpolator has a second, predetermined sample rate, which is independent of the first sample rate, of the digital signal. An amplifier is configured to amplify a digital signal having the second sample rate in response to the output signal of the interpolator.
摘要翻译：公开了一种多速率数模转换放大器系统。内插器被配置为在来自数字信号源的数字信号的采样之间内插数字值，其中数字信号具有第一采样率。来自内插器的输出信号具有与数字信号的第一采样速率无关的第二预定采样速率。放大器被配置为响应于内插器的输出信号放大具有第二采样率的数字信号。

4. 发明授权

US06529074B1 Circuits and methods for output impedance matching in switched mode circuits 有权
标题翻译：在开关模式电路中输出阻抗匹配的电路和方法
公开(公告)号：US06529074B1
公开(公告)日：2003-03-04
申请号：US09917311
申请日：2001-07-26
申请人： John Laurence Melanson , Eric Walburger , Johann Guy Gaboriau
发明人： John Laurence Melanson , Eric Walburger , Johann Guy Gaboriau
IPC分类号： H03F3217
CPC分类号： H03F3/2171 , H03F2200/294 , H03F2200/372 , H03K17/145
摘要： An output stage 300 includes a first output switch 201 having a current path for driving an output from a first voltage rail and a second output switch 202 having a current path for selectively driving the output from a second voltage rail. A first reference switch 301 is scaled with respects to first output switch 201 and has a current path coupled to the first voltage rail. A second reference switch 302 scaled with respects to second output switch 202 has a current path coupled to a current path of first reference switch 301 at a node and the second voltage rail. The logic measures an impedance mismatch between first and second reference switches 301, 302 and proportionally varies the impedance of a selected one of first and second output switches 201, 202 in response.
摘要翻译：输出级300包括具有用于驱动来自第一电压轨的输出的电流路径的第一输出开关201和具有用于选择性地驱动来自第二电压轨的输出的电流路径的第二输出开关202。第一参考开关301相对于第一输出开关201被缩放，并且具有耦合到第一电压轨的电流路径。相对于第二输出开关202缩放的第二参考开关302具有耦合到节点处的第一参考开关301的电流路径的电流路径和第二电压轨。该逻辑测量第一和第二参考开关301,302之间的阻抗不匹配，并且响应地按比例地改变第一和第二输出开关201,202中所选择的一个的阻抗。

5. 发明授权

US06147522A Reference voltage circuitry for use in switched-capacitor applications 有权
标题翻译：用于开关电容应用的参考电压电路
公开(公告)号：US06147522A
公开(公告)日：2000-11-14
申请号：US224390
申请日：1998-12-31
申请人： Jason Powell Rhode , Vishnu Shankar Srinivasan , Eric Clay Gaalaas , Johann Guy Gaboriau
发明人： Jason Powell Rhode , Vishnu Shankar Srinivasan , Eric Clay Gaalaas , Johann Guy Gaboriau
IPC分类号： H03M3/02 , H03K27/02
CPC分类号： H03M3/368 , H03M3/502
摘要： Circuitry for selectively sampling a reference voltage with a capacitor 403 includes a first switch 505a for selectively coupling capacitor 403 to a source of a first reference signal during a first operating phase and a second switch 505b for selectively coupling capacitor 403 to a source of a second reference signal during a second operating phase.
摘要翻译：用电容器403选择性地对参考电压进行采样的电路包括：第一开关505a，用于在第一操作阶段期间将电容器403选择性地耦合到第一参考信号源;以及第二开关505b，用于将电容器403选择性地耦合到第二参考信号在第二操作阶段。

6. 发明授权

US07706438B1 Circuits and methods for reducing noise and distortion in pulse width modulation systems 有权
标题翻译：用于降低脉冲宽度调制系统噪声和失真的电路和方法
公开(公告)号：US07706438B1
公开(公告)日：2010-04-27
申请号：US10767906
申请日：2004-01-29
申请人： Johann Guy Gaboriau , John Laurence Melanson , Lingli Zhang , Melvin L. Hagge
发明人： Johann Guy Gaboriau , John Laurence Melanson , Lingli Zhang , Melvin L. Hagge
IPC分类号： H03K7/08 , H03M5/08
CPC分类号： H03K7/08 , H03F3/2173
摘要： A pulse width modulation system including a pulse width modulation stage for generating a pulse width modulated signal in response to an input signal and an other pulse width modulation stage for generating an other pulse width modulated signal in response to an other input signal. Additional circuitry ensures that transitions of the pulse width modulated signal and the other pulse width modulated signal are spaced in time by a selected amount for small levels of the input signal.
摘要翻译：一种脉冲宽度调制系统，包括响应于输入信号产生脉宽调制信号的脉冲宽度调制级和用于响应于另一输入信号产生另一脉冲宽度调制信号的其它脉宽调制级。附加电路确保了脉冲宽度调制信号和另一个脉冲宽度调制信号的转换在输入信号的小电平上被时间间隔一定数量。

7. 发明授权

US07826578B1 Circuits and methods for noise management in systems including an asynchronously-operable data port 有权
标题翻译：系统中噪声管理的电路和方法，包括异步可操作的数据端口
公开(公告)号：US07826578B1
公开(公告)日：2010-11-02
申请号：US11088955
申请日：2005-03-24
申请人： John Laurence Melanson , Lingli Zhang , Chang Yong Kang , Johann Guy Gaboriau
发明人： John Laurence Melanson , Lingli Zhang , Chang Yong Kang , Johann Guy Gaboriau
IPC分类号： H04L7/00 , H03K9/00 , H04L12/43 , H04J3/12
CPC分类号： G06F1/12
摘要： A data processing system including an input data port for receiving input data samples asynchronous to a native clock signal and having an input sample rate, a first sample rate converter for converting the data samples from the input sample rate to a sample rate synchronous with a rate of the native clock signal, and a data converter for converting data samples output from the first sample rate converter to another format. An analog to digital converter converts an analog signal into output data samples with a sample rate synchronous with the rate of the native clock signal, and a second sample rate converter converts the sample rate of the output data samples from the sample rate synchronous with the rate of the native clock signal to an output sample rate such that output data samples are asynchronous to the native clock signal.
摘要翻译：一种数据处理系统，包括用于接收与本机时钟信号异步并具有输入采样率的输入数据样本的输入数据端口，用于将来自输入采样率的数据样本转换成与速率同步的采样率的第一采样率转换器和用于将从第一采样率转换器输出的数据样本转换为另一格式的数据转换器。模数转换器将模拟信号转换成具有与本机时钟信号的速率同步的采样率的输出数据样本，第二采样率转换器将采样率的采样率与速率同步的速率将本地时钟信号转换为输出采样率，使得输出数据样本与本机时钟信号异步。

8. 发明授权

US07308027B1 Circuits and methods for reducing distortion and noise in pulse width modulation systems utilizing full-bridge drivers 有权
标题翻译：利用全桥驱动器减小脉冲宽度调制系统中的失真和噪声的电路和方法
公开(公告)号：US07308027B1
公开(公告)日：2007-12-11
申请号：US10828816
申请日：2004-04-21
申请人： Johann Guy Gaboriau , Melvin L. Hagge , Lingli Zhang , John Laurence Melanson
发明人： Johann Guy Gaboriau , Melvin L. Hagge , Lingli Zhang , John Laurence Melanson
IPC分类号： H03K7/08
CPC分类号： H03F3/2173 , H03F1/26 , H03F1/32 , H03F3/68 , H03F2200/03 , H03F2200/351 , H03F2200/372
摘要： A pulse width modulation circuit for driving a full-bridge output load includes a pulse width modulation stage for generating, from an input data stream, a pulse width modulated data stream for driving a terminal of a full-bridge output load and another pulse width modulated data stream for driving another terminal of the full bridge output load. A delay circuit delays the another pulse width modulated data stream relative to the pulse width modulated data stream such that edges of the another pulse width modulated data stream and edges of the pulse width modulated data stream are temporally spaced.
摘要翻译：用于驱动全桥输出负载的脉宽调制电路包括脉冲宽度调制级，用于从输入数据流生成用于驱动全桥输出负载的端子的脉冲宽度调制数据流，以及用于驱动全桥输出负载的另一个脉宽调制用于驱动全桥输出负载的另一终端的数据流。延迟电路相对于脉宽调制数据流延迟另一个脉冲宽度调制数据流，使得另一脉宽调制数据流的边缘和脉宽调制数据流的边沿在时间上间隔开。

9. 发明授权

US07230454B2 Serial audio output driver circuits and methods 有权
标题翻译：串行音频输出驱动电路及方法
公开(公告)号：US07230454B2
公开(公告)日：2007-06-12
申请号：US11060825
申请日：2005-02-18
申请人： Joseph Jason Welser , Johann Guy Gaboriau
发明人： Joseph Jason Welser , Johann Guy Gaboriau
IPC分类号： H03K19/0175
CPC分类号： H03F3/2175 , H03F2200/03 , H03F2200/331
摘要： An output driver circuit including a transistor for pulling down an output terminal voltage and a charge pump for driving an input of the transistor to pull-down the output terminal voltage substantially to zero volts in response to a selected level of an input signal.
摘要翻译：一种输出驱动器电路，包括用于拉低输出端电压的晶体管和用于驱动晶体管的输入的电荷泵，以响应于输入信号的选定电平将输出端电压基本上拉至零伏特。

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