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1. 发明授权

US07078255B2 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
公开(公告)号：US07078255B2
公开(公告)日：2006-07-18
申请号：US10933545
申请日：2004-09-03
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.

2. 发明授权

US06451635B2 Photolithography system and a method for fabricating a thin film transistor array substrate using the same 有权
标题翻译：光刻系统和使用其制造薄膜晶体管阵列基板的方法
公开(公告)号：US06451635B2
公开(公告)日：2002-09-17
申请号：US09804056
申请日：2001-03-13
申请人： Woon-Yong Park , Jong-Soo Yoon
发明人： Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L2904
CPC分类号： G03F7/70458 , G02F1/1362 , G02F2001/136236 , H01L27/12
摘要： A method of fabricating a thin film transistor array substrate for a liquid crystal display includes the step of forming a gate line assembly with gate lines, gate electrodes and gate pads. After laying a plurality of layers on the substrate, a photoresist film is deposited onto the layers. The photoresist film is first exposed to light at a first light exposing unit, and secondly exposed to light at a second light exposing unit such that the photoresist film has three portions of different thickness. The photoresist pattern, and some of the underlying layers are etched to form a data line assembly, a semiconductor pattern, and an ohmic contact pattern. The data line assembly includes data lines, source and drain electrodes, and data pads. The remaining photoresist film is removed, and a protective layer is formed on the substrate. The protective layer is etched together with the gate insulating layer to form first to third contact holes exposing the drain electrode, the gate pad and the data pad, respectively. Pixel electrodes, subsidiary gate and data pads are then formed.
摘要翻译：制造用于液晶显示器的薄膜晶体管阵列基板的方法包括用栅极线，栅极电极和栅极焊盘形成栅极线组件的步骤。在衬底上铺设多层之后，在层上沉积光致抗蚀剂膜。光致抗蚀剂膜首先在第一曝光单元处曝光，其次在第二光曝光单元处曝光，使得光致抗蚀剂膜具有不同厚度的三个部分。蚀刻图案和一些下面的层被蚀刻以形成数据线组件，半导体图案和欧姆接触图案。数据线组件包括数据线，源极和漏极以及数据焊盘。除去剩余的光致抗蚀剂膜，并在基板上形成保护层。保护层与栅极绝缘层一起被蚀刻，以形成分别暴露漏电极，栅极焊盘和数据焊盘的第一至第三接触孔。然后形成像素电极，辅助栅极和数据焊盘。

3. 发明授权

US06380559B1 Thin film transistor array substrate for a liquid crystal display 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列基板
公开(公告)号：US06380559B1
公开(公告)日：2002-04-30
申请号：US09585427
申请日：2000-06-02
申请人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
发明人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
IPC分类号： H01L2904
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136222 , G02F2001/136231 , G02F2001/13629 , G02F2201/40 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908
摘要： A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area. The passivation layer and the underlying layers are etched through the photoresist pattern to form a semiconductor pattern and contact windows. A pixel electrode, a supplemental gate pad and a supplemental data pad are then formed of indium tin oxide or indium zinc oxide. The gate and data line assemblies may be formed with a single layered structure. A black matrix and a color filter may be formed at the structured substrate before forming the pixel electrode, and an opening portion may be formed between the pixel electrode and the data line to prevent possible short circuits.
摘要翻译：用于液晶显示器的薄膜晶体管衬底包括绝缘衬底和形成在衬底上的栅极线组件。栅极线组件具有双层结构，其具有相对于氧化铟锡具有良好接触特性的较低层，以及表现出低电阻特性的上层。栅极绝缘层，半导体层，接触层以及第一和第二数据线层被栅极线组件依次沉积到衬底上。图案化第一和第二数据线层以形成数据线组件，并且通过数据线组件的图案蚀刻接触层，使得接触层具有与数据线组件相同的图案。钝化层沉积到数据线组件上，并且主要在显示区域和周边区域上通过使用不同光透射掩模在钝化层上形成光致抗蚀剂图案。通过光致抗蚀剂图案蚀刻钝化层和下面的层以形成半导体图案和接触窗口。然后由氧化铟锡或氧化铟锌形成像素电极，辅助栅极焊盘和补充数据焊盘。栅极和数据线组件可以形成为单层结构。在形成像素电极之前，可以在结构化衬底上形成黑色矩阵和滤色器，并且可以在像素电极和数据线之间形成开口部分，以防止可能的短路。

4. 发明授权

US07504290B2 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
标题翻译：一种用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US07504290B2
公开(公告)日：2009-03-17
申请号：US11750630
申请日：2007-05-18
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L21/84
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

5. 再颁专利

USRE40162E1 Thin film transistor array substrate for a liquid crystal display 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列基板
公开(公告)号：USRE40162E1
公开(公告)日：2008-03-25
申请号：US10749153
申请日：2003-12-31
申请人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
发明人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
IPC分类号： H01L29/04 , G02F1/136
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136222 , G02F2001/136231 , G02F2001/13629 , G02F2201/40 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908
摘要： A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area. The passivation layer and the underlying layers are etched through the photoresist pattern to form a semiconductor pattern and contact windows. A pixel electrode, a supplemental gate pad and a supplemental data pad are then formed of indium tin oxide or indium zinc oxide. The gate and data line assemblies may be formed with a single layered structure. A black matrix and a color filter may be formed at the structured substrate before forming the pixel electrode, and an opening portion may be formed between the pixel electrode and the data line to prevent possible short circuits.
摘要翻译：用于液晶显示器的薄膜晶体管衬底包括绝缘衬底和形成在衬底上的栅极线组件。栅极线组件具有双层结构，其具有相对于氧化铟锡具有良好接触特性的较低层，以及表现出低电阻特性的上层。栅极绝缘层，半导体层，接触层以及第一和第二数据线层被栅极线组件依次沉积到衬底上。图案化第一和第二数据线层以形成数据线组件，并且通过数据线组件的图案蚀刻接触层，使得接触层具有与数据线组件相同的图案。钝化层沉积到数据线组件上，并且主要在显示区域和周边区域上通过使用不同光透射掩模在钝化层上形成光致抗蚀剂图案。通过光致抗蚀剂图案蚀刻钝化层和下面的层以形成半导体图案和接触窗口。然后由氧化铟锡或氧化铟锌形成像素电极，辅助栅极焊盘和补充数据焊盘。栅极和数据线组件可以形成为单层结构。在形成像素电极之前，可以在结构化衬底上形成黑色矩阵和滤色器，并且可以在像素电极和数据线之间形成开口部分，以防止可能的短路。

6. 发明申请

US20050023534A1 Thin film transistor array panel for a liquid crystal display and a method for manufacturing the same 有权
标题翻译：一种用于液晶显示器的薄膜晶体管阵列面板及其制造方法
公开(公告)号：US20050023534A1
公开(公告)日：2005-02-03
申请号：US10933545
申请日：2004-09-03
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： G09F9/30 , G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/336 , H01L29/417 , H01L29/786 , H01L29/04 , H01L31/036
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

7. 发明授权

US06787809B2 Thin film transistor array panel 有权
标题翻译：薄膜晶体管阵列面板
公开(公告)号：US06787809B2
公开(公告)日：2004-09-07
申请号：US10644917
申请日：2003-08-21
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L2904
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

8. 发明授权

US06642074B2 Method for manufacturing thin film transistor array panel for LCD having a quadruple layer by a second photolithography process 有权
标题翻译：用于通过第二光刻工艺制造具有四重层的用于LCD的薄膜晶体管阵列面板的方法
公开(公告)号：US06642074B2
公开(公告)日：2003-11-04
申请号：US10172982
申请日：2002-06-18
申请人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
发明人： Mun-Pyo Hong , Woon-Yong Park , Jong-Soo Yoon
IPC分类号： H01L2100
CPC分类号： G02F1/13458 , G02F1/1362 , G02F1/136227 , G02F2001/136236 , H01L27/12 , H01L27/124 , H01L27/1288 , H01L29/41733 , H01L29/458 , Y10S438/942 , Y10S438/947 , Y10S438/949
摘要： Simplified method of manufacturing liquid crystal displays. A gate wire including a gate line, a gate pad and a gate electrode is formed on the substrate by using the first mask. A gate insulating layer, a semiconductor layer, a ohmic contact layer and a metal layer are sequentially deposited to make a quadruple layers, and patterned by a dry etch of using the second mask. At this time, the quadruple layers is patterned to have a matrix of net shape layout and covering the gate wire. An opening exposing the substrate is formed in the display area and a contact hole exposing the gate pad is formed in the peripheral area. Next, ITO is deposited and a photoresist layer coated on the ITO. Then, the ITO layer is patterned by using the third mask and a dry etch, and the data conductor layer and the ohmic contact layer not covered by the ITO layer is dry etched. After depositing a passivation layer, a opening is formed by using the fourth mask and the exposed semiconductor layer through the opening is etched to separate the semiconductor layer under the adjacent data line.
摘要翻译：制造液晶显示器的简化方法。通过使用第一掩模在基板上形成包括栅极线，栅极焊盘和栅电极的栅极线。依次沉积栅极绝缘层，半导体层，欧姆接触层和金属层以制成四层，并通过使用第二掩模的干蚀刻图案化。此时，四层被图案化以具有网状布局的矩阵并覆盖栅极线。在显示区域形成露出基板的开口，在周边区域形成露出栅极焊盘的接触孔。接下来，沉积ITO并且涂覆在ITO上的光致抗蚀剂层。然后，通过使用第三掩模和干蚀刻对ITO层进行图案化，并且数据导体层和未被ITO层覆盖的欧姆接触层被干蚀刻。在沉积钝化层之后，通过使用第四掩模形成开口，并蚀刻通过开口的暴露的半导体层以将相邻数据线下的半导体层分离。

9. 发明授权

US06586286B2 Method for fabricating thin film transistor array substrate for liquid crystal display 有权
公开(公告)号：US06586286B2
公开(公告)日：2003-07-01
申请号：US10075584
申请日：2002-02-15
申请人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
发明人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
IPC分类号： H01L2904
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136222 , G02F2001/136231 , G02F2001/13629 , G02F2201/40 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908
摘要： A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area. The passivation layer and the underlying layers are etched through the photoresist pattern to form a semiconductor pattern and contact windows. A pixel electrode, a supplemental gate pad and a supplemental data pad are then formed of indium tin oxide or indium zinc oxide. The gate and data line assemblies may be formed with a single layered structure. A black matrix and a color filter may be formed at the structured substrate before forming the pixel electrode, and an opening portion may be formed between the pixel electrode and the data line to prevent possible short circuits.

10. 再颁专利

USRE42670E1 Thin film transistor array substrate for a liquid crystal display 有权
标题翻译：用于液晶显示器的薄膜晶体管阵列基板
公开(公告)号：USRE42670E1
公开(公告)日：2011-09-06
申请号：US11827989
申请日：2007-07-13
申请人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
发明人： Woon-Yong Park , Jong-Soo Yoon , Chang-Oh Jeong
IPC分类号： H01L29/04
CPC分类号： G02F1/13458 , G02F1/136286 , G02F2001/136222 , G02F2001/136231 , G02F2001/13629 , G02F2201/40 , H01L27/124 , H01L27/1288 , H01L29/458 , H01L29/4908
摘要： A thin film transistor substrate for a liquid crystal display includes an insulating substrate, and a gate line assembly formed on the substrate. The gate line assembly has a double-layered structure with a lower layer exhibiting good contact characteristics with respect to indium tin oxide, and an upper layer exhibiting low resistance characteristics. A gate insulating layer, a semiconductor layer, a contact layer, and first and second data line layers are sequentially deposited onto the substrate with the gate line assembly. The first and second data line layers are patterned to form a data line assembly, and the contact layer is etched through the pattern of the data line assembly such that the contact layer has the same pattern as the data line assembly. A passivation layer is deposited onto the data line assembly, and a photoresist pattern is formed on the passivation layer by using a mask of different light transmissties mainly at a display area and a peripheral area. The passivation layer and the underlying layers are etched through the photoresist pattern to form a semiconductor pattern and contact windows. A pixel electrode, a supplemental gate pad and a supplemental data pad are then formed of indium tin oxide or indium zinc oxide. The gate and data line assemblies may be formed with a single layered structure. A black matrix and a color filter may be formed at the structured substrate before forming the pixel electrode, and an opening portion may be formed between the pixel electrode and the data line to prevent possible short circuits.
摘要翻译：用于液晶显示器的薄膜晶体管衬底包括绝缘衬底和形成在衬底上的栅极线组件。栅极线组件具有双层结构，其具有相对于氧化铟锡具有良好接触特性的较低层，以及表现出低电阻特性的上层。栅极绝缘层，半导体层，接触层以及第一和第二数据线层被栅极线组件依次沉积到衬底上。图案化第一和第二数据线层以形成数据线组件，并且通过数据线组件的图案蚀刻接触层，使得接触层具有与数据线组件相同的图案。钝化层沉积到数据线组件上，并且主要在显示区域和周边区域上通过使用不同光透射掩模在钝化层上形成光致抗蚀剂图案。通过光致抗蚀剂图案蚀刻钝化层和下面的层以形成半导体图案和接触窗口。然后由氧化铟锡或氧化铟锌形成像素电极，辅助栅极焊盘和补充数据焊盘。栅极和数据线组件可以形成为单层结构。在形成像素电极之前，可以在结构化衬底上形成黑色矩阵和滤色器，并且可以在像素电极和数据线之间形成开口部分，以防止可能的短路。

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