专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20070085207A1 Pad structure, method of forming a pad structure, semiconductor device having a pad structure and method of manufacturing a semiconductor device 审中-公开
标题翻译：衬垫结构，形成衬垫结构的方法，具有衬垫结构的半导体器件和制造半导体器件的方法
公开(公告)号：US20070085207A1
公开(公告)日：2007-04-19
申请号：US11497279
申请日：2006-08-02
申请人： Woo-Sung Lee , Young-Wook Park , Nam-Kyu Kim , Bong-Hyun Kim , Man-Sug Kang
发明人： Woo-Sung Lee , Young-Wook Park , Nam-Kyu Kim , Bong-Hyun Kim , Man-Sug Kang
IPC分类号： H01L21/44 , H01L23/48 , H01L23/52 , H01L29/40 , H01L21/4763
CPC分类号： H01L23/485 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/28562 , H01L21/76831 , H01L21/76879 , H01L21/76889 , H01L21/76895 , H01L21/823425 , H01L21/823475 , H01L2924/0002 , H01L2924/00
摘要： A pad structure, a method of forming a pad structure, a semiconductor device having a pad structure and a method of manufacturing a semiconductor device are disclosed. The pad structure may include a first pad, a second pad, a third pad and/or a spacer. The first pad may contact a contact region on a substrate. The first pad may include doped polysilicon. The second pad may contact the first pad. The second pad may include a metal silicide or a metal silicongermanium. The third pad may contact the second pad. The third pad may include a conductive material (e.g., doped polysilicon, a metal or a metal nitride). The spacer may be formed on sidewalls of the second and the third pads.
摘要翻译：公开了一种焊盘结构，形成焊盘结构的方法，具有焊盘结构的半导体器件和制造半导体器件的方法。垫结构可以包括第一垫，第二垫，第三垫和/或间隔件。第一焊盘可以接触衬底上的接触区域。第一焊盘可以包括掺杂多晶硅。第二垫可以接触第一垫。第二焊盘可以包括金属硅化物或金属硅石。第三垫可以接触第二垫。第三焊盘可以包括导电材料（例如，掺杂多晶硅，金属或金属氮化物）。间隔件可以形成在第二和第三焊盘的侧壁上。

2. 发明授权

US07498213B2 Methods of fabricating a semiconductor substrate for reducing wafer warpage 失效
标题翻译：制造半导体衬底以减少晶片翘曲的方法
公开(公告)号：US07498213B2
公开(公告)日：2009-03-03
申请号：US11530218
申请日：2006-09-08
申请人： Won-Jin Kim , Young-Wook Park , Jeong-Do Ryu
发明人： Won-Jin Kim , Young-Wook Park , Jeong-Do Ryu
IPC分类号： H01L21/338 , H01L21/336
CPC分类号： H01L21/0209 , H01L21/302 , H01L21/6708 , H01L21/76895 , H01L27/10844 , H01L27/10882 , H01L29/7842
摘要： Methods of fabricating a semiconductor device can include forming at least one layer on a first and a second side of a semiconductor substrate. Portions of the at least one layer may be removed on the first side of the semiconductor substrate to form a pattern of the at least one layer on the first side of the substrate while the at least one layer is maintained on the second side of the substrate. A capping layer can be formed on the pattern of the at least one layer on the first side of the substrate and on the at least one layer on the second side of the semiconductor substrate. The capping layer can be removed on the second side of the semiconductor substrate, thereby exposing the at least one layer on the second side of the substrate while maintaining the capping layer on the first side of the substrate. The at least one layer can be removed on the second side of the semiconductor substrate, while the capping layer and the pattern of the at least one layer is maintained on the first side of the semiconductor substrate. A portion of the capping layer can be removed on the first side of the semiconductor substrate.
摘要翻译：制造半导体器件的方法可以包括在半导体衬底的第一和第二侧上形成至少一个层。可以在半导体衬底的第一侧上去除至少一个层的部分，以在衬底的第一侧上形成至少一层的图案，同时将至少一层保持在衬底的第二面上。可以在衬底的第一侧上的至少一层的图案和半导体衬底的第二侧上的至少一个层上形成覆盖层。可以在半导体衬底的第二侧上去除覆盖层，从而在衬底的第二侧上保持覆盖层的同时暴露衬底的第二面上的至少一个层。可以在半导体衬底的第二侧上移除至少一个层，同时覆盖层和至少一层的图案保持在半导体衬底的第一侧上。可以在半导体衬底的第一侧上去除覆盖层的一部分。

3. 发明授权

US07201807B2 Method for cleaning a deposition chamber and deposition apparatus for performing in situ cleaning 有权
标题翻译：清洁沉积室和沉积设备进行原位清洗的方法
公开(公告)号：US07201807B2
公开(公告)日：2007-04-10
申请号：US10734479
申请日：2003-12-12
申请人： Eun-Taek Yim , Young-Wook Park , In-Sung Park , Han-Mei Choi , Kyoung-Seok Kim
发明人： Eun-Taek Yim , Young-Wook Park , In-Sung Park , Han-Mei Choi , Kyoung-Seok Kim
IPC分类号： B08B5/00 , B08B9/093
CPC分类号： C23C16/4405 , B08B7/00 , B08B7/0035 , H01J37/32862 , H01L21/3162 , Y10S438/905
摘要： Disclosed are a method for cleaning a deposition chamber by removing attached metal oxides, and a deposition apparatus for performing in situ cleaning. A first gas and a second gas are provided into the deposition chamber. The first gas is reacted with metal included in the metal oxide to generate reacting residues. The second gas then decomposes the reacting residues, and the decomposed residues are exhausted out of the chamber. Thus, this cleaning process can be rapidly accomplished while the deposition chamber is not opened or separated from a deposition apparatus.
摘要翻译：公开了通过去除附着的金属氧化物来清洁沉积室的方法，以及用于进行原位清洁的沉积装置。第一气体和第二气体被提供到沉积室中。第一种气体与包含在金属氧化物中的金属反应以产生反应残余物。然后第二气体分解反应残余物，并将分解的残余物排出室外。因此，当沉积室不从沉积设备打开或分离时，可以快速实现该清洁过程。

4. 发明申请

US20070004211A1 METHODS OF FABRICATING A SEMICONDUCTOR SUBSTRATE FOR REDUCING WAFER WARPAGE 失效
标题翻译：制造半导体基板以减少波纹的方法
公开(公告)号：US20070004211A1
公开(公告)日：2007-01-04
申请号：US11530218
申请日：2006-09-08
申请人： Won Kim , Young-Wook Park , Jeong-Do Ryu
发明人： Won Kim , Young-Wook Park , Jeong-Do Ryu
IPC分类号： H01L21/461 , H01L21/302
CPC分类号： H01L21/0209 , H01L21/302 , H01L21/6708 , H01L21/76895 , H01L27/10844 , H01L27/10882 , H01L29/7842
摘要： Methods of fabricating a semiconductor device can include forming at least one layer on a first and a second side of a semiconductor substrate. Portions of the at least one layer may be removed on the first side of the semiconductor substrate to form a pattern of the at least one layer on the first side of the substrate while the at least one layer is maintained on the second side of the substrate. A capping layer can be formed on the pattern of the at least one layer on the first side of the substrate and on the at least one layer on the second side of the semiconductor substrate. The capping layer can be removed on the second side of the semiconductor substrate, thereby exposing the at least one layer on the second side of the substrate while maintaining the capping layer on the first side of the substrate. The at least one layer can be removed on the second side of the semiconductor substrate, while the capping layer and the pattern of the at least one layer is maintained on the first side of the semiconductor substrate. A portion of the capping layer can be removed on the first side of the semiconductor substrate.
摘要翻译：制造半导体器件的方法可以包括在半导体衬底的第一和第二侧上形成至少一个层。可以在半导体衬底的第一侧上去除至少一个层的部分，以在衬底的第一侧上形成至少一层的图案，同时将至少一层保持在衬底的第二面上。可以在衬底的第一侧上的至少一层的图案和半导体衬底的第二侧上的至少一个层上形成覆盖层。可以在半导体衬底的第二侧上去除覆盖层，从而在衬底的第二侧上保持覆盖层的同时暴露衬底的第二面上的至少一个层。可以在半导体衬底的第二侧上移除至少一个层，同时覆盖层和至少一层的图案保持在半导体衬底的第一侧上。可以在半导体衬底的第一侧上去除覆盖层的一部分。

5. 发明申请

US20060128127A1 Method of depositing a metal compound layer and apparatus for depositing a metal compound layer 审中-公开
标题翻译：沉积金属化合物层的方法和沉积金属化合物层的装置
公开(公告)号：US20060128127A1
公开(公告)日：2006-06-15
申请号：US11290648
申请日：2005-12-01
申请人： Jung-Hun Seo , Young-Wook Park , Jin-Gi Hong , Kyung-Bum Koo , Eun-Taeck Lee
发明人： Jung-Hun Seo , Young-Wook Park , Jin-Gi Hong , Kyung-Bum Koo , Eun-Taeck Lee
IPC分类号： H01L21/20
CPC分类号： H01L21/28562 , C23C16/34 , C23C16/45523 , C23C16/45561 , C23C16/45565 , C23C16/45574
摘要： In a method and an apparatus for depositing a metal compound layer, a first source gas and a second source gas may be provided onto a substrate to deposit a first metal compound layer on the substrate. The first source gas may include a metal and halogen elements, and the second source gas may include a first material capable of being reacted with the metal and a second material capable of being reacted with the halogen element. The first and the second source gases may be provided at a first flow rate ratio. A second metal compound layer may be deposited on the first metal compound layer by providing the first and the second source gases with a second flow rate ratio different from the first flow rate ratio. The apparatus may include a process chamber configured to receive a substrate, a gas supply system, and a flow rate control device.
摘要翻译：在用于沉积金属化合物层的方法和装置中，可以将第一源气体和第二源气体提供到衬底上以在衬底上沉积第一金属化合物层。第一源气体可以包括金属和卤素元素，并且第二源气体可以包括能够与金属反应的第一材料和能够与卤素元素反应的第二材料。第一和第二源气体可以以第一流量比提供。可以通过使第一和第二源气体具有与第一流量比不同的第二流量比，将第二金属化合物层沉积在第一金属化合物层上。该装置可以包括被配置为接收基板，气体供应系统和流量控制装置的处理室。

6. 发明授权

US06989338B2 Method for forming a multi-layered structure of a semiconductor device and methods for forming a capacitor and a gate insulation layer using the multi-layered structure 失效
标题翻译：用于形成半导体器件的多层结构的方法以及使用该多层结构形成电容器和栅极绝缘层的方法
公开(公告)号：US06989338B2
公开(公告)日：2006-01-24
申请号：US10737394
申请日：2003-12-15
申请人： Han-Mei Choi , Young-Wook Park , Eun-Taek Yim , Dong-Jo Kang , Kyoung-Seok Kim
发明人： Han-Mei Choi , Young-Wook Park , Eun-Taek Yim , Dong-Jo Kang , Kyoung-Seok Kim
IPC分类号： H01L21/26
CPC分类号： H01L21/28194 , H01L29/513 , H01L29/517
摘要： Disclosed is a method for forming a multi-layered structure having at least two films on a semiconductor substrate. The substrate is disposed on a thermally conductible stage for supporting the substrate. After the distance between the stage and the substrate is adjusted to a first interval so that the substrate has a first temperature by heat transferred from the stage, a first thin film is formed on the substrate at the first temperature. The distance is then adjusted from the first interval to a second interval so that the substrate reaches a second temperature, and then a second thin film is formed on the first thin film at the second temperature, thereby forming the multi-layered structure on the substrate. The multi-layered structure can be employed for a gate insulation film or the dielectric film of a capacitor.
摘要翻译：公开了一种在半导体衬底上形成至少具有两个膜的多层结构的方法。基板设置在用于支撑基板的导热性台上。在阶段和衬底之间的距离被调整到第一间隔，使得衬底具有通过从载物台传递的热量的第一温度，在第一温度下在衬底上形成第一薄膜。然后将距离从第一间隔调整到第二间隔，使得衬底达到第二温度，然后在第二温度下在第一薄膜上形成第二薄膜，从而在衬底上形成多层结构。多层结构可以用于栅极绝缘膜或电容器的电介质膜。

7. 发明申请

US20050054189A9 Methods of fabricating integrated circuit devices providing improved short prevention 有权
标题翻译：提供改进的短预防的集成电路器件的制造方法
公开(公告)号：US20050054189A9
公开(公告)日：2005-03-10
申请号：US10706647
申请日：2003-11-12
申请人： Hyoung-Joon Kim , Young-Wook Park , Byeong-Yun Nam
发明人： Hyoung-Joon Kim , Young-Wook Park , Byeong-Yun Nam
IPC分类号： H01L21/28 , H01L21/302 , H01L21/3065 , H01L21/3205 , H01L21/60 , H01L21/768 , H01L21/8242 , H01L23/522 , H01L27/10 , H01L27/108 , H01L21/336 , H01L21/4763
CPC分类号： H01L21/76831 , H01L21/76885 , H01L21/76897 , H01L27/10855 , H01L27/10885
摘要： The present invention provides methods of fabricating integrated circuit devices that include a microelectronic substrate and a conductive layer disposed on the microelectronic substrate. An insulating layer is disposed on the conductive layer and the insulating layer includes an overhanging portion that extends beyond the conductive layer. A sidewall insulating region is disposed laterally adjacent to a sidewall of the conductive layer and extends between the overhanging portion of the insulating layer and the microelectronic substrate.
摘要翻译：本发明提供制造集成电路器件的方法，该器件包括微电子衬底和设置在微电子衬底上的导电层。绝缘层设置在导电层上，绝缘层包括延伸超过导电层的伸出部分。侧壁绝缘区域横向地布置在导电层的侧壁附近并且在绝缘层的悬垂部分和微电子衬底之间延伸。

8. 发明授权

US06680511B2 Integrated circuit devices providing improved short prevention 有权
标题翻译：提供改进的短预防的集成电路器件
公开(公告)号：US06680511B2
公开(公告)日：2004-01-20
申请号：US10052721
申请日：2002-01-18
申请人： Hyoung-Joon Kim , Young-Wook Park , Byeong-Yun Nam
发明人： Hyoung-Joon Kim , Young-Wook Park , Byeong-Yun Nam
IPC分类号： H01L2976
CPC分类号： H01L21/76831 , H01L21/76885 , H01L21/76897 , H01L27/10855 , H01L27/10885
摘要： The present invention provide integrated circuit devices and methods of fabricating the same that include a microelectronic substrate and a conductive layer disposed on the microelectronic substrate. An insulating layer is disposed on the conductive layer and the insulating layer includes an overhanging portion that extends beyond the conductive layer. A sidewall insulating region is disposed laterally adjacent to a sidewall of the conductive layer and extends between the overhanging portion of the insulating layer and the microelectronic substrate.
摘要翻译：本发明提供集成电路器件及其制造方法，其包括微电子衬底和设置在微电子衬底上的导电层。绝缘层设置在导电层上，绝缘层包括延伸超过导电层的伸出部分。侧壁绝缘区域横向地布置在导电层的侧壁附近并且在绝缘层的悬垂部分和微电子衬底之间延伸。

9. 发明授权

US08039054B2 Layer deposition methods 失效
标题翻译：层沉积方法
公开(公告)号：US08039054B2
公开(公告)日：2011-10-18
申请号：US10854942
申请日：2004-05-27
申请人： In-Sung Park , Young-Wook Park , Myeong-Jin Kim , Eun-Taek Yim , Han-Mei Choi , Kyoung-Seok Kim , Beung-Keun Lee
发明人： In-Sung Park , Young-Wook Park , Myeong-Jin Kim , Eun-Taek Yim , Han-Mei Choi , Kyoung-Seok Kim , Beung-Keun Lee
IPC分类号： C23C16/00
CPC分类号： C23C16/45531 , C23C16/403 , C23C16/45527 , C23C16/45561
摘要： A layer deposition method includes: feeding a reactant with a first flow of an inert gas as a carrier gas into a reaction chamber to chemisorb the reactant on a substrate; feeding the first flow of the inert gas to purge the reaction chamber and a first reactant feed line; and feeding the second flow of the inert gas into the reaction chamber through a feed line different from the first reactant feed line.
摘要翻译：层沉积方法包括：将具有作为载气的惰性气体的第一流的反应物进料到反应室中以化学吸附基材上的反应物; 供给惰性气体的第一流以吹扫反应室和第一反应物进料管线; 以及通过不同于第一反应物进料管线的进料管线将惰性气体的第二流量进料到反应室中。

10. 发明授权

US07763550B2 Method of forming a layer on a wafer 失效
标题翻译：在晶片上形成层的方法
公开(公告)号：US07763550B2
公开(公告)日：2010-07-27
申请号：US11061407
申请日：2005-02-18
申请人： Ji-Sang Yahng , Young-Wook Park , Jae-Jong Han , Jum-Soo Chang
发明人： Ji-Sang Yahng , Young-Wook Park , Jae-Jong Han , Jum-Soo Chang
IPC分类号： H01L21/31 , H01L21/677 , C23C16/00
CPC分类号： H01L21/02238 , H01L21/02255 , H01L21/31662 , H01L21/67109 , H01L21/67757 , Y10S414/136 , Y10S414/139
摘要： A layer is formed on a semiconductor wafer in an apparatus having a processing chamber, a transferring chamber, and a wafer boat. The boat having the semiconductor wafer thereon is rotated in the transferring chamber. While the boat is rotated, the boat is transferred between the transferring chamber and the processing chamber and a reaction gas is provided to the processing chamber to form the layer on the wafer.
摘要翻译：在具有处理室，转印室和晶片舟皿的装置中的半导体晶片上形成层。其上具有半导体晶片的船在转印室中旋转。当船旋转时，船在转移室和处理室之间转移，并且反应气体被提供到处理室以在晶片上形成层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式