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1. 发明授权

US06747331B2 Method and packaging structure for optimizing warpage of flip chip organic packages 有权
公开(公告)号：US06747331B2
公开(公告)日：2004-06-08
申请号：US10197335
申请日：2002-07-17
申请人： William Infantolino , Li Li , Steven G. Rosser , Sanjeev Balwant Sathe
发明人： William Infantolino , Li Li , Steven G. Rosser , Sanjeev Balwant Sathe
IPC分类号： H01L3100
CPC分类号： H01L23/49838 , H01L21/563 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00014 , H01L2924/01029 , H01L2924/10253 , H01L2924/12044 , H01L2924/15311 , H01L2924/3511 , H01L2924/00 , H01L2224/0401
摘要： An electronic packaging structure and method of forming thereof wherein the structure is constituted of a modular arrangement which reduces stresses generated in a chip, underfill, and ball grid array connection with a flexible substrate in the form of an organic material, which stresses may result in potential delamination due to thermally-induced warpage between the components of the modular arrangement.

2. 发明授权

US07026706B2 Method and packaging structure for optimizing warpage of flip chip organic packages 失效
标题翻译：用于优化倒装芯片有机封装翘曲的方法和封装结构
公开(公告)号：US07026706B2
公开(公告)日：2006-04-11
申请号：US10771728
申请日：2004-02-04
申请人： William Infantolino , Li Li , Steven G. Rosser , Sanjeev Balwant Sathe
发明人： William Infantolino , Li Li , Steven G. Rosser , Sanjeev Balwant Sathe
IPC分类号： H01L23/48
CPC分类号： H01L23/49838 , H01L21/563 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/00014 , H01L2924/01029 , H01L2924/10253 , H01L2924/12044 , H01L2924/15311 , H01L2924/3511 , H01L2924/00 , H01L2224/0401
摘要： An electronic packaging structure and method of forming thereof wherein the structure is constituted of a modular arrangement which reduces stresses generated in a chip, underfill, and ball grid array connection with a flexible substrate in the form of an organic material, which stresses may result in potential delamination due to thermally-induced warpage between the components of the modular arrangement.
摘要翻译：一种电子封装结构及其形成方法，其中该结构由模块化布置构成，该模块布置减少了以有机材料形式的柔性基板的芯片，底部填充和球栅阵列连接中产生的应力，该应力可导致由于模块化布置的组件之间的热引起的翘曲引起的潜在的分层。

3. 发明授权

US06627998B1 Wafer scale thin film package 有权
标题翻译：晶圆级薄膜封装
公开(公告)号：US06627998B1
公开(公告)日：2003-09-30
申请号：US09626904
申请日：2000-07-27
申请人： David Vincent Caletka , Seungbae Park , Sanjeev Balwant Sathe
发明人： David Vincent Caletka , Seungbae Park , Sanjeev Balwant Sathe
IPC分类号： H01L2348
CPC分类号： H01L24/29 , H01L21/563 , H01L23/3114 , H01L23/525 , H01L24/16 , H01L24/32 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/0231 , H01L2224/02319 , H01L2224/02333 , H01L2224/0401 , H01L2224/10122 , H01L2224/11001 , H01L2224/16111 , H01L2224/16225 , H01L2224/29 , H01L2224/29011 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/73103 , H01L2224/73203 , H01L2224/81138 , H01L2224/81192 , H01L2224/81801 , H01L2224/83101 , H01L2224/83194 , H01L2924/00011 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01076 , H01L2924/01078 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/15787 , H01L2924/1579 , H01L2924/30107 , H05K3/3436 , H05K2201/10977 , H05K2201/2036 , Y02P70/613 , Y10S438/94 , Y10S438/977 , H01L2924/00 , H01L2924/01047 , H01L2924/0105 , H01L2924/01083 , H01L2924/01082 , H01L2224/13111 , H01L2924/00014 , H01L2224/29099 , H01L2224/29199 , H01L2924/00012 , H01L2224/81805
摘要： A chip module having a chip with a flexible multilayer redistribution thin film attached thereto for connection to a substrate. The thin film acts as both a redistribution medium with multiple layers of redistribution metallurgy for chip power and signals and as a compliant medium to relieve stresses caused by thermal expansion mismatch between chip and substrate. Modules comprising chip and thin film may be fabricated at the chip or wafer level. The upper surface of the thin film has an array of pads matching the array of pads on the chip or wafer while the lower surface has pads matching those of the substrate. The multilayer thin film is first formed on a temporary substrate and then the chip is attached to the thin film before release from the temporary substrate. After release, the module is ready for mounting to the second level packaging substrate, such as a chip carrier or PCB. Where the multilayer thin film is formed directly on a wafer, the wafer is then diced to form the module.
摘要翻译：一种芯片模块，具有连接到基板上的具有柔性多层再分布薄膜的芯片。该薄膜同时具有用于芯片功率和信号的具有多层再分配冶金的再分配介质，并且作为缓解由芯片和衬底之间的热膨胀失配引起的应力的柔顺介质。包括芯片和薄膜的模块可以在芯片或晶片级制造。薄膜的上表面具有与芯片或晶片上的焊盘阵列匹配的焊盘阵列，而下表面具有与衬底相匹配的焊盘。首先在临时衬底上形成多层薄膜，然后在从临时衬底释放之前将芯片附着到薄膜上。释放后，模块已准备好安装到第二级封装基板，如芯片载体或PCB。在多层薄膜直接形成在晶片上的情况下，切割晶片以形成模块。

4. 发明授权

US06245186B1 Electronic package with compressible heatsink structure 失效
标题翻译：具有可压缩散热器结构的电子封装
公开(公告)号：US06245186B1
公开(公告)日：2001-06-12
申请号：US09225192
申请日：1999-01-05
申请人： David James Alcoe , Sanjeev Balwant Sathe
发明人： David James Alcoe , Sanjeev Balwant Sathe
IPC分类号： B32B3100
CPC分类号： H01L23/3733 , H01L21/563 , H01L23/3677 , H01L23/4093 , H01L23/433 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01019 , H01L2924/01322 , Y10T156/1089 , Y10T156/1093 , H01L2924/00
摘要： An electronic package wherein an electronic device (e.g., chip) on a circuitized substrate of the package is thermally coupled to a heatsink in a separable manner using a plurality of compressible, thermally conductive members (e.g., solder balls). These members are compressed and permanently deformed as part of the thermal coupling.
摘要翻译：电子封装，其中封装的电路化基板上的电子器件（例如，芯片）使用多个可压缩的导热构件（例如，焊球）以可分离的方式热耦合到散热器。这些构件被压缩并作为热耦合的一部分永久地变形。

5. 发明授权

US5863814A Electronic package with compressible heatsink structure 失效
标题翻译：具有可压缩散热器结构的电子封装
公开(公告)号：US5863814A
公开(公告)日：1999-01-26
申请号：US886281
申请日：1997-07-01
申请人： David James Alcoe , Sanjeev Balwant Sathe
发明人： David James Alcoe , Sanjeev Balwant Sathe
IPC分类号： H05K7/20 , H01L21/56 , H01L23/12 , H01L23/34 , H01L23/36 , H01L23/367 , H01L23/373 , H01L23/40 , H01L23/433 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L23/3733 , H01L21/563 , H01L23/3677 , H01L23/4093 , H01L23/433 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2924/01019 , H01L2924/01322 , Y10T156/1089 , Y10T156/1093
摘要： An electronic package wherein an electronic device (e.g., chip) on a circuitized substrate of the package is thermally coupled to a heatsink in a separable manner using a plurality of compressible, thermally conductive members (e.g., solder balls). These members are compressed and permanently deformed as part of the thermal coupling.
摘要翻译：电子封装，其中封装的电路化基板上的电子器件（例如，芯片）使用多个可压缩的导热构件（例如，焊球）以可分离的方式热耦合到散热器。这些构件被压缩并作为热耦合的一部分永久地变形。

6. 发明授权

US07348261B2 Wafer scale thin film package 有权
标题翻译：晶圆级薄膜封装
公开(公告)号：US07348261B2
公开(公告)日：2008-03-25
申请号：US10438947
申请日：2003-05-15
申请人： David Vincent Caletka , Seungbae Park , Sanjeev Balwant Sathe
发明人： David Vincent Caletka , Seungbae Park , Sanjeev Balwant Sathe
IPC分类号： H01L21/30 , H01L21/46 , H01L21/469
CPC分类号： H01L24/29 , H01L21/563 , H01L23/3114 , H01L23/525 , H01L24/16 , H01L24/32 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/0231 , H01L2224/02319 , H01L2224/02333 , H01L2224/0401 , H01L2224/10122 , H01L2224/11001 , H01L2224/16111 , H01L2224/16225 , H01L2224/29 , H01L2224/29011 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/73103 , H01L2224/73203 , H01L2224/81138 , H01L2224/81192 , H01L2224/81801 , H01L2224/83101 , H01L2224/83194 , H01L2924/00011 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01076 , H01L2924/01078 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/15787 , H01L2924/1579 , H01L2924/30107 , H05K3/3436 , H05K2201/10977 , H05K2201/2036 , Y02P70/613 , Y10S438/94 , Y10S438/977 , H01L2924/00 , H01L2924/01047 , H01L2924/0105 , H01L2924/01083 , H01L2924/01082 , H01L2224/13111 , H01L2924/00014 , H01L2224/29099 , H01L2224/29199 , H01L2924/00012 , H01L2224/81805
摘要： A chip module having a chip with a flexible multilayer redistribution thin film attached thereto for connection to a substrate. The thin film acts as both a redistribution medium with multiple layers of redistribution metallurgy for chip power and signals and as a compliant medium to relieve stresses caused by thermal expansion mismatch between chip and substrate. Modules comprising chip and thin film may be fabricated at the chip or wafer level. The upper surface of the thin film has an array of pads matching the array of pads on the chip or wafer while the lower surface has pads matching those of the substrate. The multilayer thin film is first formed on a temporary substrate and then the chip is attached to the thin film before release from the temporary substrate. After release, the module is ready for mounting to the second level packaging substrate, such as a chip carrier or PCB. Where the multilayer thin film is formed directly on a wafer, the wafer is then diced to form the module.
摘要翻译：一种芯片模块，具有连接到基板上的具有柔性多层再分布薄膜的芯片。该薄膜同时具有用于芯片功率和信号的具有多层再分配冶金的再分配介质，并且作为缓解由芯片和衬底之间的热膨胀失配引起的应力的柔顺介质。包括芯片和薄膜的模块可以在芯片或晶片级制造。薄膜的上表面具有与芯片或晶片上的焊盘阵列匹配的焊盘阵列，而下表面具有与衬底相匹配的焊盘。首先在临时衬底上形成多层薄膜，然后在从临时衬底释放之前将芯片附着到薄膜上。释放后，模块已准备好安装到第二级封装基板，如芯片载体或PCB。在多层薄膜直接形成在晶片上的情况下，切割晶片以形成模块。

7. 发明授权

US6058015A Electronic packages and a method to improve thermal performance of electronic packages 失效
标题翻译：电子封装和提高电子封装热性能的方法
公开(公告)号：US6058015A
公开(公告)日：2000-05-02
申请号：US329131
申请日：1999-06-09
申请人： Bahgat Ghaleb Sammakia , Sanjeev Balwant Sathe
发明人： Bahgat Ghaleb Sammakia , Sanjeev Balwant Sathe
IPC分类号： H01L21/50 , H01L23/36 , H05K7/20
CPC分类号： H01L21/50 , H01L23/36 , H01L2924/15311
摘要： An electronic package incorporating a heat-generating element which is thermally coupled to a heat-sinking member, through the utilization of a predetermined thermally conductive material, and wherein all of these components are placed in compression during package operation so as to resultingly improve the thermal performance of the electronic package. A method is set forth of improving the thermal performance of an electronic package through the intermediary of compressive forces being generated between the package components during package operation.
摘要翻译：一种电子封装，其包括通过利用预定的导热材料热耦合到散热构件的发热元件，并且其中所有这些组件在封装操作期间被置于压缩中，从而导致热量电子包的性能。提出了一种通过在封装操作期间通过在封装部件之间产生的压缩力来改善电子封装的热性能的方法。

8. 发明授权

US6037658A Electronic package with heat transfer means 失效
标题翻译：具有传热装置的电子包装
公开(公告)号：US6037658A
公开(公告)日：2000-03-14
申请号：US944615
申请日：1997-10-07
申请人： William Louis Brodsky , Glenn Lee Kehley , Sanjeev Balwant Sathe , John Robert Slack
发明人： William Louis Brodsky , Glenn Lee Kehley , Sanjeev Balwant Sathe , John Robert Slack
IPC分类号： H01L23/42 , H01L23/433 , H01L23/10 , H01L23/34
CPC分类号： H01L24/31 , H01L23/42 , H01L23/433 , H01L2224/16225 , H01L2224/27013 , H01L2224/29076 , H01L2224/48247 , H01L2224/73253 , H01L2224/73257 , H01L2224/83051 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01047 , H01L2924/10253
摘要： An electronic package including as part thereof a thermally conductive arrangement for restricting thermal fluid material motion about a heat-generating device, thereby assuring effective heat transference from the heat-generating device (e.g., module) to a cooling member (e.g., spaced heat sink), this arrangement preferably including: (1) a thermal fluid (e.g., thermal grease); and (2) structural elements (e.g., wire mesh, heat sink ridges, etc.). For restricting fluid movement, sealing structures (e.g., external gaskets) may be used to further assure fluid containment to a specified location. Pressure generation means (e.g., a plunger) can be used to increase fluid pressure when pressure droppages occur.
摘要翻译：一种电子封装，其包括作为其导热装置的一部分，用于限制围绕发热装置的热流体材料运动，从而确保从发热装置（例如，模块）到冷却构件（例如，间隔开的散热器）的有效热传递），该布置优选地包括：（1）热流体（例如导热油脂）; 和（2）结构元件（例如，丝网，散热片脊等）。为了限制流体运动，可以使用密封结构（例如，外部垫圈）来进一步确保流体容纳到指定位置。压力产生装置（例如，柱塞）可用于在出现压力降时增加流体压力。

9. 发明申请

US20080119029A1 WAFER SCALE THIN FILM PACKAGE 审中-公开
标题翻译： WAFER SCAL薄膜包装
公开(公告)号：US20080119029A1
公开(公告)日：2008-05-22
申请号：US12015604
申请日：2008-01-17
申请人： David Vincent Caletka , Seungbae Park , Sanjeev Balwant Sathe
发明人： David Vincent Caletka , Seungbae Park , Sanjeev Balwant Sathe
IPC分类号： H01L21/304
CPC分类号： H01L24/29 , H01L21/563 , H01L23/3114 , H01L23/525 , H01L24/16 , H01L24/32 , H01L24/81 , H01L25/0655 , H01L25/50 , H01L2224/0231 , H01L2224/02319 , H01L2224/02333 , H01L2224/0401 , H01L2224/10122 , H01L2224/11001 , H01L2224/16111 , H01L2224/16225 , H01L2224/29 , H01L2224/29011 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/73103 , H01L2224/73203 , H01L2224/81138 , H01L2224/81192 , H01L2224/81801 , H01L2224/83101 , H01L2224/83194 , H01L2924/00011 , H01L2924/00013 , H01L2924/01005 , H01L2924/01006 , H01L2924/0101 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01076 , H01L2924/01078 , H01L2924/0132 , H01L2924/01322 , H01L2924/0133 , H01L2924/014 , H01L2924/0665 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/15787 , H01L2924/1579 , H01L2924/30107 , H05K3/3436 , H05K2201/10977 , H05K2201/2036 , Y02P70/613 , Y10S438/94 , Y10S438/977 , H01L2924/00 , H01L2924/01047 , H01L2924/0105 , H01L2924/01083 , H01L2924/01082 , H01L2224/13111 , H01L2924/00014 , H01L2224/29099 , H01L2224/29199 , H01L2924/00012 , H01L2224/81805
摘要： A chip module having a chip with a flexible multilayer redistribution thin film attached thereto for connection to a substrate. The thin film acts as both a redistribution medium with multiple layers of redistribution metallurgy for chip power and signals and as a compliant medium to relieve stresses caused by thermal expansion mismatch between chip and substrate. Modules comprising chip and thin film may be fabricated at the chip or wafer level. The upper surface of the thin film has an array of pads matching the array of pads on the chip or wafer while the lower surface has pads matching those of the substrate. The multilayer thin film is first formed on a temporary substrate and then the chip is to the thin film before release from the temporary substrate. After release, the module is ready for mounting to the second level packaging substrate, such as a chip carrier or PCB. Where the multilayer thin film is formed directly on a wafer, the wafer is then diced to form the module.
摘要翻译：一种芯片模块，具有连接到基板上的具有柔性多层再分布薄膜的芯片。该薄膜同时具有用于芯片功率和信号的具有多层再分配冶金的再分配介质，并且作为缓解由芯片和衬底之间的热膨胀失配引起的应力的柔性介质。包括芯片和薄膜的模块可以在芯片或晶片级制造。薄膜的上表面具有与芯片或晶片上的焊盘阵列匹配的焊盘阵列，而下表面具有与衬底相匹配的焊盘。首先在临时衬底上形成多层薄膜，然后在从临时衬底释放之前将芯片放在薄膜上。释放后，模块已准备好安装到第二级封装基板，如芯片载体或PCB。在多层薄膜直接形成在晶片上的情况下，切割晶片以形成模块。

10. 发明授权

US5912800A Electronic packages and method to enhance the passive thermal management of electronic packages 失效
标题翻译：电子封装和方法来增强电子封装的被动热管理
公开(公告)号：US5912800A
公开(公告)日：1999-06-15
申请号：US923007
申请日：1997-09-03
申请人： Bahgat Ghaleb Sammakia , Sanjeev Balwant Sathe
发明人： Bahgat Ghaleb Sammakia , Sanjeev Balwant Sathe
IPC分类号： H01L23/467 , H05K7/20
CPC分类号： H01L23/467 , H01L2924/0002
摘要： A method of enhancing the passive thermal management of electronic packages, and an electronic package consisting of a vertically-oriented substrate, such as a printed circuit board or the like, a heat-generating electronic module, for example, containing at least one chip which is positioned on a substrate, and a cover plate located adjacent to the module at a predetermined spaced relationship therefrom. The cover plate includes at least one opening located adjacent the module at a predetermined location relative thereto so as to ensure a maximum cooling air flow impinging on the module, and which air flow thereafter passes upwardly between the substrate and the cover plate. The cover plate may be equipped with a heat-sink structure, such as fins, for cooling the module, which structure is adapted to project through the opening formed in the cover plate or to lie flush therewith.
摘要翻译：一种增强电子封装的被动热管理的方法，以及由诸如印刷电路板等的垂直取向的基板组成的电子封装件，例如包含至少一个芯片的发热电子模块被定位在基板上，并且盖板以与其成预定间隔的关系定位在模块附近。盖板包括在相对于其的预定位置处邻近模块定位的至少一个开口，以便确保撞击在模块上的最大冷却空气流，并且此后的空气流在基板和盖板之间向上通过。盖板可以配备有用于冷却模块的诸如翅片的散热结构，该结构适于突出通过形成在盖板中的开口或与其平齐。

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