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1. 发明授权

US07487285B2 Using out-of-band signaling to provide communication between storage controllers in a computer storage system 有权
标题翻译：使用带外信令来提供计算机存储系统中的存储控制器之间的通信
公开(公告)号：US07487285B2
公开(公告)日：2009-02-03
申请号：US11753058
申请日：2007-05-24
申请人： William G. Holland , Shah Mohammad Rezaul Islam , Gregg S. Lucas , Yoshihiko Terashita
发明人： William G. Holland , Shah Mohammad Rezaul Islam , Gregg S. Lucas , Yoshihiko Terashita
IPC分类号： G06F13/00
CPC分类号： G06F3/0658 , G06F3/0626 , G06F3/0689 , G06F11/2092 , H04L67/1097
摘要： A system provides communication between components of a computer data storage system using out-of-band (OOB) signaling. The system includes a plurality of data storage devices having a local controller for directing data flow to each of the plurality of data storage devices. A switch is coupled to the local controller to direct data to the set of the plurality of data storage devices. First and second initiators are coupled to the switch. The first initiator communicates the OOB signals through the switch alternatively to the local controller or to the second initiator.
摘要翻译：系统提供使用带外（OOB）信令的计算机数据存储系统的组件之间的通信。该系统包括具有本地控制器的多个数据存储装置，用于将数据流引导到多个数据存储装置中的每一个。交换机耦合到本地控制器以将数据引导到多个数据存储设备的集合。第一和第二启动器耦合到开关。第一启动器将OOB信号通过交换机交替地传送到本地控制器或第二启动器。

2. 发明授权

US07356638B2 Using out-of-band signaling to provide communication between storage controllers in a computer storage system 失效
标题翻译：使用带外信令来提供计算机存储系统中的存储控制器之间的通信
公开(公告)号：US07356638B2
公开(公告)日：2008-04-08
申请号：US11248559
申请日：2005-10-12
申请人： William G. Holland , Shah Mohammad Rezaul Islam , Greg S. Lucas , Yoshihiko Terashita
发明人： William G. Holland , Shah Mohammad Rezaul Islam , Greg S. Lucas , Yoshihiko Terashita
IPC分类号： G06F13/00 , G06F12/00 , G06F3/00
CPC分类号： G06F3/0658 , G06F3/0626 , G06F3/0689 , G06F11/2092 , H04L67/1097
摘要： A system provides communication between components of a computer data storage system using out-of-band (OOB) signaling. The system includes a plurality of data storage devices having a local controller for directing data flow to each of the plurality of data storage devices. A switch is coupled to the local controller to direct data to the set of the plurality of data storage devices. First and second initiators are coupled to the switch. The first initiator communicates the OOB signals through the switch alternatively to the local controller or to the second initiator.
摘要翻译：系统提供使用带外（OOB）信令的计算机数据存储系统的组件之间的通信。该系统包括具有本地控制器的多个数据存储装置，用于将数据流引导到多个数据存储装置中的每一个。交换机耦合到本地控制器以将数据引导到多个数据存储设备的集合。第一和第二启动器耦合到开关。第一启动器将OOB信号通过交换机交替地传送到本地控制器或第二启动器。

3. 发明授权

US08547825B2 Switch fabric management 有权
公开(公告)号：US08547825B2
公开(公告)日：2013-10-01
申请号：US13177680
申请日：2011-07-07
申请人： William J. Armstrong , John M. Borkenhagen , Martin J. Crippen , Dhruv M. Desai , David R. Engebretsen , Philip R. Hillier, III , William G. Holland , James E. Hughes , James A. O'Connor , Pravin S. Patel , Steven M. Tri
发明人： William J. Armstrong , John M. Borkenhagen , Martin J. Crippen , Dhruv M. Desai , David R. Engebretsen , Philip R. Hillier, III , William G. Holland , James E. Hughes , James A. O'Connor , Pravin S. Patel , Steven M. Tri
IPC分类号： G01R31/08
CPC分类号： H04L41/24 , H04L41/0659 , H04L49/15
摘要： Techniques are disclosed for managing a switch fabric. In one embodiment, a server system is provided that includes a midplane, one or more server cards, switch modules and a management controller. The midplane may include a fabric interconnect for a switch fabric. The one or more server cards and the switch modules may be operatively connected to the midplane. The switch modules may be configured to switch network traffic for the one or more server cards. The management controller may be configured to manage the switch modules via the fabric interconnect.

4. 发明授权

US07961612B2 Limiting transmission rate of data 有权
标题翻译：限制数据传输速率
公开(公告)号：US07961612B2
公开(公告)日：2011-06-14
申请号：US11566338
申请日：2006-12-04
申请人： Mitchell L. Loeb , Harry Cheselka , William G. Holland , Norman C. Strole , Edward S. Suffern
发明人： Mitchell L. Loeb , Harry Cheselka , William G. Holland , Norman C. Strole , Edward S. Suffern
IPC分类号： G01R31/08
CPC分类号： H04L47/10 , H04L47/22 , H04L47/2441 , H04L47/30 , H04L47/31
摘要： An improved solution for limiting the transmission rate of data over a network is provided according to an aspect of the invention. In particular, the transmission rate for a port is limited by rate limiting one of a plurality of queues (e.g., class/quality of service queues) for the port, and directing all data (e.g., packets) for transmission through the port to the single rate limited queue. In this manner, the transmission rate for the port can be effectively limited to accommodate, for example, a lower transmission rate for a port on a destination node.
摘要翻译：根据本发明的一个方面提供了一种用于限制网络上的数据传输速率的改进的解决方案。特别地，端口的传输速率受限于端口的多个队列（例如，服务队列的类别/服务质量）之一的速率限制，并且引导所有数据（例如，分组）通过端口传输到单速限制队列以这种方式，可以有效地限制端口的传输速率，以适应例如目的地节点上的端口的较低传输速率。

5. 发明授权

US07484029B2 Method, apparatus, and computer usable program code for migrating virtual adapters from source physical adapters to destination physical adapters 有权
标题翻译：将虚拟适配器从源物理适配器迁移到目标物理适配器的方法，设备和计算机可用程序代码
公开(公告)号：US07484029B2
公开(公告)日：2009-01-27
申请号：US11351020
申请日：2006-02-09
申请人： William T. Boyd , Douglas M. Freimuth , William G. Holland , Steven W. Hunter , Renato J. Recio , Steven M. Thurber , Madeline Vega
发明人： William T. Boyd , Douglas M. Freimuth , William G. Holland , Steven W. Hunter , Renato J. Recio , Steven M. Thurber , Madeline Vega
IPC分类号： G06F13/36
CPC分类号： G06F9/5077
摘要： A computer-implemented method, apparatus, and computer usable program code are disclosed for migrating a virtual adapter from a source physical adapter to a destination physical adapter in a data processing system where multiple host computer systems share multiple adapters and communicate with those adapters through a PCI switched-fabric bus. The virtual adapter is first caused to stop processing transactions. All in-flight transactions that are associated with the virtual adapter are then captured. The configuration information that defines the virtual adapter is moved from the source physical adapter to the destination physical adapter. The in-flight transactions are then restored to their original locations on the destination virtual adapter. The virtual adapter is then restarted on the destination physical adapter such that the virtual adapter begins processing transactions.
摘要翻译：公开了一种计算机实现的方法，装置和计算机可用程序代码，用于在数据处理系统中将虚拟适配器从源物理适配器迁移到目标物理适配器，其中多个主机计算机系统共享多个适配器并通过以下方式与这些适配器通信 PCI交换矩阵总线。首先导致虚拟适配器停止处理事务。然后捕获与虚拟适配器关联的所有飞行中事务。定义虚拟适配器的配置信息从源物理适配器移动到目标物理适配器。飞行中的事务然后恢复到目标虚拟适配器上的原始位置。虚拟适配器然后在目标物理适配器上重新启动，以便虚拟适配器开始处理事务。

6. 发明授权

US07430630B2 Routing mechanism in PCI multi-host topologies using destination ID field 失效
标题翻译：使用目的地ID字段的PCI多主机拓扑中的路由机制
公开(公告)号：US07430630B2
公开(公告)日：2008-09-30
申请号：US11260621
申请日：2005-10-27
申请人： William T. Boyd , Douglas M. Freimuth , William G. Holland , Steven W. Hunter , Renato J. Recio , Steven M. Thurber , Madeline Vega
发明人： William T. Boyd , Douglas M. Freimuth , William G. Holland , Steven W. Hunter , Renato J. Recio , Steven M. Thurber , Madeline Vega
IPC分类号： G06F13/00 , G06F13/12 , G06F13/38
CPC分类号： G06F13/4022 , H04L29/1283 , H04L61/6018
摘要： Method and system for address routing in a distributed computing system, such as a distributed computing system that uses PCI Express protocol to communicate over an I/O fabric. A destination identifier is provided to identify a physical or virtual host or end point. When a physical or virtual host or end point receives a PCI data packet it compares a list of source identifiers with destination identifiers to determine if a source identifier included in the transaction packet is associated with a destination identifier included in the transaction packet to determine if the transaction packet has a valid association. If the transaction packet has a valid association, it is routed to the target device. The present invention enables each host that attaches to PCI bridges or switches and shares a set of common PCI devices to have its own PCI 64-bit address space and enables the routing of PCI transaction packets between multiple hosts and adapters, through a PCI switched-fabric bus using a destination identifier.
摘要翻译：分布式计算系统中的地址路由方法和系统，例如使用PCI Express协议通过I / O架构进行通信的分布式计算系统。提供目的地标识符以标识物理或虚拟主机或终点。当物理或虚拟主机或终点接收到PCI数据分组时，将源标识符的列表与目的地标识符进行比较，以确定包括在事务分组中的源标识符是否与包括在事务分组中的目的地标识符相关联，以确定是否事务包具有有效的关联。如果事务包具有有效关联，则将其路由到目标设备。本发明使得连接到PCI桥接器或交换机并且共享一组公共PCI设备的每个主机能够具有其自己的PCI 64位地址空间，并且能够通过PCI交换机地址在多个主机和适配器之间路由PCI事务包， Fabric总线使用目的地标识符。

7. 发明授权

US06338102B1 Efficient data transfer mechanism for input/output devices having a device driver generating a descriptor queue and monitoring a status queue 失效
标题翻译：具有用于产生描述符队列并监视状态队列的设备驱动程序的输入/输出设备的高效数据传输机制
公开(公告)号：US06338102B1
公开(公告)日：2002-01-08
申请号：US09421075
申请日：1999-10-19
申请人： Henry Michael Garrett , William G. Holland , Joseph Franklin Logan , Joseph Gerald McDonald , John Kenneth Stacy
发明人： Henry Michael Garrett , William G. Holland , Joseph Franklin Logan , Joseph Gerald McDonald , John Kenneth Stacy
IPC分类号： G06F1310
CPC分类号： G06F5/065 , G06F3/06 , G06F2205/064 , G06F2205/066
摘要： A method for transferring data between non-contiguous buffers in a memory and an I/O device via a system I/O bus uses a descriptor queue stored in memory. Each descriptor points to a buffer and includes the length of the buffer. The I/O device is provided with the base address of the queue, the length of the queue and a current address which at initialization is the same as the base address. When data is to be transferred a device driver located in the processor sends the number of available descriptors (DescrEnq) to the I/O device which accesses the descriptors individually or in burst mode to gain access to the data buffers identified by the descriptors.
摘要翻译：通过系统I / O总线在存储器和I / O设备中的非连续缓冲器之间传送数据的方法使用存储在存储器中的描述符队列。每个描述符指向缓冲区并包括缓冲区的长度。 I / O设备提供队列的基地址，队列的长度以及初始化时的基址与基地址相同的当前地址。当要传送数据时，位于处理器中的设备驱动程序将可用描述符（DescrEnq）的数量发送到单独或以突发模式访问描述符的I / O设备，以访问由描述符标识的数据缓冲区。

8. 发明授权

US5905913A System for collecting a specified number of peripheral interrupts and transferring the interrupts as a group to the processor 失效
标题翻译：用于收集指定数量的外设中断并将中断作为一组传送到处理器的系统
公开(公告)号：US5905913A
公开(公告)日：1999-05-18
申请号：US842348
申请日：1997-04-24
申请人： Henry Michael Garrett , William G. Holland , Joseph Franklin Logan , Joseph Gerald McDonald
发明人： Henry Michael Garrett , William G. Holland , Joseph Franklin Logan , Joseph Gerald McDonald
IPC分类号： G06F13/24 , G06F13/14
CPC分类号： G06F13/24
摘要： An interrupt mechanism associated with a peripheral devise is connected to a processor by an interrupt driven I/O bus. The mechanism includes an n input System Interrupt Status Register (SISR) which collects up to n different interrupts from the device during a predetermined time period. Gate and timing circuits under control of signals provided by the processor regulate the frequency of the interrupts thus reducing the number of interrupt operations required to service the device.
摘要翻译：与外围设备相关联的中断机制通过中断驱动的I / O总线连接到处理器。该机制包括一个n输入系统中断状态寄存器（SISR），它在预定的时间周期内从设备收集多达n个不同的中断。由处理器提供的信号控制下的门和定时电路调节中断的频率，从而减少为设备提供服务所需的中断操作次数。

9. 发明授权

US08745437B2 Reducing impact of repair actions following a switch failure in a switch fabric 有权
标题翻译：减少交换机结构中的交换机故障后的修复动作的影响
公开(公告)号：US08745437B2
公开(公告)日：2014-06-03
申请号：US13177623
申请日：2011-07-07
申请人： William J. Armstrong , John M. Borkenhagen , Martin J. Crippen , Dhruv M. Desai , David R. Engebretsen , Philip R. Hillier, III , William G. Holland , James E. Hughes , James A. O'Connor , Steven M. Tri
发明人： William J. Armstrong , John M. Borkenhagen , Martin J. Crippen , Dhruv M. Desai , David R. Engebretsen , Philip R. Hillier, III , William G. Holland , James E. Hughes , James A. O'Connor , Steven M. Tri
IPC分类号： G06F11/00
CPC分类号： H04L41/0668 , G06F11/006 , G06F11/0709 , G06F11/0769 , G06F11/1423 , G06F11/327 , H04L49/356 , H04L49/557
摘要： Techniques are disclosed for reducing impact of a switch failure and/or a repair action in a switch fabric. In one embodiment, a server system is provided that includes a first interposer card that operatively connects one or more server cards to a midplane. The first interposer card may include a switch module that switches network traffic for the one or more server cards. The first interposer card may be hot-swappable from the midplane, and the one or more server cards may be hot-swappable from the first interposer card. The server system may further include an interconnect between the first interposer card and a second interposer card.
摘要翻译：公开了用于减少交换机结构中的交换机故障和/或修复动作的影响的技术。在一个实施例中，提供了一种服务器系统，其包括将一个或多个服务器卡可操作地连接到中平面的第一插入卡。第一插入卡可以包括切换一个或多个服务器卡的网络流量的交换机模块。第一插入卡可以从中间板热插拔，并且一个或多个服务器卡可以从第一插入卡热插拔。服务器系统还可以包括第一插入卡和第二插入卡之间的互连。

10. 发明申请

US20090119551A1 Broadcast of Shared I/O Fabric Error Messages in a Multi-Host Environment to all Affected Root Nodes 有权
标题翻译：将多主机环境中的共享I / O结构错误消息广播到所有受影响的根节点
公开(公告)号：US20090119551A1
公开(公告)日：2009-05-07
申请号：US12355931
申请日：2009-01-19
申请人： William T. Boyd , Douglas M. Freimuth , William G. Holland , Steven W. Hunter , Renato J. Recio , Steven M. Thurber , Madeline Vega
发明人： William T. Boyd , Douglas M. Freimuth , William G. Holland , Steven W. Hunter , Renato J. Recio , Steven M. Thurber , Madeline Vega
IPC分类号： G06F11/00
CPC分类号： G06F11/0784 , G06F11/0712 , G06F11/0724 , G06F11/0745 , H04L2001/0093
摘要： A method, mechanism and computer usable medium is provided for distributing I/O fabric errors to the appropriate root nodes in a multi-root environment. The case where the I/O fabric is attached to more than one root node and where each root can potentially share with the other roots the I/O adapter (IOA) resources which are attached to the I/O is addressed. Additionally, a method, mechanism and computer usable medium is provided by which errors detected in an I/O fabric may be routed to all root nodes which may be affected by the error, while not being reported to the root nodes that will not be affected by those errors. In particular, distributed computing system which uses the PCI Express protocol to communicate over the I/O fabric is addressed.
摘要翻译：提供了一种方法，机制和计算机可用介质，用于在多根环境中向适当的根节点分发I / O结构错误。 I / O结构连接到多个根节点的情况下，并且每个根可以与其他根可能共享的情况下，附加到I / O的I / O适配器（IOA）资源被寻址。另外，提供了一种方法，机制和计算机可用介质，通过该方法，机构和计算机可用介质可以将在I / O结构中检测到的错误路由到可能受到错误影响的所有根节点，同时不向根节点报告不受影响由这些错误。特别地，解决了使用PCI Express协议在I / O结构上进行通信的分布式计算系统。

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