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1. 发明授权

US07158760B1 Frequency synthesizer with selectable preconfigured synthesizer characteristics 有权
标题翻译：频率合成器具有可选择的预配置合成器特性
公开(公告)号：US07158760B1
公开(公告)日：2007-01-02
申请号：US10227634
申请日：2002-08-22
申请人： William B. Baringer , Cormac S. Conroy , Sang Oh Lee , Seok Kang , Beomsup Kim
发明人： William B. Baringer , Cormac S. Conroy , Sang Oh Lee , Seok Kang , Beomsup Kim
IPC分类号： H04B1/40 , H04B7/00 , H04B1/18
CPC分类号： H03L7/16
摘要： A system and method are disclosed for configuring a frequency synthesizer in a transceiver. Configuring a frequency synthesizer in a transceiver includes specifying a selection bit sequence wherein the selection bit sequence corresponds to a predetermined combination of transceiver characteristics; determining a plurality of synthesizer configuration parameters using the selection bit sequence; and configuring the frequency synthesizer using the plurality of synthesizer configuration parameters.
摘要翻译：公开了一种用于在收发器中配置频率合成器的系统和方法。在收发器中配置频率合成器包括指定选择位序列，其中选择位序列对应于收发器特性的预定组合; 使用所述选择比特序列确定多个合成器配置参数; 以及使用所述多个合成器配置参数来配置所述频率合成器。

2. 发明授权

US06806779B1 Frequency synthesizer with on-chip inductor 有权
标题翻译：具有片上电感的频率合成器
公开(公告)号：US06806779B1
公开(公告)日：2004-10-19
申请号：US10325478
申请日：2002-12-20
申请人： Beomsup Kim , Cormac S. Conroy
发明人： Beomsup Kim , Cormac S. Conroy
IPC分类号： H03L700
CPC分类号： H03L7/18 , H03B5/1212 , H03B5/1228 , H03B5/1296 , H03B21/02 , H03L7/099 , H03L7/0995
摘要： A system and method are disclosed for generating a synthesized signal. A frequency synthesizer is used. The frequency synthesizer includes an input interface configured to receive an input signal having a reference frequency; a phase locked loop (PLL) coupled to the input interface, having a fractional N configuration and comprises a voltage controlled oscillator; wherein the voltage controlled oscillator is configured to generate the synthesized signal; and the voltage controlled oscillator includes an on-chip inductor.
摘要翻译：公开了一种用于产生合成信号的系统和方法。使用频率合成器。频率合成器包括被配置为接收具有参考频率的输入信号的输入接口; 耦合到所述输入接口的锁相环（PLL），具有分数N配置并且包括压控振荡器; 其中所述压控振荡器被配置为产生所述合成信号; 并且压控振荡器包括片上电感器。

3. 发明授权

US07276983B2 Frequency synthesizer with on-chip inductor 有权
标题翻译：具有片上电感的频率合成器
公开(公告)号：US07276983B2
公开(公告)日：2007-10-02
申请号：US10940422
申请日：2004-09-13
申请人： Beomsup Kim , Cormac S. Conroy
发明人： Beomsup Kim , Cormac S. Conroy
IPC分类号： H03B5/12
CPC分类号： H03L7/18 , H03B5/1212 , H03B5/1228 , H03B5/1296 , H03B21/02 , H03L7/099 , H03L7/0995
摘要： A system and method are disclosed for generating a synthesized signal. A frequency synthesizer is used. The frequency synthesizer includes an input interface configured to receive an input signal having a reference frequency; a phase locked loop (PLL) coupled to the input interface, having a fractional N configuration and comprises a voltage controlled oscillator; wherein the voltage controlled oscillator is configured to generate the synthesized signal; and the voltage controlled oscillator includes an on-chip inductor.
摘要翻译：公开了一种用于产生合成信号的系统和方法。使用频率合成器。频率合成器包括被配置为接收具有参考频率的输入信号的输入接口; 耦合到所述输入接口的锁相环（PLL），具有分数N配置并且包括压控振荡器; 其中所述压控振荡器被配置为产生所述合成信号; 并且压控振荡器包括片上电感器。

4. 发明授权

US08412116B1 Wireless transceiver 有权
标题翻译：无线收发器
公开(公告)号：US08412116B1
公开(公告)日：2013-04-02
申请号：US10325716
申请日：2002-12-20
申请人： Beomsup Kim , Cormac S. Conroy
发明人： Beomsup Kim , Cormac S. Conroy
IPC分类号： H04B1/38
CPC分类号： H04B1/38 , H03C3/0925 , H03D1/2281 , H04B1/0003 , H04B1/403
摘要： A system and method are disclosed for transmitting and receiving signals. The method includes receiving a received signal; demodulating the received signal by mixing the received signal with a receiver local oscillator signal generated by a voltage controlled oscillator configured to generate the receiver local oscillator signal; switching the configuration of the voltage controlled oscillator to generate a transmission signal for use by a transmitter; and transmitting a modulated signal derived from the transmission signal.
摘要翻译：公开了用于发送和接收信号的系统和方法。该方法包括接收接收信号; 通过将接收的信号与被配置为产生接收机本地振荡器信号的压控振荡器产生的接收机本地振荡器信号进行混频来解调接收信号; 切换压控振荡器的配置以产生发射机使用的发射信号; 以及发送从所述发送信号导出的调制信号。

5. 发明授权

US06836193B1 Discretely variable capacitor for voltage controlled oscillator tuning 有权
标题翻译：用于压控振荡器调谐的离散可变电容器
公开(公告)号：US06836193B1
公开(公告)日：2004-12-28
申请号：US10325504
申请日：2002-12-20
申请人： Beomsup Kim , Cormac S. Conroy
发明人： Beomsup Kim , Cormac S. Conroy
IPC分类号： H03B508
CPC分类号： H03B5/00 , H03B2200/0048 , H03B2200/005 , H03J2200/10 , H03L7/099
摘要： A system and method are disclosed for generating a variable frequency output. A voltage controlled oscillator (VCO) is used. The VCO comprises a plurality of aggregate capacitor circuits, wherein each of the aggregate capacitor circuits has a collective capacitance, at least two of the collective capacitances have different values, and each of the aggregate capacitor circuits includes one or more individual capacitors wherein each of the individual capacitors are substantially the same size. The VCO further comprises a plurality of switches configured to select one or more aggregate capacitor circuits from among the plurality of aggregate capacitor circuits to form a discretely variable capacitor network having a discretely variable capacitance, wherein the discretely variable capacitor network is configured to cause an oscillator to generate a variable frequency as a result of the discretely variable capacitance.
摘要翻译：公开了一种用于产生可变频率输出的系统和方法。使用压控振荡器（VCO）。 VCO包括多个聚集电容器电路，其中每个聚集电容器电路具有集体电容，集体电容中的至少两个具有不同的值，并且每个聚集电容器电路包括一个或多个单独的电容器，其中单个电容器的尺寸基本相同。 VCO还包括多个开关，其被配置为从多个聚集电容器电路中选择一个或多个聚集电容器电路，以形成具有离散可变电容的离散可变电容器网络，其中离散可变电容器网络被配置为使振荡器作为离散可变电容的结果产生可变频率。

6. 发明授权

US07936220B2 Techniques for improving amplifier linearity 有权
标题翻译：提高放大器线性度的技术
公开(公告)号：US07936220B2
公开(公告)日：2011-05-03
申请号：US12334306
申请日：2008-12-12
申请人： Xiaoyong Li , Sang-Oh Lee , Cormac S. Conroy
发明人： Xiaoyong Li , Sang-Oh Lee , Cormac S. Conroy
IPC分类号： H03F3/04
CPC分类号： H03F1/223 , H03F1/3205 , H03F3/19 , H03F3/211 , H03F2200/168 , H03F2200/294 , H03F2200/456 , H03F2200/492
摘要： Techniques for improving the linearity of a cascode amplifier. In an exemplary embodiment, an auxiliary common-gate amplifier is provided in parallel with the principal cascode branch. The auxiliary common-gate amplifier samples a cascoded node in the principal cascode branch. The auxiliary common-gate amplifier generates a current which, when combined with the current generated by the principal cascode branch, cancels a distortion component to generate an output current with improved linearity characteristics. In an exemplary embodiment, a phase shifting network couples the cascoded node to the auxiliary common-gate amplifier, and may include, e.g., a capacitor coupled to an inductor.
摘要翻译：提高共源共栅放大器线性度的技术。在示例性实施例中，与主级联共模分支并联提供辅助共栅放大器。辅助共栅放大器在主共线分支中采样级联节点。辅助共栅放大器产生电流，当与由主级联共模分支产生的电流组合时，消除失真分量以产生具有改善的线性特性的输出电流。在示例性实施例中，相移网络将级联节点耦合到辅助公共门放大器，并且可以包括例如耦合到电感器的电容器。

7. 发明申请

US20100148873A1 TECHNIQUES FOR IMPROVING AMPLIFIER LINEARITY 有权
标题翻译：改善放大器线性度的技术
公开(公告)号：US20100148873A1
公开(公告)日：2010-06-17
申请号：US12334306
申请日：2008-12-12
申请人： Xiaoyong Li , Sang-Oh Lee , Cormac S. Conroy
发明人： Xiaoyong Li , Sang-Oh Lee , Cormac S. Conroy
IPC分类号： H03F3/16
CPC分类号： H03F1/223 , H03F1/3205 , H03F3/19 , H03F3/211 , H03F2200/168 , H03F2200/294 , H03F2200/456 , H03F2200/492
摘要： Techniques for improving the linearity of a cascode amplifier. In an exemplary embodiment, an auxiliary common-gate amplifier is provided in parallel with the principal cascode branch. The auxiliary common-gate amplifier samples a cascoded node in the principal cascode branch. The auxiliary common-gate amplifier generates a current which, when combined with the current generated by the principal cascode branch, cancels a distortion component to generate an output current with improved linearity characteristics. In an exemplary embodiment, a phase shifting network couples the cascoded node to the auxiliary common-gate amplifier, and may include, e.g., a capacitor coupled to an inductor.
摘要翻译：提高共源共栅放大器线性度的技术。在示例性实施例中，与主级联共模分支并联提供辅助共栅放大器。辅助共栅放大器在主共线分支中采样级联节点。辅助共栅放大器产生电流，当与由主级联共模分支产生的电流组合时，消除失真分量以产生具有改善的线性特性的输出电流。在示例性实施例中，相移网络将级联节点耦合到辅助公共门放大器，并且可以包括例如耦合到电感器的电容器。

8. 发明授权

US06870928B1 Line interface, apparatus and method for coupling transceiver and transmission line 失效
标题翻译：用于耦合收发器和传输线的线路接口，设备和方法
公开(公告)号：US06870928B1
公开(公告)日：2005-03-22
申请号：US09866525
申请日：2001-05-25
申请人： Cormac S. Conroy , Samuel W. Sheng , Ara Bicakci , John DeCelles , Sang-Soo Lee
发明人： Cormac S. Conroy , Samuel W. Sheng , Ara Bicakci , John DeCelles , Sang-Soo Lee
IPC分类号： H04L25/02 , H04L27/00 , H04M1/738 , H04M11/06 , H04M1/00
CPC分类号： H04L27/0002 , H04L25/0266 , H04M1/738 , H04M11/062
摘要： A line interface couples signals between a data transceiver and a transmission line having a load impedance Z. The line interface includes a transformer, a driver circuit for supplying a transmit signal from the data transceiver to the transformer, and a receiver circuit for receiving a receive signal from the transformer. The transformer includes a first port coupled to the transmission line, a second port coupled to the driver circuit, a third port coupled to the receiver circuit, a first winding part having a turns ratio of 1: n, where n>1, for coupling the transmit signal from the second port to the first port, and a second winding part having a turns ratio of 1: m, where m
摘要翻译：线路接口在数据收发器和具有负载阻抗Z的传输线之间耦合信号。线路接口包括变压器，用于从数据收发器向变压器提供发送信号的驱动器电路，以及用于接收接收器的接收器电路来自变压器的信号。变压器包括耦合到传输线的第一端口，耦合到驱动器电路的第二端口，耦合到接收器电路的第三端口，具有匝数比为1：n的第一绕组部件，其中n> 1，用于耦合从第二端口到第一端口的发送信号和匝数比为1：m的第二绕组部分，其中m

9. 发明授权

US06724219B1 Amplifier and line driver for broadband communications 有权
标题翻译：用于宽带通信的放大器和线路驱动器
公开(公告)号：US06724219B1
公开(公告)日：2004-04-20
申请号：US09882499
申请日：2001-06-15
申请人： Chun-Sup Kim , Ara Bicakci , Cormac S. Conroy , Sang-Soo Lee
发明人： Chun-Sup Kim , Ara Bicakci , Cormac S. Conroy , Sang-Soo Lee
IPC分类号： H04B303
CPC分类号： H04L25/0278 , H04L1/0001 , H04L25/028
摘要： A line driver for coupling a data transceiver to a transmission line having a load impedance via a transformer with a turns ratio of 1:n includes an input port for receiving an input signal voltage from the data transceiver, an output port for supplying an output signal voltage to the transformer, and an amplifier circuit for amplifying the input signal voltage. The amplifier circuit includes a first output stage, a second output stage coupled to the output port, an output resistor coupled to the first output stage, a feedback path from the first output stage to an input of the amplifier circuit, and a line matching network coupled between the first output stage and the second output stage, for compensating variations in the load impedance, so that a synthesized output impedance of the line driver substantially matches an actual load impedance Z of the transmission line.
摘要翻译：用于将数据收发器耦合到具有匝数比为1：n的变压器的具有负载阻抗的传输线的线路驱动器包括用于从数据收发器接收输入信号电压的输入端口，用于提供输出信号的输出端口变压器的电压和用于放大输入信号电压的放大器电路。放大器电路包括第一输出级，耦合到输出端的第二输出级，耦合到第一输出级的输出电阻，从第一输出级到放大器电路的输入的反馈路径，以及线匹配网络耦合在第一输出级和第二输出级之间，用于补偿负载阻抗的变化，使得线路驱动器的合成输出阻抗基本上与传输线的实际负载阻抗Z匹配。

10. 发明授权

US06292125B1 Digital-to-analog converter using weights stored in a weight table 有权
标题翻译：使用权重表中存储的权重的数模转换器
公开(公告)号：US06292125B1
公开(公告)日：2001-09-18
申请号：US09408016
申请日：1999-09-29
申请人： Cormac S. Conroy
发明人： Cormac S. Conroy
IPC分类号： H03M180
CPC分类号： H03M1/1042 , H03M1/74
摘要： A digital-to-analog converter (“DAC”) and method for digital-to-analog conversion is disclosed. The DAC generally comprises a plurality of analog weights, a weight table adapted to store digital sizes of the plurality of analog weights, and a converter for searching for selected weights from the plurality of analog weights using the digital sizes stored in the weight table and for mapping a binary input to the selected analog weights. The digital sizes of all except for at least two of the analog weights are successively approximated using the assigned sizes of at least two of the analog weights. The method for digital-to-analog conversion, comprising receiving the binary input, searching for selected weights from analog weights using a weight table storing digital sizes of the analog weights, mapping the binary input to the selected weights, and outputting a sum of the selected analog weights.
摘要翻译：公开了一种用于数模转换的数模转换器（“DAC”）和方法。 DAC通常包括多个模拟权重，适用于存储多个模拟权重的数字大小的权重表，以及用于使用存储在权重表中的数字大小从多个模拟权重中搜索所选权重的转换器，将二进制输入映射到所选择的模拟权重。使用至少两个模拟权重的分配尺寸，连续逼近除了至少两个模拟权重之外的所有数字大小。一种用于数模转换的方法，包括接收二进制输入，使用存储模拟权重的数字大小的权重表搜索来自模拟权重的选定权重，将二进制输入映射到所选择的权重，并输出选择的模拟重量。

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