专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06248206B1 Apparatus for sidewall profile control during an etch process 失效
标题翻译：在蚀刻过程中用于侧壁轮廓控制的装置
公开(公告)号：US06248206B1
公开(公告)日：2001-06-19
申请号：US08724660
申请日：1996-10-01
申请人： Harald Herchen , Michael D Welch , William Brown , Walter Richardson Merry
发明人： Harald Herchen , Michael D Welch , William Brown , Walter Richardson Merry
IPC分类号： C23F102
CPC分类号： H01J37/32082 , H01J37/3299 , H01L21/31116
摘要： A process is provided for controlling the slope of the sidewalls of an opening produced in a semiconductor wafer during an etch process. Microwave or radio frequency energy is remotely applied to pre-excite a process gas. Radio frequency energy is also supplied to the process gas within the process chamber. The sidewall slope is varied by varying the ratio of the amount of remote microwave or radio frequency energy supplied and that of the radio frequency energy supplied within the process chamber. The sidewall slope is also shaped by controlling the process gas flow rate and composition, and the pressure within the process chamber. A more vertical, anisotropic etch profile is obtained with increased radio frequency energy and lower process chamber pressure. A more horizontal, isotropic profile is obtained with decreased radio frequency energy and higher process chamber pressure. A narrower etched feature having smaller interlayer and active element contact regions than the corresponding feature size on the overlying photoresist layer may thereby be provided.
摘要翻译：提供了一种用于控制在蚀刻工艺期间在半导体晶片中产生的开口的侧壁的斜率的工艺。微波或射频能量被远程应用于预处理气体。射频能量也被提供给处理室内的处理气体。通过改变提供的远程微波或射频能量与处理室内提供的射频能量的比率来改变侧壁倾斜度。侧壁倾斜也通过控制工艺气体流速和组成以及处理室内的压力来成形。通过增加射频能量和较低的处理室压力获得更垂直的各向异性蚀刻轮廓。通过降低射频能量和更高的处理室压力获得更水平，各向同性的曲线。因此可以提供具有比覆盖的光致抗蚀剂层上的相应特征尺寸更小的中间层和有源元件接触区域的较窄蚀刻特征。

2. 发明授权

US6015761A Microwave-activated etching of dielectric layers 失效
标题翻译：电介质层的微波激活蚀刻
公开(公告)号：US6015761A
公开(公告)日：2000-01-18
申请号：US672469
申请日：1996-06-26
申请人： Walter Richardson Merry , William Brown , Harald Herchen , Michael D. Welch
发明人： Walter Richardson Merry , William Brown , Harald Herchen , Michael D. Welch
IPC分类号： H01L21/311 , H01L21/768 , H01L21/00
CPC分类号： H01L21/76807 , H01L21/31116 , H01L21/76804
摘要： A microwave-activated plasma process for etching dielectric layers (20) on a substrate (25) with excellent control of the shape and cross-sectional profile of the etched features (40), high etch rates, and good etching uniformity, is described. A process gas comprising (i) fluorocarbon gas (preferably CF.sub.4), (ii) inorganic fluorinated gas (preferably NF.sub.3), and (iii) oxygen, is used. The process gas is introduced into a plasma zone (55) remote from a process zone (60) and microwaves are coupled into the plasma zone (55) to form a microwave-activated plasma. The microwave-activated plasma is introduced into the process zone (60) to etch the dielectric layer (20) on the substrate (25) with excellent control of the shape of the etched features.
摘要翻译：描述了对蚀刻特征（40）的形状和横截面轮廓具有优异控制，高蚀刻速率和良好的蚀刻均匀性的对基板（25）上的介电层（20）进行蚀刻的微波激活等离子体处理。使用包含（i）碳氟化合物气体（优选CF 4），（ii）无机氟化气体（优选NF 3）和（iii）氧气）的工艺气体。将处理气体引入到远离处理区（60）的等离子体区（55）中，并且将微波耦合到等离子体区（55）中以形成微波激活的等离子体。微波激活的等离子体被引入处理区（60）中，以蚀刻特征的形状的优良控制蚀刻衬底（25）上的电介质层（20）。

3. 发明授权

US06432830B1 Semiconductor fabrication process 失效
标题翻译：半导体制造工艺
公开(公告)号：US06432830B1
公开(公告)日：2002-08-13
申请号：US09079845
申请日：1998-05-15
申请人： Walter Richardson Merry
发明人： Walter Richardson Merry
IPC分类号： H01L21302
CPC分类号： H01L21/0206 , H01L21/31116 , H01L21/31138 , H01L29/665 , H01L29/6656 , H01L29/66575
摘要： Process for treating a semiconductor substrate 25, polymeric etchant deposits 190, silicon lattice damage 195, and native silicon dioxide layers 185, are removed in sequential process steps. The polymeric etchant deposits 190 are removed using an activated cleaning gas comprising inorganic fluorinated gas and an oxygen gas. Silicon lattice damage 195 are etched using an activated etching gas. Thereafter, an activated reducing gas comprising a hydrogen-containing gas is used to reduce the native silicon dioxide layer 185, on the substrate 25, to a silicon layer. Subsequently, a metal layer 200 is deposited on the substrate 25 and the substrate annealed to form a metal silicide layer 205. Removal of the polymeric etchant deposits 190, the silicon lattice damage 195, and the native silicon oxide layer 185 increases the interfacial conductivity of the metal silicide layer 205 to the underlying silicon-containing substrate 25.
摘要翻译：在顺序的工艺步骤中除去处理半导体衬底25，聚合物蚀刻剂沉积物190，硅晶格损伤195和天然二氧化硅层185的方法。使用包含无机氟化气体和氧气的活性清洁气体除去聚合物蚀刻剂沉积物190。使用活化的蚀刻气体蚀刻硅晶格损伤195。此后，使用包含含氢气体的活性还原气体将天然二氧化硅层185在衬底25上还原成硅层。随后，金属层200沉积在衬底25上并且衬底被退火以形成金属硅化物层205.去除聚合物蚀刻剂沉积物190，硅晶格损伤195和天然氧化硅层185增加界面导电性金属硅化物层205到下面的含硅衬底25。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式